2013 Microchip Technology Inc. Advance Information DS40001708A-page 1
PIC16(L)F170X/171X
Description:
PIC16F(L)170X/171X microcontrollers combine Intelligent Analog integration with low cost and extreme low power (XLP) to
suit a variety of general purpose applications. These 14 to 44-pin devices deliver on-chip Op Amps, Core Independent
Peripherals (CLC, NCO and COG), Peripheral Pin Select and Zero-Cross Detect, providing for increased design flexibility.
Core Features:
C Compiler Optimized RISC Architecture
Only 49 Instructions
Operating Speed:
- 0-32 MHz clock input
- 125 ns minimum instruction cycle
Interrupt Capability
16-Level Deep Hardware Stack
Up to Four 8-bit Timers
•One 16-bit Timer
Power-on Reset (POR)
Power-up Timer (PWRT)
Low-Power Brown-Out Reset (LPBOR)
Programmable Watchdog Timer (WDT) up to 256s
Programmable Code Protection
Memory:
Up to 16 Kwords Flash Program Memory
Up to 2048 Bytes Data SRAM Memory
Direct, Indirect and Relative Addressing modes
Operating Characteristics:
Operating Voltage Range:
- 1.8V to 3.6V (PIC16LF170X/171X)
- 2.3V to 5.5V (PIC16F170X/171X)
Temperature Range:
- Industrial: -40°C to 85°C
- Extended: -40°C to 125°C
eXtreme Low-Power (XLP) Features:
Sleep mode: 50 nA @ 1.8V, typical
Watchdog Timer: 500 nA @ 1.8V, typical
Secondary Oscillator: 500 nA @ 32 kHz
Operating Current:
- 8 uA @ 32 kHz, 1.8V, typical
- 32 uA/MHz @ 1.8V, typical
Digital Peripherals:
Configurable Logic Cell (CLC):
- Integrated combinational and sequential logic
Complementary Output Generator (COG):
- Rising/falling edge dead-band control/blanking
Numerically Controlled Oscillator (NCO):
- Generates true linear frequency control and
increased frequency resolution
- Input Clock: 0Hz < FNCO < 32 MHz
- Resolution: FNCO/220
Capture/Compare/PWM (CCP) module
PWM: Two 10-bit Pulse-Width Modulators
Serial Communications:
- SPI, I2C™, RS-232, RS-485, LIN compatible
- Auto-Baud Detect, auto-wake-up on start
Up to 35 I/O Pins and One Input Pin:
- Individually programmable pull-ups
- Slew rate control
- Interrupt-on-change with edge-select
Peripheral Pin Select (PPS):
-Enables pin mapping of digital I/O
Intelligent Analog Peripherals:
Operational Amplifiers:
- Two configurable rail-to-rail op amps
- Selectable internal and external channels
- 2 MHz gain bandwidth product
High-Speed Comparators:
- Up to two comparators
- 50 ns response time
- Rail-to-rail inputs
10-Bit Analog-to-Digital Converter (ADC):
- Up to 28 external channels
- Conversion available during Sleep
- Temperature indicator
Zero-Cross Detector (ZCD):
- Detect when AC signal on pin crosses ground
8-Bit Digital-to-Analog Converter (DAC):
- Output available externally
- Internal connections to comparators, op amps,
Fixed Voltage Reference (FVR) and ADC
Internal Voltage Reference module
Cost Effective 8-Bit Intelligent Analog Flash Microcontrollers
PIC16(L)F170X/171X
DS40001708A-page 2 Advance Information 2013 Microchip Technology Inc.
Clocking Structure:
16 MHz Internal Oscillator Block:
- ±1% at calibration
- Selectable frequency range from 0 to 32 MHz
31 kHz Low-Power Internal Oscillator
External Oscillator Block with:
- Three crystal/resonator modes up to 20 MHz
- Two external clock modes up to 32 MHz
Fail-Safe Clock Monitor
Two-Speed Oscillator Start-up
Oscillator Start-up Timer (OST)
Programming/Debug Features:
In-Circuit Debug Integrated On-Chip
Emulation Header for Advanced Debug:
- Provides trace, background debug and up to
32 hardware break points
In-Circuit Serial Programming™ (ICSP™) via Two
Pins
PIC16(L)F170X/171X FAMILY TYPES
PACKAGES
Device
Program Memory
Flash (words)
Data SRAM
(bytes)
I/O Pins
8-bit/16-bit Timers
High-Speed
Comparators
Op Amp
10-bit ADC (ch)
5-/8-bit DAC
Zero Cross
CCP/PWM
COG
EUSART
I2C™/SPI
CLC
NCO
Debug(1)
PIC16(L)F1703 2k 256 12 2/1 0 2 8 0/0 1 2/0 0 0 1 0 0 I/E
PIC16(L)F1704 4k 512 12 4/1 2 2 8 0/1 1 2/2 1 1 1 3 0 I/E
PIC16(L)F1705 8k 1024 12 4/1 2 2 8 0/1 1 2/2 1 1 1 3 0 I/E
PIC16(L)F1707 2k 256 18 2/1 0 2 8 0/0 1 2/0 0 0 1 0 0 I/E
PIC16(L)F1708 4k 512 18 4/1 2 2 12 0/1 1 2/2 1 1 1 3 0 I/E
PIC16(L)F1709 8k 1024 18 4/1 2 2 12 0/1 1 2/2 1 1 1 3 0 I/E
PIC16(L)F1713 4k 512 25 4/1 2 2 17 1/1 1 2/2 1 1 1 4 1 I/E
PIC16(L)F1716 8k 1024 25 4/1 2 2 17 1/1 1 2/2 1 1 1 4 1 I/E
PIC16(L)F1717 8k 1024 36 4/1 2 2 28 1/1 1 2/2 1 1 1 4 1 I/E
PIC16(L)F1718 16k 2048 25 4/1 2 2 17 1/1 1 2/2 1 1 1 4 1 I/E
PIC16(L)F1719 16k 2048 36 4/1 2 2 28 1/1 1 2/2 1 1 1 4 1 I/E
Note 1: I – Debugging integrated on chip; H – Debugging via ICD header; E – Debugging via Emulation header.
Device PDIP TSSOP QFN
(4x4x0.9) SOIC SSOP SPDIP QFN
(6x6x0.9)
UQFN
(4x4x0.5) TQFP UQFN
(5x5x0.5)
PIC16F1703 x x x x
PIC16F1704 x x x x
PIC16F1705 x x x x
PIC16F1707 x x x x
PIC16F1708 x x x x
PIC16F1709 x x x x
PIC16F1713 x x x x x
PIC16F1716 x x x x x
PIC16F1717 x xx
PIC16F1718 x x x x x
PIC16F1719 x xx
2013 Microchip Technology Inc. Advance Information DS40001708A-page 3
PIC16(L)F170X/171X
PIN DIAGRAM – 14-PIN PDIP, SOIC, SSOP
PIN DIAGRAM – 16-PIN QFN
PIC16(L)F1703
PIC16(L)F1704
PIC16(L)F1705
1
2
3
4
5
6
7
VDD
RA5
RA4
VPP/MCLR/RA3
RC5
RC4
RC3
RA0/ICSPDAT
RA1/ICSPCLK
RA2
RC0
RC1
RC2
14
13
12
11
10
9
8
VSS
Note: See Ta bl e 1 and Ta b l e 2 for the pin allocation tables.
2
3
1
9
10
11
12
RC4
4
VSS
RA0/ICSPDAT
RA1/ICSPCLK
RA2
RC0
NC
NC
VDD
RA5
RA4
RA3/MCLR/VPP
RC5
RC3
RC2
RC1
6
7
5
8
15
14
16
13
PIC16(L)F1703
PIC16(L)F1704
PIC16(L)F1705
Note: See Table 1 and Table 2 or the pin allocation tables.
PIC16(L)F170X/171X
DS40001708A-page 4 Advance Information 2013 Microchip Technology Inc.
PIN DIAGRAM – 20-PIN PDIP, SOIC, SSOP
PIN DIAGRAM – 20-PIN QFN
PIC16(L)F1707
PIC16(L)F1708
PIC16(L)F1709
2
3
4
5
6
7
8
9
10
VDD
RA5
RA4
VPP/MCLR/RA3
RC5
RC4
RC3
RC6
RC7
RB7
RA0/ICSPDAT
RA1/ICSPCLK
RA2
RC0
RC1
RC2
RB4
RB5
RB6
20
19
18
17
16
15
14
13
12
11
VSS
1
Note: See Tab le 3 and Tabl e 4 for the pin allocation tables.
2
3
4
5
1
6
7
8
9
20
19
18
17
16
10
12
13
14
15
11
PIC16(L)F1707
PIC16(L)F1708
PIC16(L)F1709
RB4
RB5
RB6
RB7
RC7
VPP/MCLR/RA3
RC5
RC4
RC3
RC6
RA4
RA5
VDD
VSS
RA0/ICSPDAT
RA1/ICSPCLK
RA2
RC0
RC1
RC2
Note: See Table 3 and Tab le 4 for the pin allocation tables.
2013 Microchip Technology Inc. Advance Information DS40001708A-page 5
PIC16(L)F170X/171X
PIN DIAGRAM – 28-PIN PDIP, SOIC, SSOP
PIN DIAGRAM – 28-PIN (U)QFN
PIC16L(F)1713/6/8
1
2
3
4
5
6
7
8
9
10
VPP/MCLR/RE3
RA0
RA1
RA2
RA3
RA4
RA5
RB6
RB5
RB4
RB3
RB2
RB1
RB0
VDD
VSS
11
12
13
14 15
16
17
18
19
20
28
27
26
25
24
23
22
21
VSS
RA7
RA6
RC0
RC1
RC2
RC3
RC5
RC4
RC7
RC6
RB7
Note: See Tabl e 5 and Ta bl e 6 for the pin allocation table.
2
3
6
1
18
19
20
21
15
7
16
17
RC0
5
4
RB7
RB6
RB5
RB4
RB0
VDD
VSS
RC7
RC6
RC5
RC4
RE3/MCLR/VPP
RA0
RA1
RA2
RA3
RA4
RA5
VSS
RA7
RA6
RC1
RC2
RC3
9
10
13
8
14
12
11
27
26
23
28
22
24
25
PIC16L(F)1713/6/8
RB3
RB2
RB1
Note: See Ta bl e 5 and Ta b l e 6 for the pin allocation table.
PIC16(L)F170X/171X
DS40001708A-page 6 Advance Information 2013 Microchip Technology Inc.
PIN DIAGRAM – 40-PIN PDIP
PIC16L(F)1717/9
2
3
4
5
6
7
8
9
10
VPP/MCLR/RE3
RA0
RA1
RA2
RA3
RA4
RA5
RE0
RE1
RE2
RB6/ICSPCLK
RB5
RB4
RB0
VDD
VSS
RD2
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VDD
VSS
RA7
RA6
RC0
RC1
RC2
RC3
RD0
RD1
RC5
RC4
RD3
RD4
RC7
RC6
RD7
RD6
RD5
RB7/ICSPDAT
1
RB3
RB2
RB1
Note: See Tab le 7 and Tabl e 8 for the pin allocation table.
2013 Microchip Technology Inc. Advance Information DS40001708A-page 7
PIC16(L)F170X/171X
PIN DIAGRAM – 44-PIN TQFP (10x10)
PIN DIAGRAM – 40-PIN UQFN (5x5)
10
11
2
3
6
1
18
19
20
21
22
12
13
14
15
38
8
7
44
43
42
41
40
39
16
17
29
30
31
32
33
23
24
25
26
27
28
36
34
35
9
37
5
4
PIC16L(F)1717/9
RC6
RC5
RC4
RD3
RD2
RD1
RD0
RC3
RC2
RC1
RC0
RA1
RA0
VPP/MCLR/RE3
RB3
ICSPDAT/RB7
ICSPCLK/RB6
RB5
RB4
NC
RA3
RA2
RC7
RD4
RD5
RD6
RD7
VSS
VDD
RB0
RB1
RB2
RA6
RA7
VSS
NC
VDD
RE2
RE1
RE0
RA5
RA4
NC
NC
Note: See Tab le 7 and Tabl e 8 for the pin allocation table.
10
11
2
3
4
5
6
1
18
19
20
21
22
12
13
14
15
38
8
7
40
39
16
17
29
30
31
32
33
23
24
25
26
27
28
36
34
35
9
37
RA1
RA0
VPP/MCLR/RE3
RB3
ICSPDAT/RB7
ICSPCLK/RB6
RB5
RB4 RC6
RC5
RC4
RD3
RD2
RD1
RD0
RC3
RC2
RC1
RC0
RA6
RA7
VSS
VDD
RE2
RE1
RE0
RA5
RA4
RC7
RD4
RD5
RD6
RD7
VSS
VDD
RB0
RB1
RB2
PIC16L(F)1717/9
RA3
RA2
Note: See Tabl e 7 and Ta b l e 8 for the pin allocation table.
PIC16(L)F170X/171X
DS40001708A-page 8 Advance Information 2013 Microchip Technology Inc.
TABLE 1: 14-PIN AND 16-PIN ALLOCATION TABLE (PIC16(L)F1703)
I/O(2)
PDIP/SOIC/SSOP
QFN
ADC
Reference
Op Amp
Zero Cross
Timers
CCP
MSSP
CLC
Interrupt
Pull-up
Basic
RA0 13 12 AN0 VREF- IOC YICSPDAT
RA1 12 11 AN1 VREF+ ——— IOC YICSPCLK
RA2 11 10 AN2 ZCD T0CKI(1) INT(1)
IOC
Y
RA3 4 3 ——— IOC YMCLR
VPP
RA4 3 2 AN3 T1G(1) IOC YCLKOUT
RA5 2 1 ——T1CKI(1) —— IOC YCLKIN
RC0 10 9AN4 OPA1IN+ SCK(1)
SCL(3) IOC Y
RC1 9 8 AN5 OPA1IN- SDI(1)
SDA(3) IOC Y
RC2 8 7 AN6 OPA1OUT IOC Y
RC3 7 6 AN7 OPA2OUT CCP2(1) SS(1) IOC Y
RC4 6 5 OPA2IN- IOC Y
RC5 5 4 —OPA2IN+ CCP1(1) IOC Y
VDD 116 VDD
VSS 14 13 —— VSS
OUT(2)
CPP1 SDA(3)
CPP2 SCL(3)
SCK
——
SDO
Note 1: Default peripheral input. Input can be moved to any other pin with the PPS input selection registers.
2: All pin digital outputs default to PORT latch data. Any pin can be selected as a peripheral digital output with the PPS output selection registers.
3: These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections.
2013 Microchip Technology Inc. Advance Information DS40001708A-page 9
PIC16(L)F170X/171X
TABLE 2: 14-PIN AND 16-PIN ALLOCATION TABLE (PIC16(L)F1704/5)
I/O(2)
PDIP/SOIC/SSOP
QFN
ADC
Reference
Comparator
Op Amp
DAC
Zero Cross
Timers
CCP
PWM
COG
MSSP
EUSART
CLC
Interrupt
Pull-up
Basic
RA0 13 12 AN0 VREF-C1IN+ DAC1OUT IOC YICSPDAT
RA1 12 11 AN1 VREF+C1IN0-
C2IN0-
—— IOC YICSPCLK
RA2 11 10 AN2 DAC1OUT2 ZCD T0CKI(1) COGIN(1) INT(1)
IOC
Y
RA3 4 3 —— IOC YMCLR
VPP
RA4 3 2 AN3 T1G(1)
SOSCO
IOC YCLKOUT
OSC2
RA5 2 1 —— T1CKI(1)
SOSCI
——
CLCIN3(1) IOC YCLKIN
OSC1
RC0 10 9AN4 C2IN+ OPA1IN+ SCK(1)
SCL(3) IOC Y
RC1 9 8 AN5 C1IN1-
C2IN1-
OPA1IN- SDI(1)
SDA(3) CLCIN2(1) IOC Y
RC2 8 7 AN6 C1IN2-
C2IN2-
OPA1OUT IOC Y
RC3 7 6 AN7 C1IN3-
C2IN3-
OPA2OUT CCP2(1) —SS
(1) CLCIN0(1) IOC Y
RC4 6 5 OPA2IN- CK(1) CLCIN1(1) IOC Y
RC5 5 4 —OPA2IN+ CCP1(1) ——RX
(3) IOC Y
VDD 116 VDD
VSS 14 13 VSS
OUT(2)
C1OUT CPP1 PWM3OUT COGA SDA(3) CK CLC1OUT
C2OUT CPP2 PWM4OUT COGB SCL(3) DT(3) CLC2OUT
COGC SDO TX CLC3OUT
——— COGD SCK ——
Note 1: Default peripheral input. Input can be moved to any other pin with the PPS input selection registers.
2: All pin digital outputs default to PORT latch data. Any pin can be selected as a peripheral digital output with the PPS output selection registers.
3: These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections.
PIC16(L)F170X/171X
DS40001708A-page 10 Advance Information 2013 Microchip Technology Inc.
TABLE 3: 20-PIN ALLOCATION TABLE (PIC16(L)F1707)
I/O(2)
PDIP/SOIC/
SSOP
QFN
ADC
Reference
Op Amp
Zero Cross
Timers
CCP
MSSP
Interrupt
Pull-up
Basic
RA0 19 16 AN0 VREF- IOC Y ICSPDAT
RA1 18 15 AN1 VREF+— IOC YICSPCLK
RA2 17 14 AN2 ZCD T0CKI(1) INT(1)
IOC
Y
RA3 4 1 ——IOC YMCLR
VPP
RA4 320 AN3 T1G(1) IOC YCLKOUT
RA5 219 ——T1CKI IOC YCLKIN
RB4 13 10 AN10 OPA1IN- SCK(1)
SDA(3) IOC Y
RB5 12 9AN11 OPA1IN+ ——IOC Y
RB6 11 8 SDI(1)
SCL(3) IOC Y
RB7 10 7 ——IOC Y
RC0 16 13 AN4 IOC Y
RC1 15 12 AN5 ——IOC Y
RC2 14 11 AN6 OPA1OUT IOC Y
RC3 7 4 AN7 OPA2OUT CCP2(1) IOC Y
RC4 6 3 OPA2IN- IOC Y
RC5 5 2 —OPA2IN+ CCP1(1) IOC Y
RC6 8 5 AN8 SS(1) IOC Y
RC7 9 6 AN9 ——IOC Y
VDD 118 VDD
VSS 20 17 VSS
OUT(2)
CPP1 SDA(3)
CPP2 SCL(3)
SCK
——
SDO
Note 1: Default peripheral input. Input can be moved to any other pin with the PPS input selection registers.
2: All pin digital outputs default to PORT latch data. Any pin can be selected as a peripheral digital output with the PPS output selection registers.
3: These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections.
2013 Microchip Technology Inc. Advance Information DS40001708A-page 11
PIC16(L)F170X/171X
TABLE 4: 20-PIN ALLOCATION TABLE (PIC16(L)F1708/9)
I/O(2)
PDIP/SOIC/
SSOP
QFN
ADC
Reference
Comparator
Op Amp
DAC
Zero Cross
Timers
CCP
PWM
COG
MSSP
EUSART
CLC
Interrupt
Pull-up
Basic
RA0 19 16 AN0 VREF-C1IN+ DAC1OUT IOC YICSPDAT
RA1 18 15 AN1 VREF+C1IN0-
C2IN0-
——IOC YICSPCLK
RA2 17 14 AN2 DAC1OUT2 ZCD T0CKI(1) COGIN(1) INT(1)
IOC
Y
RA3 4 1 —— IOC YMCLR
VPP
RA4 320 AN3 T1G(1)
SOSCO
IOC YCLKOUT
OSC2
RA5 219 —— T1CKI
SOSCI
———CLCIN3(1) IOC YCLKIN
OSC1
RB4 13 10 AN10 OPA1IN- SCK(1)
SDA(3) IOC Y
RB5 12 9AN11 OPA1IN+ —— RX
(1)
(3) IOC Y
RB6 11 8 SDI(1)
SCL(3) IOC Y
RB7 10 7 —— CK
(1)
(3) IOC Y
RC0 16 13 AN4 C2IN+ IOC Y
RC1 15 12 AN5 C1IN1-
C2IN1-
——CLCIN2(1) IOC Y
RC2 14 11 AN6 C1IN2-
C2IN2-
OPA1OUT IOC Y
RC3 7 4 AN7 C1IN3-
C2IN3-
OPA2OUT CCP2(1) ——CLCIN0(1) IOC Y
RC4 6 3 OPA2IN- CLCIN1(1) IOC Y
RC5 5 2 —OPA2IN+ CCP1(1) ——IOC Y
RC6 8 5 AN8 SS(1) IOC Y
RC7 9 6 AN9 —— IOC Y
VDD 118 VDD
VSS 20 17 VSS
Note 1: Default peripheral input. Input can be moved to any other pin with the PPS input selection registers.
2: All pin digital outputs default to PORT latch data. Any pin can be selected as a peripheral digital output with the PPS output selection registers.
3: These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections.
PIC16(L)F170X/171X
DS40001708A-page 12 Advance Information 2013 Microchip Technology Inc.
OUT(2)
C1OUT CPP1 PWM3OUT COGA SDA(3) CK CLC1OUT
C2OUT CPP2 PWM4OUT COGB SCL(3) DT CLC2OUT
COGC SDO TX CLC3OUT
—— COGD————
I/O(2)
PDIP/SOIC/
SSOP
QFN
ADC
Reference
Comparator
Op Amp
DAC
Zero Cross
Timers
CCP
PWM
COG
MSSP
EUSART
CLC
Interrupt
Pull-up
Basic
Note 1: Default peripheral input. Input can be moved to any other pin with the PPS input selection registers.
2: All pin digital outputs default to PORT latch data. Any pin can be selected as a peripheral digital output with the PPS output selection registers.
3: These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections.
2013 Microchip Technology Inc. Advance Information DS40001708A-page 13
PIC16(L)F170X/171X
TABLE 5: 28-PIN ALLOCATION TABLE (PIC16L(F)1713/6/8) (PART 1)
I/O(2)
PDIP,SOIC,
SSOP
QFN, UQFN
ADC
Reference
Op Amp
DAC
Zero Cross
NCO
Interrupt
Pull-up
Basic
RA0 2 27 AN0 CLCIN0(1) IOC Y
RA1 3 28 AN1 OPA1OUT CLCIN1(1) IOC Y
RA2 4 1 AN2 Vref- DAC1OUT1 IOC Y
RA3 5 2 AN3 Vref+ IOC Y
RA4 6 3 OPA1IN+ T0CKI(1) IOC Y
RA5 7 4 AN4 OPA1IN- DAC2OUT1 nSS(1) IOC Y
RA6 10 7 IOC OSC2
CLKOUT
RA7 9 6 NCOCLK IOC OSC1
CLKIN
RB0 21 18 AN12 ZCD INT(1)
IOC
RB1 22 19 AN10 OPA2OUT IOC
RB2 23 20 AN8 OPA2IN- IOC
RB3 24 21 AN9 OPA2IN+ IOC
RB4 25 22 AN11 IOC Y
RB5 26 23 AN13 T1G(1) IOC Y
RB6 27 24 SCL(1) CLCIN2(1) IOC Y ICSPCLK
RB7 28 25 DAC1OUT2
DAC2OUT2 CLCIN3(1) IOC Y ICSPDAT
T1CKI(1)
SOSCO
RC1 12 9 SOSCI IOC Y
RC2 13 10 AN14 IOC Y
RC3 14 11 AN15 SCK(1) IOC Y
Note 1: Default peripheral input. Alternate pins can be selected as the peripheral input with the PPS input selection registers.
Note 2: All pin digital outputs default to PORT latch data. Alternate outputs can be selected as the peripheral digital output with the PPS output selection registers .
Note 3: These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections.
Note 4: Alternate outputs are excluded from solid shaded areas.
Note 5: Alternate inputs are excluded from dot shaded areas.
C1IN1+
Comparator
Timers
CCP
PWM
EUSART
CLC
C1IN0-
C2IN0-
C1IN1-
C2IN1-
C1IN0+
C2IN0+
COG
MSSP
C2IN1+ COGIN(1)
C1IN3-
C2IN3-
C1IN2-
C2IN2-
RC0 11 8 Y
CCP2(1)
CCP1(1)
IOC
PIC16(L)F170X/171X
DS40001708A-page 14 Advance Information 2013 Microchip Technology Inc.
TABLE 6: 28-PIN ALLOCATION TABLE (PIC16L(F)1713/6/8) (PART 2)
I/O(2)
PDIP,SOIC,
SSOP
QFN, UQFN
ADC
Reference
Op Amp
DAC
Zero Cross
NCO
Interrupt
Pull-up
Basic
SDI(1) IOC Y
SDA(1)
RC5 16 13 AN17 IOC Y
RC6 17 14 AN18 IOC Y
RC7 18 15 AN19 IOC Y
RE3 1 26 MCLR
Vpp
Vdd 2 0 1 7 Vdd
85 Vs s
19 16
OUT(4)
C1OUT
C2OUT
CCP1
CCP2
NCOOUT
PWM3OUT
PWM4OUT
COGA
COGB
COGC
COGD
SDA(3)
SCK/SCL(3)
SDO
TX/CK
DT(3)
CLC1OUT
CLC2OUT
CLC3OUT
CLC4OUT
IN(5)
T1G
T1CKI
T0CKI
CCP1
CCP2
NCOCLK
SDI
SCK/SCL(3)
SS
RX(3)
CK
CLCIN0
CLCIN1
CLCIN2
CLCIN3
INT
Note 1: Default peripheral input. Alternate pins can be selected as the peripheral input with the PPS input selection registers.
Note 2: All pin digital outputs default to PORT latch data. Alternate outputs can be selected as the peripheral digital output with the PPS output selection registers .
Note 3: These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections.
Note 4: Alternate outputs are excluded from solid shaded areas.
Note 5: Alternate inputs are excluded from dot shaded areas.
RC4 15 12 AN16
Comparator
Timers
COGIN
RX(3)
Vs s
CK(3)
CLC
CCP
PWM
COG
MSSP
EUSART
2013 Microchip Technology Inc. Advance Information DS40001708A-page 15
PIC16(L)F170X/171X
TABLE 7: PIN ALLOCATION TABLE (PIC16L(F)1717/9) (PART 1)
I/O(2)
PDIP
TQFP
UQFN
ADC
Reference
Op Amp
DAC
Zero Cross
NCO
Interrupt
Pullup
Basic
RA0 2 19 17 AN0 CLCIN0(1) IOC Y
RA1 3 20 18 AN1 OPA1OUT CLCIN1(1) IOC Y
RA2 4 21 19 AN2 Vref- DAC1OUT1 IOC Y
RA3 5 22 20 AN3 Vref+ IOC Y
RA4 6 23 21 OPA1IN+ T0CKI(1) IOC Y
RA5 7 24 22 AN4 OPA1IN- DAC2OUT1 nSS(1) IOC Y
RA6 14 31 29 IOC OSC2
CLKOUT
RA7 13 30 28 NCOCLK IOC OSC1
CLKIN
RB0 33 8 8 AN12 ZCD INT(1)
IOC
RB1 34 9 9 AN10 OPA2OUT IOC
RB2 35 10 10 AN8 OPA2IN- IOC
RB3 36 11 11 AN9 OPA2IN+ IOC
RB4 37 14 12 AN11 IOC Y
RB5 38 15 13 AN13 T1G(1) IOC Y
RB6 39 16 14 SCL(1) CLCIN2(1) IOC Y ICSPCLK
RB7 40 17 15 DAC1OUT2
DAC2OUT2 CLCIN3(1) IOC Y ICSPDAT
T1CKI(1)
SOSCO
RC1 16 35 31 SOSCI IOC Y
RC2 17 36 32 AN14 IOC Y
RC3 18 37 33 AN15 SCK(1) IOC Y
SDI(1) IOC Y
SDA(1)
Note 1: Default peripheral input. Alternate pins can be selected as the peripheral input with the PPS input selection registers.
Note 2: All pin digital outputs default to PORT latch data. Alternate outputs can be selected as the peripheral digital output with the PPS output selection registers.
Note 3: These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections.
Note 4: Alternate outputs are excluded from solid shaded areas.
COG
COGIN(1)
PWM
Comparator
C2IN1+
C1IN3-
C2IN3-
C1IN2-
C2IN2-
C1IN0-
C2IN0-
C1IN1-
C2IN1-
C1IN0+
C2IN0+
C1IN1+
CLC
EUSART
CCP
CCP2(1)
CCP1(1)
MSSP
Timers
YRC0 15 32 30 IOC
RC4 23 42 38 AN16
PIC16(L)F170X/171X
DS40001708A-page 16 Advance Information 2013 Microchip Technology Inc.
TABLE 8: PIN ALLOCATION TABLE (PIC16L(F)1717/9) (PART 2
I/O(2)
PDIP
TQFP
UQFN
ADC
Reference
Op Amp
DAC
Zero Cross
NCO
Interrupt
Pullup
Basic
RC5 24 43 39 AN17 IOC Y
RC6 25 44 40 AN18 IOC Y
RC7 26 1 1 AN19 IOC Y
RD0 19 38 34 AN20
RD1 20 39 35 AN21
RD2 21 40 36 AN22
RD3 22 41 37 AN23
RD4 27 2 2 AN24
RD5 28 3 3 AN25
RD6 29 4 4 AN26
RD7 30 5 5
RE0 8 25 23 AN5
RE1 9 26 24 AN6
RE2 10 27 25 AN7
RE3 1 18 16 MCLR
Vpp
11 7 7 Vdd
32 28 26
12 6 6 Vss
31 29 27
OUT(4)
C1OUT
C2OUT
CCP1
CCP2
NCOOUT
PWM3OUT
PWM4OUT
COGA
COGB
COGC
COGD
SDA(3)
SCK/SCL(3)
SDO
TX/CK
DT (3)
CLC1OUT
CLC2OUT
CLC3OUT
CLC4OUT
IN(5)
T1G
T1CKI
T0CKI
CCP1
CCP2
NCOCLK
SDI
SCK/SCL(3)
SS
RX (3)
CK
CLCIN0
CLCIN1
CLCIN2
CLCIN3
INT
Note 1: Default peripheral input. Alternate pins can be selected as the peripheral input with the PPS input selection registers.
Note 2: All pin digital outputs default to PORT latch data. Alternate outputs can be selected as the peripheral digital output with the PPS output selection registers.
Note 3: These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections.
Note 4: Alternate outputs are excluded from solid shaded areas.
Note 5: Alternate inputs are excluded from dot shaded areas.
EUSART
CLC
Comparator
Timers
CCP
PWM
COG
Vdd
Vss
RX(3)
CK(3)
MSSP
COGIN
2013 Microchip Technology Inc. Advance Information DS40001708A-page 17
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2013, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620772942
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITY MANAGEMENT S
YSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
DS40001708A-page 18 Advance Information 2013 Microchip Technology Inc.
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Microchip:
PIC16F1713-I/SP PIC16F1703-I/SL PIC16F1716-E/SP PIC16F1707-E/SO PIC16F1707-E/SS PIC16F1716-I/SS
PIC16F1713-I/SO PIC16F1707-I/P PIC16F1716-E/SS PIC16F1707-I/SS PIC16F1713T-I/SS PIC16F1713-E/SP
PIC16F1713-E/MV PIC16F1707-E/ML PIC16F1707-E/P PIC16F1716-E/MV PIC16F1716T-I/SO PIC16F1703-I/P
PIC16F1716-I/MV PIC16F1703-E/ML PIC16F1707-I/ML PIC16F1703T-I/ST PIC16F1713T-I/MV PIC16F1707T-I/SO
PIC16F1713-E/SO PIC16F1716-I/SP PIC16F1703-E/P PIC16F1713T-I/SO PIC16F1716T-I/MV PIC16F1703T-I/SL
PIC16F1713-I/SS PIC16F1707-I/SO PIC16F1716T-I/SS PIC16F1713-I/MV PIC16F1703-E/ST PIC16F1716-I/SO
PIC16F1703-E/SL PIC16F1703-I/ST PIC16F1716-E/SO PIC16F1703-I/ML PIC16F1713-E/SS PIC16F1707T-I/SS
PIC16F1703T-I/ML PIC16LF1703-I/SL PIC16LF1703-I/P PIC16LF1707-I/P PIC16F1705-I/ML PIC16LF1705-E/P
PIC16LF1705-I/ML PIC16LF1716T-I/SO PIC16F1709-E/SO PIC16LF1713T-I/SS PIC16LF1705T-I/ML PIC16LF1713-
I/SS PIC16LF1716-I/SP PIC16LF1709T-I/ML PIC16F1705-E/ML PIC16F1709T-I/SO PIC16F1705-E/P
PIC16LF1705T-I/ST PIC16F1705T-I/ST PIC16LF1713-E/SS PIC16LF1716-I/SO PIC16LF1716-E/SP PIC16LF1713-
I/SP PIC16LF1716-I/MV PIC16LF1713-E/SP PIC16LF1705-E/ST PIC16LF1713-I/MV PIC16F1709-E/SS
PIC16LF1713T-I/MV PIC16LF1716-E/MV PIC16F1705-E/SL PIC16F1705T-I/SL PIC16F1709-I/ML PIC16LF1709-
E/SS PIC16LF1713-E/SO PIC16LF1716T-I/SS PIC16LF1709T-I/SS PIC16LF1709-E/ML PIC16LF1713T-I/SO
PIC16LF1705-E/ML PIC16F1709-E/P PIC16LF1713-E/MV PIC16LF1716-E/SO PIC16LF1709-E/SO PIC16LF1716-
E/SS PIC16F1709-E/ML PIC16F1709T-I/SS PIC16LF1705-E/SL PIC16LF1709-E/P PIC16LF1716T-I/MV
PIC16F1709T-I/ML PIC16LF1709-I/SS PIC16F1705-E/ST PIC16LF1709-I/ML PIC16LF1705-I/ST PIC16LF1709-I/SO
PIC16LF1705T-I/SL PIC16LF1713-I/SO