TOSHIBA TC74VHCT245AF/AFW/AFT TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74VHCT245AF, TC74VHCT245AFW, TC74VHCT245AFT OCTAL BUS TRANSCEIVER The TC74VHCT245A is an advanced high speed CMOS OCTAL BUS TRANSCEIVER fabricated with silicon gate C2MOS technology. It: achieves the high speed operation similar to equivalent Bipolar Schottky TTL while 20 20 Cae maintaining the CMOS low power dissipation. It is intended for two-way asynchronous communication 1 1 between data busses, The direction of data transmission is : . F (SOP20-P-300-1.27) FW (SO -300-1, determined by the level of the DIR input. Weight: 0225 aye) Weight 0-469 (TYP) The enable input (G) can be used to disable the device so that the busses are effectively isolated. The input voltage are compatible with TTL output voltage. This device may be used as a level converter for interfacing 3,3V to 5V system. 20 eth Input protection and output circuit ensure that 0 to 5.5V can 1 be applied to the input and output*! pins without regard to the supply voltage. These structure prevents device destruction due to mismatched supply and input/output voltages such as battery back up, hot board insertion, etc. APPLICATION NOTES *1: output in off-state FT (TSSOP20-P-0044-0.65) Weight : 0.089 (TYP.) Do not. apply a signal to any bus FEATURES: terminal when it is in the output @ High Speede-rrssserecrsssetseeeseneeeseee tod = 4.9ns(typ.) at Voc = 5V mode. Damage may result. e Low Power Dissipation ---++:-++-++++ loc = 4uA(Max.) at Ta = 25C All floating (high impedance ) bus Compatible with TTL outputs -- Vi, =0.8V (Max.) terminals must have their input Vin = 2.0V (Min.) levels fixed by means of pull up or e Power Down Protection is provided on all inputs and pull down resistors. outputs Balanced Propagation Delays-~---tpLy=tpHL @ LOW Noise <crecrrrcecererecaneececeesnvesenese Voip =1.6V (Max.) e Pin and Function Compatible with the 74 series (74AC /HC /F/ALS/LS ete.) 245 type. IEC LOGIC SYMBOL PIN ASSIGNMENT Sf DIR DIR 4 Al a1 Ar 2 A2 3 A2 52 A3 4 A3 )p3 Aa 5 aa | ) ga AS 6 Ab 7 { 4) AS 2 AT 8 3 A6 B6 AaB 9 A7 ez GND 10 As Deg (TOP VIEW) 96100 1EBA2 @ TOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid situations in which a malfunction or failure of a TOSHIBA product could cause ioss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions and conditions set forth in the TOSHIBA Semiconductor Reliability Handbook. 269 7997-01-30 1/6 TOSHIBA TRUTH TABLE TC74VHCT245AF/AFW/AFT INPUTS FUNCTION = OUTPUT G | DIR] A BUS B BUS L L OUTPUT | INPUT =B L H INPUT | OUTPUT B=A H x High impedance Zz X: Dont Care Z : High Impedance ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL VALUE UNIT Supply Voltage Range Vee 0.5~7.0 Vv DC Input Voltage (DIR, G) Vin ~0.5~7.0 Vv DC Bus 1/0 Voltage Vio 0.5~7.0 (Note 1) v 0.5~VCC +0.5 (Note 2) Input Diode Current lk 20 mA Output Diode Current lox +20 (Note 3) mA DC Output Current lout 25 mA DC Vec/Ground Current lee 75 mA Power Dissipation Po 180 mw Storage Temperature Tstg 65~150 C (Note 1) Output in Off-State (Note 2) High or Low State. [gut absolute maximum rating must be observed. (Note 3) VQUT<GND, VouT>Vcc RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL VALUE UNIT Supply Voltage Vee 4.5~5.5 Vv Input Voltage (DIR, G) Vin 0~5.5 Vv Bus 1/0 Voltage Viro 0~5.5 (Note 4) Vv O~VCC (Note 5) Operating Temperature Topr 40~85 C Input Rise and Fall Time dt/dV 0~20 ns/V (Note 4) Output in Off-State (Note 5) High or Low State otherwise under any intellectual property @ The information contained herein is subject to change without notice. 3 The products described in this document are subject to foreign exchange and foreign trade control laws. The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or or other rights of TOSHIBA CORPORATION or others. SEIOOTEBA2 270 1997-01-30 2/6 TOSHIBA TC74VHCT245AF/AFW/AFT DC ELECTRICAL CHARACTERISTICS PARAMETER __| SYMBOL CONDITON Vec(V) pea zee Tes OOS UNIT MIN. | TYP. | MAX.) MIN. | MAX. High - Level ~ _ _ _ Input Voltage Vin 4.5~5.51 2.0 2.0 Vv Low - Level _ _ _ Input Voltage Vin 4.5~5.5 0.8 08 |v High - Level Von | MiNe lon= -50HA'} 45 | 44145 | ~ | 44] Vv Output Voltage VinorVic [lon=-8mA | 45 [394] | | 3.e0] Low - Level Vou Vin= lo = 50 KA 4.5 - 0.0 | 0.1 - 0.1 V Output Voltage VnorVii [lo=8mA | as | | [ose] | 0.44 3-State Output Vin= Vin or Vit _ |4 _ Off - State Current loz Vour = Vec or GND 5.5 #0.25 2.50 Input Leakage Current lin Vin=5.5VorGND O~5.5) _ 0.1 ad 1.0 HA lec Vin = Vec or GND 5.5 - _ 4.0 _ 40.0 Quiescent Supply Current PER INPUT Veda . IN = 5. _ leet | OTHER INPUT : Vec or GND 55 1.35 1.50 | ma Output Leakage Current lopp =| Vour = 5.5V 0 - - 0.5 - 5.0 | uA AC ELECTRICAL CHARACTERISTICS ( Input t, = t= 3ns) TEST CONDITION Ta=25C = 40~85" PARAMETER SYMBOL Tae AO eS UNIT Vee(V) Tc. (pF)| min. | typ. | max. | MIN. | MAX. p : Delay Ti to + 15 _ 4.9 7.7 1.0 8.5 ropagation Delay Time toHL 5.00.5 50 54 87 10 95 . t 15 9.4| 13.8 1.0 15.0 3-State Output Enable Tim pzZL | Re = 1kO. 15.040. ate Output Enapie time | tezy | 90205) so | 99| 148| 1.0| 16.0] ns 3-State Output Disable Time ei RL =1kQ [5.040.5| 50 _ 10.1] 15.4 1.0] 16.5 Output to Output Skew pan (Note 6)|5.0+0.5| 50 | | 1.0| - 1.0 Input Capacitance Gn DIR,G = 4 10 = 10 Bus Input Capacitance Co |An,Bn = 13 = = pF Power Dissipation Capacitance Ceo (Note 7) = 16 | = = (Note 6) Parameter guaranteed by design. tosiy = ftorn m torn |, tosut = Htontm toxin | (Note 7) Cpp is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: icctopr) =C pv Veo finttec/8 (per bit) 271 1997-01-30 3/6 TOSHIBA TC74VHCT245AF/AFW/AFT NOISE CHARACTERISTICS ( input t,= t= 3ns) PARAMETER SYMBOL TEST one Mm = = UNIT Maximum Dynamic Vo.__| Vor C. = 50pF 5.0 1.2 16 =| Vv Minimum Dynamic Vou Vow C. = SOpF 5.0 1.2 1.6 Vv Dynamic. input voltage Vino C. = 50pF 3.0 - 2.0 Vv Dynamic Input Voltage Vio C. = 50pF 5.0 0.8 Vv 272 1997-01-30 4/6