Order this document by MBRV7030CTL/D SEMICONDUCTOR TECHNICAL DATA Motorola Preferred Device D3PAK Power Surface Mount Package SCHOTTKY BARRIER RECTIFIER 70 AMPERES 30 VOLTS Employing the Schottky Barrier principle in a large area metal-to-silicon power rectifier. Features epitaxial construction with oxide passivation and metal overlay contact. Ideally suited for low voltage, high frequency switching power supplies; free wheeling diodes and polarity protection diodes. * Compact Package Ideal for Automated Handling 1 * Short Heat Sink Tab Manufactured -- Not Sheared 3 * Highly Stable Oxide Passivated Junction * Guardring for Over-voltage Protection * Low Forward Voltage Drop * Monolithic Dual Die Construction. May be Paralleled for High Current Output. Mechanical Characteristics: * Case: Epoxy, Molded * Weight: 2 Grams (approximately) * Finish: All External Surfaces Corrosion Resistant and Terminal Leads are Readily Solderable * Maximum Temperature of 260C for 10 Seconds for Soldering * Shipped 29 Units per Plastic Tube * Marking: MBRV7030CTL 2 2 1 3 CASE 433A-01, Style 1 D3PAK MAXIMUM RATINGS Rating Peak Repetitive Reverse Voltage Working Peak Reverse Voltage DC Blocking Voltage Symbol Value Unit VRRM VRWM VR IO 30 V 35 70 A Average Rectified Forward Current (At Rated VR, TC = 135C) Per Leg Per Package Peak Repetitive Forward Current (At Rated VR, Square Wave, 20 kHz, TC = 135C) Per Leg IFRM 70 A Non-Repetitive Peak Surge Current (Surge applied at rated load conditions, halfwave, single phase, 60 Hz) Per Package IFSM 500 A Tstg, TC TJ - 55 to 150 C - 55 to 150 C dv/dt 10,000 V/ms Per Leg Per Leg RqJC RqJA 0.59 54 C/W Maximum Instantaneous Forward Voltage (1), see Figure 2 (IF = 35 A, TJ = 25C) (IF = 70 A, TJ = 25C) (IF = 35 A, TJ = 100C) Per Leg VF Maximum Instantaneous Reverse Current, see Figure 4 (Rated VR, TJ = 25C) (Rated VR, TJ = 100C) Per Leg Storage / Operating Case Temperature Operating Junction Temperature Voltage Rate of Change (Rated VR, TJ = 25C) THERMAL CHARACTERISTICS Thermal Resistance -- Junction-to-Case Thermal Resistance -- Junction-to-Ambient (2) ELECTRICAL CHARACTERISTICS V 0.50 0.62 0.47 IR mA 2.0 40 (1) Pulse Test: Pulse Width 250 s, Duty Cycle 2% (2) Rating applies when using minimum pad size, FR4 PC Board Designer's Data for "Worst Case" Conditions -- The Designer's Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit curves -- representing boundaries on device characteristics -- are given to facilitate "worst case" design. Designer's and Switchmode are trademarks of Motorola, Inc. Preferred devices are Motorola recommended choices for future use and best overall value. TMOS Motorola Motorola, Inc. 1997 Power MOSFET Transistor Device Data 1 MBRV7030CTL 10 TJ = 150C TJ = 25C TJ = 100C 1.0 0 0.2 0.4 0.6 0.8 TJ = 100C 0.01 TJ = 25C 0.0001 0 10 20 30 TJ = 100C 1.0 0 0.2 0.4 0.6 0.8 TJ = 25C 0.01 0 10 20 30 Figure 4. Maximum Reverse Current dc square wave Ipk/Io = p Ipk/Io = 5 20 Ipk/Io = 10 Ipk/Io = 20 20 0.1 Figure 3. Typical Reverse Current 50 10 TJ = 100C VR, REVERSE VOLTAGE (VOLTS) FREQ = 20 kHz 30 TJ = 150C 1.0 VR, REVERSE VOLTAGE (VOLTS) 60 40 10 0.001 P FO , AVERAGE POWER DISSIPATION (WATTS) I O , AVERAGE FORWARD CURRENT (AMPS) TJ = 25C Figure 2. Maximum Forward Voltage 0.001 40 60 80 100 120 TC, CASE TEMPERATURE (C) 140 Figure 5. Current Derating (Per Leg) 2 TJ = 150C Figure 1. Typical Forward Voltage 0.1 0 10 VF, MAXIMUM INSTANTANEOUS FORWARD VOLTAGE (VOLTS) TJ = 150C 0 100 VF, INSTANTANEOUS FORWARD VOLTAGE (VOLTS) 1.0 0.00001 I F , INSTANTANEOUS FORWARD CURRENT (AMPS) 100 I R , MAXIMUM REVERSE CURRENT (AMPS) I R , REVERSE CURRENT (AMPS) I F , INSTANTANEOUS FORWARD CURRENT (AMPS) TYPICAL ELECTRICAL CHARACTERISTICS 160 30 dc 25 Ipk/Io = p Ipk/Io = 5 20 TJ = 150C square wave Ipk/Io = 10 15 Ipk/Io = 20 10 5 0 0 25 50 IO, AVERAGE FORWARD CURRENT (AMPS) 75 Figure 6. Forward Power Dissipation (Per Leg) Motorola TMOS Power MOSFET Transistor Device Data MBRV7030CTL TYPICAL ELECTRICAL CHARACTERISTICS 100,000 C, CAPACITANCE (pF) TJ = 25C 10,000 1,000 1.0 10 VR, REVERSE VOLTAGE (VOLTS) 100 Figure 7. Capacitance SAFE OPERATING AREA r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1.0 P(pk) 0.1 RJC(t) = r(t) RJC D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) - TC = P(pk) RJC(t) t1 t2 DUTY CYCLE, D = t1/t2 0.01 0.000001 0.00001 0.0001 0.001 0.01 0.1 1.0 10 t, TIME (SECONDS) Figure 8. Thermal Response VCC 12 Vdc + 150 V, 10 mAdc 2 kW 12 V 100 2 ms 1 kHz D.U.T. 2N2222 CURRENT AMPLITUDE ADJUST 0 -10 AMPS 100 W CARBON 2N6277 4 mF + 1 CARBON 1N5817 Figure 9. Test Circuit for Repetitive Reverse Current Motorola TMOS Power MOSFET Transistor Device Data 3 MBRV7030CTL INFORMATION FOR USING THE DPAK SURFACE MOUNT PACKAGE RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to ensure proper solder connection interface 0.165 4.191 between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. 0.100 2.54 0.118 3.0 0.063 1.6 0.190 4.826 0.243 6.172 inches mm POWER DISSIPATION FOR A SURFACE MOUNT DEVICE PD = TJ(max) - TA RJA The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25C, one can calculate the power dissipation of the device. For a D3PAK device, PD is calculated as follows. PD = 150C - 25C = 2.31 Watts 54C/W The 54C/W for the D3PAK package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 2.31 Watts. There are other alternatives to achieving higher power dissipation from the surface mount packages. One is to increase the area of the drain pad. By increasing the area of the drain pad, the power 4 dissipation can be increased. Although one can almost double the power dissipation with this method, one will be giving up area on the printed circuit board which can defeat the purpose of using surface mount technology. For example, a graph of RJA versus drain pad area is shown in Figure 11. 100 RJA , THERMAL RESISTANCE, JUNCTION TO AMBIENT (C/W) The power dissipation for a surface mount device is a function of the drain pad size. These can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA. Using the values provided on the data sheet, PD can be calculated as follows: Board Material = 0.0625 G-10/FR-4, 2 oz Copper 1.75 Watts 80 TA = 25C 60 3.0 Watts 40 5.0 Watts 20 0 2 4 6 A, AREA (SQUARE INCHES) 8 10 Figure 10. Thermal Resistance versus Drain Pad Area for the D3PAK Package (Typical) Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. Motorola TMOS Power MOSFET Transistor Device Data MBRV7030CTL SOLDER STENCIL GUIDELINES Prior to placing surface mount components onto a printed circuit board, solder paste must be applied to the pads. Solder stencils are used to screen the optimum amount. These stencils are typically 0.008 inches thick and may be made of brass or stainless steel. For packages such as the SC-59, SC-70/SOT-323, SOD-123, SOT-23, SOT-143, SOT-223, SO-8, SO-14, SO-16, and SMB/SMC diode packages, the stencil opening should be the same as the pad size or a 1:1 registration. This is not the case with the DPAK and D2PAK packages. If one uses a 1:1 opening to screen solder onto the drain pad, misalignment and/or "tombstoning" may occur due to an excess of solder. For these two packages, the opening in the stencil for the paste should be approximately 50% of the tab area. The opening for the leads is still a 1:1 registration. Figure 12 shows a typical stencil for the DPAK and D2PAK packages. The pattern of the opening in the stencil for the drain pad is not critical as long as it allows approximately 50% of the pad to be covered with paste. CCC CCC CC CCCCCCCC CC CC CCC CCC CCC CCC CC CCCCCCCC SOLDER PASTE OPENINGS STENCIL Figure 11. Typical Stencil for DPAK and D2PAK Packages SOLDERING PRECAUTIONS The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. * Always preheat the device. * The delta temperature between the preheat and soldering should be 100C or less.* * When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10C. * The soldering temperature and time shall not exceed 260C for more than 10 seconds. Motorola TMOS Power MOSFET Transistor Device Data * When shifting from preheating to soldering, the maximum temperature gradient shall be 5C or less. * After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. * Mechanical stress or shock should not be applied during cooling. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. * Due to shadowing and the inability to set the wave height to incorporate other surface mount components, the D2PAK is not recommended for wave soldering. 5 MBRV7030CTL TYPICAL SOLDER HEATING PROFILE For any given circuit board, there will be a group of control settings that will give the desired heat pattern. The operator must set temperatures for several heating zones, and a figure for belt speed. Taken together, these control settings make up a heating "profile" for that particular circuit board. On machines controlled by a computer, the computer remembers these profiles from one operating session to the next. Figure 18 shows a typical heating profile for use when soldering a surface mount device to a printed circuit board. This profile will vary among soldering systems but it is a good starting point. Factors that can affect the profile include the type of soldering system in use, density and types of components on the board, type of solder used, and the type of board or substrate material being used. This profile shows temperature versus time. The STEP 1 PREHEAT ZONE 1 "RAMP" 200C STEP 2 STEP 3 VENT HEATING "SOAK" ZONES 2 & 5 "RAMP" DESIRED CURVE FOR HIGH MASS ASSEMBLIES line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint. The two profiles are based on a high density and a low density board. The Vitronics SMD310 convection/infrared reflow soldering system was used to generate this profile. The type of solder used was 62/36/2 Tin Lead Silver with a melting point between 177 -189C. When this type of furnace is used for solder reflow work, the circuit boards and solder joints tend to heat first. The components on the board are then heated by conduction. The circuit board, because it has a large surface area, absorbs the thermal energy more efficiently, then distributes this energy to the components. Because of this effect, the main body of a component may be up to 30 degrees cooler than the adjacent solder joints. STEP 6 VENT STEP 5 STEP 4 HEATING HEATING ZONES 3 & 6 ZONES 4 & 7 "SPIKE" "SOAK" STEP 7 COOLING 205 TO 219C PEAK AT SOLDER JOINT 170C 160C 150C 150C 100C SOLDER IS LIQUID FOR 40 TO 80 SECONDS (DEPENDING ON MASS OF ASSEMBLY) 140C 100C DESIRED CURVE FOR LOW MASS ASSEMBLIES 50C TIME (3 TO 7 MINUTES TOTAL) TMAX Figure 12. Typical Solder Heating Profile 6 Motorola TMOS Power MOSFET Transistor Device Data MBRV7030CTL PACKAGE DIMENSIONS -T- B SEATING PLANE C S W E Q 4 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. Y V N 1 P 2 A K 3 F U D 2 PL G X J 0.13 (0.005) H M T CASE 433A-01 ISSUE A Motorola TMOS Power MOSFET Transistor Device Data DIM A B C D E F G H J K N P Q S U V W X Y INCHES MIN MAX 0.588 0.592 0.625 0.629 0.196 0.200 0.048 0.052 0.058 0.062 0.078 0.082 4.30 BSC 0.105 0.110 0.018 0.022 0.150 0.160 0.373 0.377 0.070 0.074 0.054 0.058 0.313 0.317 0.050 --- 0.044 --- 0.066 0.070 0.050 0.060 0.107 0.111 MILLIMETERS MIN MAX 14.94 15.04 15.88 15.98 4.98 5.08 1.22 1.32 1.47 1.57 1.98 2.08 10.92 BSC 2.67 2.79 0.46 0.56 3.81 4.06 9.47 9.58 1.78 1.88 1.37 1.47 7.95 8.05 1.27 --- 1.12 --- 1.68 1.78 1.27 1.52 2.72 2.82 STYLE 1: PIN 1. GATE 2. COLLECTOR 3. EMITTER 7 MBRV7030CTL Motorola reserves the right to make changes without further notice to any products herein. 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