1
Motorola TMOS Power MOSFET Transistor Device Data
D3PAK Power Surface Mount Package
Employing the Schottky Barrier principle in a large area metal–to–silicon power
rectifier. Features epitaxial construction with oxide passivation and metal overlay
contact. Ideally suited for low voltage, high frequency switching power supplies;
free wheeling diodes and polarity protection diodes.
•Compact Package Ideal for Automated Handling
•Short Heat Sink Tab Manufactured — Not Sheared
•Highly Stable Oxide Passivated Junction
•Guardring for Over–voltage Protection
•Low Forward Voltage Drop
•Monolithic Dual Die Construction. May be Paralleled for High Current Output.
Mechanical Characteristics:
•Case: Epoxy, Molded
•Weight: 2 Grams (approximately)
•Finish: All External Surfaces Corrosion Resistant and Terminal Leads are
Readily Solderable
•Maximum Temperature of 260°C for 10 Seconds for Soldering
•Shipped 29 Units per Plastic Tube
•Marking: MBRV7030CTL
MAXIMUM RATINGS
Rating Symbol Value Unit
Peak Repetitive Reverse Voltage
Working Peak Reverse Voltage
DC Blocking Voltage
VRRM
VRWM
VR
30 V
Average Rectified Forward Current Per Leg
(At Rated VR, TC = 135°C) Per Package IO35
70 A
Peak Repetitive Forward Current Per Leg
(At Rated VR, Square Wave, 20 kHz, TC = 135°C) IFRM 70 A
Non–Repetitive Peak Surge Current Per Package
(Surge applied at rated load conditions, halfwave, single phase, 60 Hz) IFSM 500 A
Storage / Operating Case Temperature Tstg, TC– 55 to 150 °C
Operating Junction Temperature TJ– 55 to 150 °C
Voltage Rate of Change (Rated VR, TJ = 25°C) dv/dt 10,000 V/
m
s
THERMAL CHARACTERISTICS
Thermal Resistance — Junction–to–Case Per Leg
Thermal Resistance — Junction–to–Ambient (2) Per Leg R
q
JC
R
q
JA 0.59
54 °C/W
ELECTRICAL CHARACTERISTICS
Maximum Instantaneous Forward Voltage (1), see Figure 2 Per Leg
(IF = 35 A, TJ = 25°C)
(IF = 70 A, TJ = 25°C)
(IF = 35 A, TJ = 100°C)
VF0.50
0.62
0.47
V
Maximum Instantaneous Reverse Current, see Figure 4 Per Leg
(Rated VR, TJ = 25°C)
(Rated VR, TJ = 100°C)
IR2.0
40
mA
(1) Pulse Test: Pulse Width ≤250 µs, Duty Cycle ≤ 2%
(2) Rating applies when using minimum pad size, FR4 PC Board
Designer’s Data for “W orst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
Designer’s and Switchmode are trademarks of Motorola, Inc.
Preferred devices are Motorola recommended choices for future use and best overall value.
Order this document
by MBRV7030CTL/D
SEMICONDUCTOR TECHNICAL DATA
SCHOTTKY BARRIER
RECTIFIER
70 AMPERES
30 VOLTS
CASE 433A–01, Style 1
D3PAK
1
3
2
12
3
Motorola Preferred Device
Motorola, Inc. 1997
MBRV7030CTL
2Motorola TMOS Power MOSFET Transistor Device Data
TYPICAL ELECTRICAL CHARACTERISTICS
VF, INSTANTANEOUS FORWARD VOLT AGE (VOLTS)
Figure 1. Typical Forward Voltage
IF, INSTANTANEOUS FORW ARD CURRENT (AMPS)
VF, MAXIMUM INSTANTANEOUS FORWARD VOLTAGE (VOL TS)
Figure 2. Maximum Forward Voltage
VR, REVERSE VOLTAGE (VOL TS)
Figure 3. Typical Reverse Current
VR, REVERSE VOLTAGE (VOL TS)
Figure 4. Maximum Reverse Current
TC, CASE TEMPERATURE (
°
C)
Figure 5. Current Derating (Per Leg)
IO, A VERAGE FORWARD CURRENT (AMPS)
Figure 6. Forward Power Dissipation (Per Leg)
TJ = 25
°C
0.80.60.40.20
100
10
1.0 0.80.60.40.20
100
10
1.0
3020100
0.00001
0.0001
0.001
0.01
0.1
1.0
3020100
0.01
0.1
1.0
10
0.001
160140120100806040200
60
50
40
30
20
10
07550250
30
25
20
15
10
5
0
TJ = 150
°C
TJ = 100
°C
IF, INSTANTANEOUS FORW ARD CURRENT (AMPS)
IR, REVERSE CURRENT (AMPS)
TJ = 25
°C
TJ = 150
°C
TJ = 100
°C
TJ = 25
°C
TJ = 150
°C
TJ = 100
°C
IR, MAXIMUM REVERSE CURRENT (AMPS)
TJ = 25
°C
TJ = 150
°C
TJ = 100
°C
IO, A VERAGE FORWARD CURRENT (AMPS)
FREQ = 20 kHz
PFO, AVERAGE POWER DISSIPATION (W ATTS)
square wave
Ipk/Io =
p
Ipk/Io = 5
Ipk/Io = 10
Ipk/Io = 20
dc
square
wave
Ipk/Io =
p
Ipk/Io = 5
Ipk/Io = 10
Ipk/Io = 20
dc TJ = 150
°C
MBRV7030CTL
3
Motorola TMOS Power MOSFET Transistor Device Data
TYPICAL ELECTRICAL CHARACTERISTICS
C, CAPACITANCE (pF)
Figure 7. Capacitance
VR, REVERSE VOLTAGE (VOL TS)
1.0 10 100
100,000
10,000
1,000
TJ = 25
°
C
SAFE OPERATING AREA
t, TIME (SECONDS)
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESIST ANCE
R
θ
JC(t) = r(t) R
θ
JC
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) – TC = P(pk) R
θ
JC(t)
P(pk)
t1t2
DUTY CYCLE, D = t1/t2
Figure 8. Thermal Response
Figure 9. Test Circuit for Repetitive
Reverse Current
0.000001 0.00001 0.0001 0.001 0.01 0.1 1.0 10
0.01
0.1
1.0
2N6277
100 2N2222
+ 150 V,
10 mAdc
VCC
12 Vdc
CURRENT
AMPLITUDE
ADJUST
0–10 AMPS
12 V
100
W
CARBON 1 CARBON
1N5817
4
m
F
D.U.T. 2 k
W
2
m
s
1 kHz +
MBRV7030CTL
4Motorola TMOS Power MOSFET Transistor Device Data
INFORMATION FOR USING THE DPAK SURFACE MOUNT PACKAGE
RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must be
the correct size to ensure proper solder connection interface
between the board and the package. With the correct pad
geometry, the packages will self align when subjected to a
solder reflow process.
0.190
4.826
mm
inches
0.100
2.54 0.063
1.6
0.165
4.191 0.118
3.0
0.243
6.172
POWER DISSIPATION FOR A SURFACE MOUNT DEVICE
The power dissipation for a surface mount device is a
function of the drain pad size. These can vary from the
minimum pad size for soldering to a pad size given for
maximum power dissipation. Power dissipation for a surface
mount device is determined by TJ(max), the maximum rated
junction temperature of the die, RθJA, the thermal resistance
from the device junction to ambient, and the operating
temperature, T A. Using the values provided on the data sheet,
PD can be calculated as follows:
PD = TJ(max) – TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature T A of 25°C, one can
calculate the power dissipation of the device. For a D3PAK
device, PD is calculated as follows.
PD = 150°C – 25°C
54°C/W = 2.31 Watts
The 54°C/W for the D3PAK package assumes the use of the
recommended footprint on a glass epoxy printed circuit board
to achieve a power dissipation of 2.31 W atts. There are other
alternatives to achieving higher power dissipation from the
surface mount packages. One is to increase the area of the
drain pad. By increasing the area of the drain pad, the power
dissipation can be increased. Although one can almost double
the power dissipation with this method, one will be giving up
area on the printed circuit board which can defeat the purpose
of using surface mount technology. For example, a graph of
RθJA versus drain pad area is shown in Figure 11.
Figure 10. Thermal Resistance versus Drain Pad
Area for the D3PAK Package (Typical)
1.75 Watts
Board Material = 0.0625
″
G–10/FR–4, 2 oz Copper
80
100
60
40
20 1086420
3.0 W atts
5.0 W atts
TA = 25
°
C
A, AREA (SQUARE INCHES)
TO AMBIENT ( C/W)
°
RJA, THERMAL RESISTANCE, JUNCTION
θ
Another alternative would be to use a ceramic substrate or
an aluminum core board such as Thermal Clad. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
MBRV7030CTL
5
Motorola TMOS Power MOSFET Transistor Device Data
SOLDER STENCIL GUIDELINES
Prior to placing surface mount components onto a printed
circuit board, solder paste must be applied to the pads. Solder
stencils are used to screen the optimum amount. These
stencils are typically 0.008 inches thick and may be made of
brass or stainless steel. For packages such as the SC–59,
SC–70/SOT–323, SOD–123, SOT–23, SOT–143, SOT–223,
SO–8, SO–14, SO–16, and SMB/SMC diode packages, the
stencil opening should be the same as the pad size or a 1:1
registration. This is not the case with the DPAK and D2PAK
packages. If one uses a 1:1 opening to screen solder onto the
drain pad, misalignment and/or “tombstoning” may occur due
to an excess of solder. For these two packages, the opening
in the stencil for the paste should be approximately 50% of the
tab area. The opening for the leads is still a 1:1 registration.
Figure 12 shows a typical stencil for the DPAK and D2PAK
packages. The pattern of the opening in the stencil for the
drain pad is not critical as long as it allows approximately 50%
of the pad to be covered with paste.
ÇÇÇ
ÇÇÇ
ÇÇÇ
ÇÇÇ
ÇÇÇ
ÇÇÇ
ÇÇÇ
ÇÇÇ
ÇÇÇ
ÇÇÇ
ÇÇ
ÇÇ
ÇÇ
ÇÇ
ÇÇ
ÇÇ
Figure 11. Typical Stencil for DPAK and
D2PAK Packages
SOLDER PASTE
OPENINGS
STENCIL
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
•Always preheat the device.
•The delta temperature between the preheat and soldering
should be 100°C or less.*
•When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.
•The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
•When shifting from preheating to soldering, the maximum
temperature gradient shall be 5°C or less.
•After soldering has been completed, the device should be
allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
•Mechanical stress or shock should not be applied during
cooling.
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
* Due to shadowing and the inability to set the wave height to
incorporate other surface mount components, the D2PAK is
not recommended for wave soldering.
MBRV7030CTL
6Motorola TMOS Power MOSFET Transistor Device Data
TYPICAL SOLDER HEATING PROFILE
For any given circuit board, there will be a group of control
settings that will give the desired heat pattern. The operator
must set temperatures for several heating zones, and a figure
for belt speed. Taken together, these control settings make up
a heating “profile” for that particular circuit board. On
machines controlled by a computer , the computer remembers
these profiles from one operating session to the next. Figure
18 shows a typical heating profile for use when soldering a
surface mount device to a printed circuit board. This profile will
vary among soldering systems but it is a good starting point.
Factors that can affect the profile include the type of soldering
system in use, density and types of components on the board,
type of solder used, and the type of board or substrate material
being used. This profile shows temperature versus time. The
line on the graph shows the actual temperature that might be
experienced on the surface of a test board at or near a central
solder joint. The two profiles are based on a high density and
a low density board. The Vitronics SMD310 convection/in-
frared reflow soldering system was used to generate this
profile. The type of solder used was 62/36/2 Tin Lead Silver
with a melting point between 177–189°C. When this type of
furnace is used for solder reflow work, the circuit boards and
solder joints tend to heat first. The components on the board
are then heated by conduction. The circuit board, because it
has a large surface area, absorbs the thermal energy more
efficiently, then distributes this energy to the components.
Because of this effect, the main body of a component may be
up to 30 degrees cooler than the adjacent solder joints.
STEP 1
PREHEAT
ZONE 1
“RAMP”
STEP 2
VENT
“SOAK”
STEP 3
HEATING
ZONES 2 & 5
“RAMP”
STEP 4
HEATING
ZONES 3 & 6
“SOAK”
STEP 5
HEATING
ZONES 4 & 7
“SPIKE”
STEP 6
VENT STEP 7
COOLING
200
°
C
150
°
C
100
°
C
50
°
C
TIME (3 TO 7 MINUTES T OTAL) TMAX
SOLDER IS LIQUID FOR
40 TO 80 SECONDS
(DEPENDING ON
MASS OF ASSEMBLY)
205
°
TO 219
°
C
PEAK AT
SOLDER JOINT
DESIRED CURVE FOR LOW
MASS ASSEMBLIES
100
°
C
150
°
C
160
°
C170
°
C
140
°
C
Figure 12. Typical Solder Heating Profile
DESIRED CURVE FOR HIGH
MASS ASSEMBLIES
MBRV7030CTL
7
Motorola TMOS Power MOSFET Transistor Device Data
PACKAGE DIMENSIONS
CASE 433A–01
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
STYLE 1:
PIN 1. GATE
2. COLLECTOR
3. EMITTER
W
Y
V
P
UFK
N
Q
B
S
D
G
2
4
13
A
2 PL
M
0.13 (0.005) T
SEATING
J
H
X
E
C
PLANE
–T–
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.588 0.592 14.94 15.04
B0.625 0.629 15.88 15.98
C0.196 0.200 4.98 5.08
D0.048 0.052 1.22 1.32
E0.058 0.062 1.47 1.57
F0.078 0.082 1.98 2.08
G4.30 BSC 10.92 BSC
H0.105 0.110 2.67 2.79
J0.018 0.022 0.46 0.56
K0.150 0.160 3.81 4.06
N0.373 0.377 9.47 9.58
P0.070 0.074 1.78 1.88
Q0.054 0.058 1.37 1.47
S0.313 0.317 7.95 8.05
U0.050 ––– 1.27 –––
V0.044 ––– 1.12 –––
W0.066 0.070 1.68 1.78
X0.050 0.060 1.27 1.52
Y0.107 0.111 2.72 2.82
MBRV7030CTL
8Motorola TMOS Power MOSFET Transistor Device Data
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
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MBRV7030CTL/D
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