1
DEMO MANUAL DC2707B
UG-1312 Rev A
DESCRIPTION
LTC4418
Dual Channel Prioritized
PowerPath Controller
Demonstration circuit 2707B uses the LT C
®
4418 to arbi-
trate between two input supply rails, selecting the high-
est priority, valid supply to power the load. The V1 rail is
defined to have higher priority and the V2 rail has lower
priority. Both rails have individual overvoltage and under-
voltage comparators for setting valid window thresholds
with external resistive dividers. If the highest priority rail
voltage V1 falls out of the defined window (overvoltage or
PERFORMANCE SUMMARY
undervoltage), the V2 rail, if it is valid, is enabled and pow-
ers the load. Two or more LTC4418s can be cascaded to
provide switchover between more than two rails.
Design files for this circuit board are available at
http://www.analog.com/DC2707B
Specifications are at TA = 25°C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V1, V2, VOUT V1, V2, VOUT Operating Supply Range 2.5 40 V
VINTVCC VINTVCC Voltage 2.5 3.3 4 V
∆VGOpen Clamp Voltage (VS–VG) VOUT = 11V, G1 = G2 = Open 5.4 6.2 6.7 V
∆VG(SOURCE) Sourcing (VS–VG) Clamp Voltage VOUT = 11V, I = –10µA 5.8 6.6 7 V
∆VG(SINK) Sinking (VS–VG) Clamp Voltage VOUT = 11V, I = 10µA 4.5 5.2 6 V
∆VG(OFF) Gate Off Threshold VS1 = VS2 = 2.8V, VOUT = 11V, Gate Rising 0.2 0.3 0.4 V
IG(DN) Gate Pull-Down Current VG = 3V, VS Floating 28 60 120 mA
VREV Reverse Voltage Threshold Measure (V1 or V2) – VOUT Falling 75 125 185 mV
tG(SWITCHOVER) Break-Before-Make Time VOUT = 11V, CGATE = 10nF 1 2.7 4 µs
tSS Soft-Start Timeout 20 35 70 ms
VEN(TH) EN Threshold Voltage EN Rising 0.6 1 1.4 V
VSHDN(TH) SHDN Threshold Voltage SHDN Rising 0.6 1 1.4 V
VSHDN_EN(HYS) SHDN, EN Threshold Hysteresis 130 mV
ICTRL SHDN, EN Pull-Up Current SHDN = EN = 0V –1.5 –3.2 –5.5 µA
VTH OV/UV Comparator Threshold VOUT = 11V, OV Rising, UV Falling 0.985 1 1.015 V
VHYS(INT) OV/UV Comparator Hysteresis VOUT = 11V, 15 30 45 mV
ILEAK OV/UV Leakage Current OV = 1.015V, UV = 0.985V ±10 nA
ITMR TMR Pull-Up Current
TMR Pull-Down Current
Timer On, VTMRM ≤ 600mV
Timer On, VTMRM ≥ 1.6V
–1
1
–2
2
–3.5
3.5
µA
µA
tVALID OV, UV Validation Time TMR = VINTVCC
CTMR = 1nF
2
9
3.5
16
7
32
µs
ms
V1 Operating Voltage of Channel V1 9.35 12 14.65 V
V2 Operating Voltage of Channel V2 18.45 24 29.4 V
ILOAD Load Current 0 1 A
AVI Auxiliary Voltage Input 6 24 V
External 3.3V Input Voltage Range 3.0 3.3 3.5 V
All registered trademarks and trademarks are the property of their respective owners.
2
DEMO MANUAL DC2707B
UG-1312 Rev A
OVERVIEW
The LTC4418 controls two sets of external back-to-back
P-channel MOSFETs to connect the proper supply rail to
the load. Precision comparators monitor both rails contin-
uously against their OV/UV window. The highest priority
input supply whose voltage is within its OV/UV window for
the adjustable validation time of 15.8ms or 3.5µs (select-
able on the board) is considered valid and connected to
the load. A low signal on the VALID1 and VALID2 pins
indicates validation of the V1 and V2 voltages. Connect-
ing the CAS output to the EN pin on another LTC4418
or LTC4417 increases the number of multiplexed input
supplies. Figure 2 demonstrates cascading prioritized
controllers.
DC2707B is designed to operate from 12V and 24V,
applied to V1 and V2 respectively. The valid range of
both supplies is approximately 20% as set by OV and UV
comparators and their associated resistive dividers. The
board V1 and V2 inputs are protected from positive and
negative glitches with bidirectional TVS diodes that can
continuously tolerate input voltages up to ±30V while the
LTC4418 V1 and V2 pins can tolerate +60V and –42V.
Maximum continuous load current is 2.5A (limited by the
MOSFET), and a maximum pulse drain current of this
MOSFET is30A.
LEDs with accompanying circuitry are included to provide
visual information about the operating status of the rails
V1 and V2. This LED circuit is powered from the 3.3V aux-
iliary rail with two options of getting power: from external
power supply connected directly to auxiliary rail or from
the low dropout linear regulator LT3060 (U5) installed on
the board with the input voltage range 6V to 24V.
One of the rails V1 or V2 can be used to power LT3060
when its voltage is within the LT3060 input voltage range.
The auxiliary 3.3V rail also powers 100kΩ pull-ups for
both VALID pins.
To eliminate back-and-forth switching during switchover,
the LTC4418 provides a fixed 30mV hysteresis in the OV
and UV comparator and an externally adjustable current
mode hysteresis using the OV/UV resistive dividers. The
JP1 (HYS) jumper allows selection of a fixed 30mV or
adjustable hysteresis.
The controller’s “break-before-make” switching method
prevents cross conduction between input channels and
reverse current from the output capacitor into the selected
input supply.
Each channel’s control circuit has a REV comparator that
delays the connection until the output voltage droops
125mV below the input voltage. This prevents reverse
current.
The LTC4418 has two common control pins: EN and
SHDN.
Pulling the EN pin below 1V turns off all external back-to-
back P-channel MOSFETs. When this pin is driven above
1V, the highest priority valid channel is connected to the
load without resetting the adjustable OV/UV timers.
OPERATING PRINCIPLES
Pulling the SHDN pin below 1.0V turns off all external
back-to-back P-channel MOSFETs, placing the controller
in a low current state and resetting the adjustable timers
used to validate the input rail voltages. It requires a timer
interval to validate each rail voltage after the SHDN pin
signal goes high.
To minimize inrush current at start-up, the gate driver soft-
starts the gate drive of the first input to connect to VOUT.
The gate pin is regulated to create an approximately 4V/
ms slew rate on V
OUT
. Logic level P-channel MOSFETs with
a threshold below 1V will result in faster soft-start slew
rate on VOUT. Slew rate control is terminated when any
channel disconnects or a time period of 35ms has elapsed.
Once soft-start has terminated, the gate driver operates
normally. A SHDN low to high transition reactivates soft-
start, provided V
OUT
drops below 2.3V before SHDN is
high. VOUT drooping below 1.7V also reactivates soft-start.
When connecting a high voltage supply to a lower voltage
output, significant inrush current can occur while charg-
ing an output capacitor with low ESR. Inrush current
during a switchover can cause two issues, P-channel
MOSFETs are subjected to damaging power dissipation
3
DEMO MANUAL DC2707B
UG-1312 Rev A
OPERATING PRINCIPLES
and an undesirable UV fault from significant input voltage
droop also known as motorboating.
With the LTC4418, inrush current can be reduced by
slew rate limiting the output voltage. The gate driver can
be configured to slew rate limit the output voltage with
a resistor, capacitor and Schottky diode, as shown in
Figure4 of the data sheet.
The LTC4418 does not actively protect against output
short circuit events and there may be some cases where
the output short may cause the MOSFET to fail.
TURRETS
V1 (12V): 12V supply input, do not exceed +30V or –30V
due to protection TVS present on the board.
V2 (24V): 24V supply input, do not exceed +30V or –30V
due to protection TVS present on the board.
GND: Adjacent ground connection for input supplies and
for load.
VOUT: Output for the load. Designed for 2.5A maximum
continuous current (with component selected).
6V to 24V: Auxiliary voltage input (AVI) converted by an
LDO U5 to 3.3V for LEDs, logic, and pull-ups.
3.3V: 3.3V output provided by U5 or by external supply.
Each of the following turrets is directly connected to the
LTC4418 pin of the same name:
VALID1: Pulled up with 100kΩ to auxiliary 3.3V supply.
VALID2: Pulled up with 100kΩ to auxiliary 3.3V supply.
EN: Pulled up by internal 3.2µA to INTVCC or by 10kΩ to
external 3.3V.
SHDN: Pulled up by internal 3.2µA to INTVCC or by 100kΩ
to external 3.3V.
CAS: Used to cascade a second LTC4418 or LTC4417.
Connect the CAS turret of the high priority LTC4418 to
the EN pin of the lower priority LTC4418.
JUMPERS
JP1, HYS: Add 30mV fixed hysteresis to the OV and UV
comparators or 3% referred to actual supply input. In the
RHYS position input referred hysteresis is set to 0.25V as
controlled by R15. Default position is 30mV.
Note: Be careful when changing hysteresis. It affects the
risk of motorboating.
JP2, EN: Controls EN pin. Default position (EXT+3.3V)
connects EN to the auxiliary 3.3V supply. Changing the
jumper position connects EN to GND.
JP3, SHDN: Controls SHDN pin. Default position
(EXT+3.3V) connects SHDN to the auxiliary 3.3V supply.
Changing the jumper position connects SHDN to GND. Do
not change the JP3 position on the fly.
JP4, VALIDATION TIME: Allows to set 3.5µs or 15.8ms
validation time. Default position is 3.5µs.
D6: Indicates power present at VOUT.
D7: Indicates power being taken from V1.
D8: Indicates power being taken from V2.
LEDS
D9: Indicates validation of V1.
D10: Indicates validation of V2.
D11: Indicates auxiliary 3.3V supply.
4
DEMO MANUAL DC2707B
UG-1312 Rev A
QUICK START PROCEDURE
Refer to Figure 1 for proper measurement equipment
setup and follow the procedure below:
1. Disconnect both power supply inputs from the board.
2. Connect the auxiliary power source (6V to 24V) to the
DC2707B. The green LED (LDO-D11) lights up, indicat-
ing the presence of auxiliary 3.3V supply for powering
logic.
3. With power off, connect two power supplies with output
voltage 12V and 24V to the corresponding DC2707B
turrets or banana jacks V1 (+12V), V2 (+24V) and GND.
4. Connect 10Ω load resistor (100W) to the DC2707B
output turret or banana jack (VOUT).
5. Verify correct jumper setting for validation time (3.5µs
default), HYS (RHYS default), EN (EXT+3.3V) and
SHDN (EXT+3.3V).
6. Turn on power supplies and observe the transient of
powering a load from V1 = 12V.
7. The prioritizing function is demonstrated by simply
turning off the V1 supply. The output will be powered
from the remaining supply V2. V1 can be adjusted up
and down beyond ±20% to invalidate the V1 input and
observe the transient from V2 to V1 and vice versa.
RESISTIVE
LOAD
12V
POWER
SUPPLY
24V
POWER
SUPPLY
DC2707 F01
Figure 1. Proper Measurement Equipment Setup
5
DEMO MANUAL DC2707B
UG-1312 Rev A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
QUICK START PROCEDURE
M3
M4
LTC4418
MASTER
VS2
G2
VOUT
CAS
EN
SHDN
2 SUPPLIES
MASTER
2ND PRIORITY
SUPPLY
M1
M2
VS1
G1
+
VOUT
COUT
M7
M8
LTC4418
SLAVE
VS2
G2
VOUT
CAS
EN
SHDN
2 SUPPLIES
SLAVE
3RD PRIORITY
SUPPLY
4TH PRIORITY
SUPPLY
M5
M6
VS1
G1
M13
M14
LTC4417
SLAVE
VS3
G3
VOUT
CAS
DC2707A F02
EN
SHDN
3 SUPPLIES
SLAVE
5TH PRIORITY
SUPPLY
6TH PRIORITY
SUPPLY
7TH PRIORITY
SUPPLY
M11
M12
VS2
G2
VS1
G1
M9
M10
Figure 2. Cascading LTC4418s and LTC4417
6
DEMO MANUAL DC2707B
UG-1312 Rev A
UG16893-0-6/18(A)
www.analog.com
ANALOG DEVICES, INC. 2017
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circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
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