1
Rev 0
DEMO MANUAL DC1685A
DESCRIPTION
LTC6417 and LTC2209
Combo Board
Demonstration circuit 1685A features the LT C
®
6417, a
1.6GHz differential ADC buffer driving the LTC2209, a 16-bit
160Msps ADC. The DC1685B is supplied with a bandpass
filter centered at 140MHz between the buffer and ADC.
The filter center frequency can be changed to optimize
performance at different analog input frequencies. Both
single-ended and differential configurations are supported
QUICK START PROCEDURE
at the inputs. The DC1685A has been developed from the
DC1281A, used to characterize LTC2209 family of ADCs.
Use the DC1685A with a DC890 FastDAACS and PScope™
Software to collect time and frequency data.
Design files for this circuit board are available.
DC1685A is easy to set up. Refer to Figure 1 for proper
measurement equipment setup and follow the procedure
below:
1. Apply power to the DC1685A 3.3V across the pins
marked VCC and PWR_GND and 5V across AMP_POWER
and PWR_GND. The DC1685A requires up to 800mA
from the VCC, and 200mA from the AMP_POWER.
2. Supply power to the DC890B fast DAACS board with an
external 6V ±0.5V, 1A on turrets G7(+) and G1(–) or the
adjacent 2.1mm power jack. Unless the DC890B detects
external power, it will not activate the LVDS mode of the
Xilinx Spartan-III FPGA. The FPGA actively terminates
the LVDS repeaters at the outputs of the LTC2209.
3. Connect encode clock to the DC1685A on the SMA
connector marked (J3) Encode Clock. This transformer
coupled input is terminated with a 100Ω at the ADC
clock inputs. For best noise performance the clock input
must be driven with a very low jitter source. When us-
ing a sinusoidal generator, the amplitude should be as
large as possible, up to 13dBm. Using bandpass filters
on the clock and analog inputs will improve the noise
performance by reducing the wideband noise power of
the signals. Data sheet FFT plots are taken with 10 pole
LC filters made by TTE (Los Angeles, CA) to suppress
signal generator harmonics, non-harmonically related
spurs and broadband noise. Low phase noise (jitter)
Agilent 8644B generators are used with the TTE band-
pass filters for the clock and analog input.
4. Connect the analog input to the DC1685A to the SMA
connector marked (J6) IN+ at 140MHz. This input is
capacitively coupled to a 1:4 balun transformer WBC4-11.
5. Start and configure PScope data collection software for
the FastDAACS (DC890) by selecting AutoConfigure.
If the board is not detected, update PScope for latest
software and device list, and then select LTC2209 from
the Configure → Device menu. You can also manually
configure PScope for the LTC2209 by setting the pa-
rameters listed in Table 1.
6. Collect data by clicking on the Collect button. Time and
frequency plots will be displayed in the PScope window.
Consult the DC890B Quick Start Guide for more details.
This procedure contains only one critical sequence.
The user must apply supply voltage before applying
signal power to the analog and clock inputs or forc-
ing a voltage to any other turrets. The user must also
remove the signal to the analog and clock inputs and
voltages on any other turret before turning down the
supply voltage.
All registered trademarks and trademarks are the property of their respective owners.
2
Rev 0
DEMO MANUAL DC1685A
QUICK START PROCEDURE
Table 2 summarizes the function of each SMA connector and
jumper on the board and their suggested default settings.
Table 1. PScope User Configuration for LTC2209.
USER CONFIGURE
Bits 16
Channels 1
Alignment 16
FPGA Ld LVDS
Bipolar [x]
Positive Edge Clk [x]
Table 2. DC1685A Connector and Jumpers
CONNECTOR/
JUMPER FUNCTION
J2 (MODE) ADC Output Format and Clock Duty Stabilizer CDS.
Default to VCC for twos complement and CDS off.
J3 (SHDN) ADC Power Shutdown. Default to RUN.
J3 (DITH) ADC Internal Dither Enable. Default to OFF to disable
internal dither.
J4 (PGA) ADC Programmable Gain Amplifier. Default to 1×
gain mode.
J5 (IN–) Differential Input. Not connected by default. Install
capacitor C9 to drive the input differentially.
J6 (IN+) Differential Input. Connected to input balun for
single-ended operation. Drive from a 50Ω signal
source. No external termination needed.
J7 (ENCODE
CLOCK)
Single-Ended Input. Drive with a 13dBm low jitter
50Ω source.
J11 (OR) Overrange Output. Connect to an oscilloscope input.
Buffer ADC Interface
The LTC6417 has been specifically designed to interface
directly with high speed A/D converters. In Figure 2, the
differential LTC6417 outputs are bandpass filtered to drive
the differential inputs of the LTC2209. Such a filter sup-
presses harmonics and limits the wideband noise of the
amplifier to achieve the best SFDR and SNR. Table 3 lists
component values suggested for bandpass filters optimized
for various input frequencies. The 1:4 transformer at the
input of the LTC6417 performs a single-ended to differential
conversion and provides 6dB voltage gain.
For more detail on the LTC6417 and LTC2209, consult
the data sheets.
Table 3. Bandpass Filter Component Values for Various Input
Frequencies
INPUT FREQUENCIES
COMPONENTS 70MHz 140MHz 270MHz 380MHz
R12 = R36 [Ω] 60.4 60.4 60.4 60.4
C43 = C44 [pF] 56 27 15 12
E1 = E2 [nH] 100 51 27 18
C41 [pF] 47 12 12 10
C10 = C40 [pF] 13 12 33 2.7
E5 [nH] 100 51 27 18
R42 = R43 [Ω] 300 300 300 300
R53 [Ω] 120 120 120 120
C45 = C46 [pF] 39 18 10 8.2
E3 = E4 [nH] 150 75 39 27
4
Rev 0
DEMO MANUAL DC1685A
PARTS LIST
ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER
1 3 B1, B4, B5 Ferrite Bead, SMT 1206 MURATA, BLM31PG330SN1L
2 3 C1, C2, C3 Cap., X7R 0.01µF 100V 10% 0603 AVX, 06031C103KAT2A
3 1 C4 Cap., NPO 8.2pF 50V 0.25pF 0402 AVX, 04025A8R2CAT2A
4 26 C5, C7, C8, C11, C12, C15, C16, C20–C23,
C25–C37, C39, C42
Cap., X5R 0.1µF 10V 10% 0402 AVX, 0402ZD104KAT2A
5 3 C6, C9, C48 Cap., X7R 0.1µF 25V 10% 0603 AVX, 06033C104KAT2A
6 3 C10, C40, C41 Cap., X7R 12pF 25V 10% 0402 AVX, 04023C120KAT2A
7 2 C13, C17 Cap., X5R 2.2µF 10V 20% 0603 AVX, 0603ZD225MAT2A
8 3 C14, C24, C38 Cap., X5R 4.7µF 10V 20% 0805 AVX, 0805ZD475MAT2A
9 0 C18, C19 (OPT) Cap., 0402, OPT
10
11 2 C43, C44 Cap., NPO 27pF 25V 10% 0402 AVX, 04023A270KAT2A
12 2 C45, C46 Cap., NPO 18pF 25V 10% 0402 AVX, 04023A180KAT2A
13 0 C47, C49 (OPT) Cap., 0603 OPT
14 3 E1, E2, E5 Ceramic Chip Inductor, 51nH, 0603 Coilcraft, 0603HP_51NXGLU
15 2 E3, E4 Ceramic Chip Inductor, 75nH, 0603 Coilcraft, 0603HP_75NXGLU
16
17 4 J2, J3, J4, J9 Headers, Dbl. Row 2 × 3 2mm Ctrs. Samtec, TMM-103-02-L-D
18 5 XJ2, XJ3_3-5, XJ3_4-6, XJ4_3-5, XJ4_4-6 Shunt, 2mm Ctrs. Samtec, 2SN-BK-G
19 4 J5, J6, J7, J11 Conn., SMA 50Ω EMERSON, 142-0701-851
20 0 J10 EDGE-CON-100
21 4 R1, R2, R9, R10 Res., Chip 49.9Ω 0.06W 1% 0402 YAGEO, RC0402FR-0749R9L
22 0 R3 (OPT) Res., 0603 OPT
23 2 R4, R5 Res., Chip 5.11Ω 0.06W 1% 0402 VISHAY, CRCW04025R11FKED
24 3 R6, R7, R8 Res., Chip 1.00k 0.06W 1% 0603 YAGEO, RC0603FR-071KL
25 5 R11, R44, R45, R55, R56 Res., Chip 0Ω 0402 VISHAY, CRCW04020000Z0ED
26 1 R12 Res., Chip 82Ω 0.06W 1% 0402 Vishay, CRCW040282R0FKED
27 19 R13, R16–R23, R30–R35, R38–R41 Res., Chip 100Ω 0.05W 5% 0201 YAGEO, RC0201JR-07100RL
28 1 R14 Res., Chip 1.00k 0.06W 1% 0402 YAGEO, RC0402FR-071KL
29 1 R15 Res., Chip 100Ω 0.06W 5% 0402 VISHAY, CRCW0402100RFKED
30 1 R24 Res., Chip 100k 0.06W 5% 0402 VISHAY, CRCW0402100KJNED
31 3 R25, R26, R29 Res., Chip 4.99k 0.06W 1% 0402 VISHAY, CRCW04024K99FKED
32 2 R27, R28 Res., Chip 10Ω 0.05W 5% 0201 VISHAY, CRCW020110R0JNED
33 1 R36 Res., Chip 60.4Ω 0.06W 1% 0402 VISHAY, CRCW040260R4FKED
34 1 R37 Res., Chip 100Ω 0.06W 1% 0603 Vishay, CRCW0603100RFKEA
35 2 R42,R43 Res., Chip 300Ω 0.06W 5% 0402 NIC, NRC04F3000TRF
36 0 R49 (OPT) Res., 0402 OPT
37 1 R53 Res., Chip 120Ω 0.06W 5% 0402 YAGEO, RC0402JR-07120RL
38 6 TP1, TP2, TP4, TP5, TP6, TP7 Turret, Testpoint Mill Max, 2308-2-00-80-00-00-07-0
39 1 T2 XFMR 1 : 4 COILCRAFT, WBC4-14LB
40 1 T3 XFMR MACOM/SM-22 M/A-COM, MABA-007159-000000
5
Rev 0
DEMO MANUAL DC1685A
PARTS LIST
ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER
41 1 U1 I.C., Serial EEPROM TSSOP-8 MICROCHIP, 24LC025-I/ST
42 1 U2 I.C., 16-Bit, 160Msps ADC QFN(64) (UP)
9mm × 9mm
ANALOG DEVICES, LTC2209CUP#PBF
43 2 U3, U4 I.C., LVDS 8-Port, Hi speed Repeater
TSSOP48 6.1mm Wide
FAIRCHILD, FIN1108MTD
44 1 U5 I.C. BUFFER-LVDS-SINGLE US8 FAIRCHILD, FIN1101K8X
45 1 U6 I.C., ADC Buffer QFN(20) (UDC)
3mm × 4mm
ANALOG DEVICES, LTC6417CUDC#PBF
46 4 MTGS at 4 Corners STANDOFF, NYLON .5 1/2" KEYSTONE, 8833(SNAP-ON)
6
Rev 0
DEMO MANUAL DC1685A
Figure 2a. DC1685A Demo Circuit Schematic
SCHEMATIC DIAGRAM
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TECHNOLOGY
TECHNOLOGY
TECHNOLOGY
7
Rev 0
DEMO MANUAL DC1685A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
SCHEMATIC DIAGRAM
Figure 2b. DC1685A Demo Circuit Schematic
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
TECHNOLOGY
TECHNOLOGY
TECHNOLOGY
8
Rev 0
DEMO MANUAL DC1685A
ANALOG DEVICES, INC. 2019
01/19
www.analog.com
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and
conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation
Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”)
and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to
Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and
agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted
is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third
Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is
NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all
be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of
use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile
or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited
to soldering or any other activity that affects the material content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS
Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF
LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY
DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS
LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING
BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE
HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States
federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts
(excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits
to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed.
