February 1996
NDS9943
Dual N & P-Channel Enhancement Mode Field Effect Transistor
General Description Features
_________________________________________________________________________________
Absolute Maximum Ratings TA= 25°C unless otherwise noted
Symbol Parameter N-Channel P-Channel Units
VDSS Drain-Source Voltage 20 -20 V
VGSS Gate-Source Voltage ± 20 ± 20 V
IDDrain Current - Continuous TA = 25°C (Note 1a) ± 3.0 ± 2.8 A
- Continuous TA = 70°C (Note 1a) ± 2.5 ± 2.3
- Pulsed TA = 25°C ± 10 ± 10
PDPower Dissipation for Dual Operation 2W
Power Dissipation for Single Operation (Note 1a) 1.6
(Note 1b) 1
(Note 1c) 0.9
TJ,TSTG Operating and Storage Temperature Range -55 to 150 °C
THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
RθJC Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W
NDS9943.SAM
These dual N- and P-Channel enhancement mode power
field effect transistors are produced using National's
proprietary, high cell density, DMOS technology. This very
high density process is especially tailored to minimize
on-state resistance, provide superior switching performance,
and withstand high energy pulses in the avalanche and
commutation modes. These devices are particularly suited for
low voltage applications such as notebook computer power
management and other battery powered circuits where fast
switching, low in-line power loss, and resistance to transients
are needed.
N-Channel 3.0A, 20V, RDS(ON)=0.125Ω @ VGS=10V
P-Channel -2.8A, -25V, RDS(ON)=0.16Ω @ VGS=-10V.
High density cell design or extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
Dual (N & P-Channel) MOSFET in surface mount package.
1
5
6
7
8
4
3
2
N