DATA SH EET
Product specification
File under Integrated Circuits, IC06 1999 May 19
INTEGRATED CIRCUITS
74AHC1GU04
Inverter
1999 May 19 2
Philips Semiconductors Product specification
Inverter 74AHC1GU04
FEATURES
•Symmetrical output impedance
•High noise immunity
•ESD protection:
HBM EIA/JESD22-A114-A
exceeds 2000 V;
MM EIA/JESD22-A115-A
exceeds 200 V
•Low power dissipation
•Balanced propagation delays
•Very small 5-pin package
•Output capability: standard.
DESCRIPTION
The 74AHC1GU04 is a high-speed
Si-gate CMOS device.
The 74AHC1GU04 provides the
inverting single stage function.
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
L = LOW voltage level.
INPUT OUTPUT
inA outY
LH
HL
QUICK REFERENCE DATA
GND = 0 V; Tamb =25°C; tr=t
f≤3.0 ns.
Notes
1. CPD is used to determine the dynamic power dissipation (PDin µW).
PD=C
PD ×VCC2×fi+(C
L×V
CC2×fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
2. The condition is VI= GND to VCC.
PINNING
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
tPHL/tPLH propagation delay
inA to outY CL= 15 pF; VCC = 5 V 2.6 ns
CIinput capacitance 3 pF
CPD power dissipation
capacitance notes 1 and 2 14 pF
PIN SYMBOL DESCRIPTION
1 n.c. not connected
2 inA data input
3 GND ground (0 V)
4 outY data output
5V
CC DC supply voltage
ORDERING INFORMATION
TYPE NUMBER PACKAGES
TEMPERATURE
RANGE PINS PACKAGE MATERIAL CODE MARKING
74AHC1GU04GW −40 to +85 °C 5 SC-88A plastic SOT353 AD
1999 May 19 3
Philips Semiconductors Product specification
Inverter 74AHC1GU04
Fig.1 Pin configuration.
handbook, halfpage
1
2
3
5
4
MNA042
U04
VCC
inA
outY
GND
n.c.
Fig.2 Logic symbol.
handbook, halfpage
MNA043
inA outY
24
Fig.3 IEC logic symbol.
handbook, halfpage
214
MNA044
Fig.4 Logic diagram.
handbook, halfpage
MNA045
inA outY
1999 May 19 4
Philips Semiconductors Product specification
Inverter 74AHC1GU04
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V).
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Above 55 °C the value of PD derates linearly with 2.5 mW/K.
SYMBOL PARAMETER CONDITIONS 74AHC1G UNIT
MIN. TYP. MAX.
VCC DC supply voltage 2.0 5.0 5.5 V
VIinput voltage 0 −5.5 V
VOoutput voltage 0 −VCC V
Tamb operating ambient
temperature range see DC and AC
characteristics per device −40 +25 +85 °C
tr, tf (∆t/∆f) input rise and fall times except
for Schmitt-trigger inputs VCC = 3.3 V ±0.3 V −−100 ns/V
VCC =5V±0.5 V −−20
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCC DC supply voltage −0.5 +7.0 V
VIinput voltage range −0.5 +7.0 V
IIK DC input diode current VI<−0.5 −−20 mA
IOK DC output diode current VO<−0.5 or VO>V
CC + 0.5 V; note 1 −±20 mA
IODC output source or sink current −0.5 V < VO<V
CC + 0.5 V −±25 mA
ICC DC VCC or GND current −±75 mA
Tstg storage temperature −65 +150 °C
PDpower dissipation per package temperature range: −40 to +85 °C; note 2 −200 mW
1999 May 19 5
Philips Semiconductors Product specification
Inverter 74AHC1GU04
DC CHARACTERISTICS
Over recommended operating conditions; voltage are referenced to GND (ground = 0 V).
SYMBOL PARAMETER
TEST CONDITIONS Tamb (°C)
UNIT
OTHER VCC (V) +25 −40 to +85
MIN. TYP. MAX. MIN. MAX.
VIH HIGH-level input
voltage 2.0 1.7 −−1.7 −V
3.0 2.4 −−2.4 −
5.5 4.4 −−4.4 −
VIL LOW-level input voltage 2.0 −− 0.3 −0.3 V
3.0 −− 0.6 −0.6
5.5 −− 1.1 −1.1
VOH HIGH-level output
voltage; all outputs VI=V
IH or VIL;
IO=−50 µA2.0 1.9 2.0 −1.9 −V
3.0 2.9 3.0 −2.9 −
4.5 4.4 4.5 −4.4 −
HIGH-level output
voltage VI=V
IH or VIL;
IO=−4.0 mA 3.0 2.58 −−2.48 −V
VI=V
IH or VIL;
IO=−8.0 mA 4.5 3.94 −−3.8 −
VOL LOW-level output
voltage; all outputs VI=V
IH or VIL;
IO=50µA2.0 −0 0.1 −0.1 V
3.0 −0 0.1 −0.1
4.5 −0 0.1 −0.1
LOW-level output
voltage VI=V
IH or VIL;
IO=4mA 3.0 −− 0.36 −0.44 V
VI=V
IH or VIL;
IO=8mA 4.5 −− 0.36 −0.44
IIinput leakage current VI=V
CC or GND 5.5 −− 0.1 −1.0 µA
ICC quiescent supply
current VI=V
CC or GND;
IO=0 5.5 −− 1.0 −10 µA
CIinput capacitance −3−−10 pF
1999 May 19 6
Philips Semiconductors Product specification
Inverter 74AHC1GU04
AC CHARACTERISTICS
Type 74AHC1GU04
GND = 0 V; tr=t
f≤3.0 ns.
Notes
1. Typical values at VCC = 3.3 V.
2. Typical values at VCC = 5.0 V.
SYMBOL PARAMETER
TEST CONDITIONS Tamb (°C)
UNIT
WAVEFORMS CLVCC (V) +25 −40 to +85
MIN. TYP. MAX. MIN. MAX.
tPHL/tPLH propagation delay
inA to outY see Figs 5 and 6 15 pF 3.0 to 3.6 −3.4(1) 7.1 1.0 8.5 ns
tPHL/tPLH propagation delay
inA to outY see Figs 5 and 6 50 pF 3.0 to 3.6 −4.9(1) 10.6 1.0 12.0 ns
tPHL/tPLH propagation delay
inA to outY see Figs 5 and 6 15 pF 4.5 to 5.5 −2.6(2) 5.5 1.0 6.0 ns
tPHL/tPLH propagation delay
inA to outY see Figs 5 and 6 50 pF 4.5 to 5.5 −3.6(2) 7.0 1.0 8.0 ns
AC WAVEFORMS
Fig.5 The input (inA) to output (outY) propagation
delays.
handbook, halfpage
MNA046
inA INPUT
outY OUTPUT
tPHL tPLH
VM(1)
VM(1)
(1) VM= 50%; VI= GND to VCC.
Fig.6 Load circuitry for switching times.
Definitions for test circuit:
CL= Load capacitance including jig and probe capacitance. (See
Chapter “AC characteristics” for values).
RT= Termination resistance should be equal to the output
impedance ZO of the pulse generator.
handbook, halfpage
VCC
VIVO
MNA034
D.U.T.
CL50 pF
RT
PULSE
GENERATOR
1999 May 19 7
Philips Semiconductors Product specification
Inverter 74AHC1GU04
TYPICAL TRANSFER CHARACTERISTICS
Fig.7 VCC = 2.0 V; IO=0.
handbook, halfpage
2.00.4 0.8 1.2 1.6
0
1.0
0
0.6
0.2
0.8
0.4
2.0
0
1.2
0.4
1.6
0.8
MNA397
VO
(V) ICC
(mA)
VI (V)
VO
ID (drain current)
Fig.8 VCC = 3.0 V; IO=0.
handbook, halfpage
01 3
3.0
0
MNA398
2
1.5
10
0
6
2
8
4
VO
(V)
ICC
(mA)
VO
ID (drain current)
VI (V)
Fig.9 VCC = 5.5 V; IO=0.
handbook, halfpage
02 6
6
0
3
50
0
30
10
40
20
MNA399
4
VO
(V) VO
ICC
(mA)
VI (V)
ID (drain current)
Fig.10 Test set-up for measuring forward
transconductance gfs =∆IO/∆VI at VO is
constant.
handbook, halfpage
MNA050
VCC
Rbias = 560 kΩ
input
0.47 µF100 µF
output
A
GND
IO
VI
(f = 1 kHz)
1999 May 19 8
Philips Semiconductors Product specification
Inverter 74AHC1GU04
Fig.11 Typical forward transconductance gfs as a
function of the supply voltage at
Tamb =25°C.
handbook, halfpage
0246
40
30
10
0
20
MNA400
VCC (V)
gfs
(mA/V)
APPLICATION INFORMATION
Some applications for the HC1GU04 are:
•Linear amplifier (see Fig.12)
•In crystal oscillator design (see Fig.13).
Note to the application information.
All values given are typical unless otherwise specified.
handbook, halfpage
U04
R1
R2
VCC
ZL
MNA052
1 µF
GND
Fig.12 Used as a linear amplifier.
ZL>10kΩ; AOL = 20 (typical)
;
R1 ≥3kΩ,R2≤1MΩ.
Typical unity gain bandwidth product is 5 MHz.
C1 see Fig.13.
AOL = open loop amplification.
Au= voltage amplification.
AuAOL
1R1
R2
-------- 1A
OL )+(+
------------------------------------------------
–=
V0 max (p-p) VCC 1.5 V centered at 1
2
--- VCC
–≈
Fig.13 Crystal oscillator configuration.
C1 = 47 pF (typical).
C2 = 22 pF (typical).
R1 = 1 to 10 MΩ (typical).
R2 optimum value depends on the frequency and required stability
against changes in VCC or average minimum ICC (ICC is typically
2 mA at VCC = 3 V and f = 1 MHz).
handbook, halfpage
MNA053
U04
out
R2
R1
C1 C2
1999 May 19 9
Philips Semiconductors Product specification
Inverter 74AHC1GU04
External components for resonator (f < 1 MHz)
Where:
All values given are typical and must be used as an initial
set-up.
FREQUENCY
(kHz) R1 (MΩ) R2 (kΩ) C1 (pF) C2 (pF)
10 to 15.9 22 220 56 20
16 to 24.9 22 220 56 10
25 to 54.9 22 100 56 10
55 to 129.9 22 100 47 5
130 to 199.9 22 47 47 5
200 to 349.9 22 47 47 5
350 to 600 22 47 47 5
Optimum value for R2
FREQUENCY
(kHz) R2 (kΩ) OPTIMUM FOR
32.0 minimum required ICC
8.0 minimum influence due to
change in VCC
61.0 minimum required ICC
4.7 minimum influence by VCC
10 0.5 minimum required ICC
2.0 minimum influence by VCC
14 0.5 minimum required ICC
1.0 minimum influence by VCC
>14 replace R2 by C3 with a typical value
of 35 pF
1999 May 19 10
Philips Semiconductors Product specification
Inverter 74AHC1GU04
PACKAGE OUTLINE
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
SOT353
wBM
b
p
D
e
1
e
A
A
1
L
p
Q
detail X
HE
E
vMA
AB
y
0 1 2 mm
scale
c
X
132
45
Plastic surface mounted package; 5 leads SOT353
UNIT A1
max bpcD
E (2) e1HELpQywv
mm 0.1 0.30
0.20 2.2
1.8
0.25
0.10 1.35
1.15 0.65
e
1.3 2.2
2.0 0.2 0.10.2
DIMENSIONS (mm are the original dimensions)
0.45
0.15 0.25
0.15
A
1.1
0.8
97-02-28SC-88A
1999 May 19 11
Philips Semiconductors Product specification
Inverter 74AHC1GU04
SOLDERING
Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our
“Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Wave soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
•Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
•For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
•For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Manual soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
1999 May 19 12
Philips Semiconductors Product specification
Inverter 74AHC1GU04
Suitability of surface mount IC packages for wave and reflow soldering methods
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the
“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”
.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
DEFINITIONS
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
PACKAGE SOLDERING METHOD
WAVE REFLOW(1)
BGA, SQFP not suitable suitable
HLQFP, HSQFP, HSOP, SMS not suitable(2) suitable
PLCC(3), SO, SOJ suitable suitable
LQFP, QFP, TQFP not recommended(3)(4) suitable
SSOP, TSSOP, VSO not recommended(5) suitable
Data sheet status
Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
1999 May 19 13
Philips Semiconductors Product specification
Inverter 74AHC1GU04
NOTES
1999 May 19 14
Philips Semiconductors Product specification
Inverter 74AHC1GU04
NOTES
1999 May 19 15
Philips Semiconductors Product specification
Inverter 74AHC1GU04
NOTES
© Philips Electronics N.V. SCA
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Internet: http://www.semiconductors.philips.com
1999 64
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Printed in The Netherlands 245002/00/01/pp16 Date of release: 1999 May 19 Document order number: 9397 750 05742
