Data Sheet, Aug. 2010 Control Integrated POwer System (CIPOSTM) IGCM10F60GA http://www.lspst.com For Power Management Application CIPOSTM IGCM10F60GA Revision History: Previous Version: Page 11 2010-08 Ver.1.1 Datasheet Ver. 1.0 Subjects (major changes since last revision) tFLTCLR Authors: Junho Song, Junbae Lee and Daewoong Chung Edition 2010-07 Published by LS Power Semitech Co., Ltd. Seoul, Korea (c) LS Power Semitech Co., Ltd. All Rights Reserved. Attention please! The information given in this data sheet shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, LS Power Semitech Co., Ltd. hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices please contact your nearest LS Power Semitech Co., Ltd. office or representatives (http://www.lspst.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest LS Power Semitech Co., Ltd. office or representatives. LS Power Semitech Co., Ltd. components may only be used in life-support devices or systems with the express written approval LS Power Semitech Co., Ltd., if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Data Sheet 2/14 Aug. 2010 CIPOSTM IGCM10F60GA Table of Contents CIPOSTM Control Integrated POwer System.................................................................................................. 4 Features ........................................................................................................................................................ 4 Target Applications ..................................................................................................................................... 4 Description ................................................................................................................................................... 4 System Configuration ................................................................................................................................. 4 Pin Configuration .............................................................................................................................................. 5 Internal Electrical Schematic ........................................................................................................................... 5 Pin Assignment ................................................................................................................................................. 6 Pin Description ............................................................................................................................................ 6 HIN(U,V,W) and LIN(U,V,W) (Low side and high side control pins, Pin 7 - 12) ..........................................6 VFO (Fault-output and NTC, Pin 14) ...........................................................................................................7 ITRIP (Over current detection function, Pin 15) ..........................................................................................7 VDD, VSS (Low side control supply and reference, Pin 13, 16) ..................................................................7 VB(U,V,W) and VS(U,V,W) (High side supplies, Pin 1, 2, 3, 4, 5, 6) ..........................................................7 NU, NV, NW (Low side emitter, Pin 17, 18, 19) ..........................................................................................7 P (Positive bus input voltage, Pin 23) ..........................................................................................................7 Absolute Maximum Ratings ............................................................................................................................. 8 Module Section ............................................................................................................................................ 8 RC-IGBT Section .......................................................................................................................................... 8 Control Section ............................................................................................................................................ 8 Recommended Operation Conditions ............................................................................................................ 9 Static Parameters............................................................................................................................................ 10 Dynamic Parameters ...................................................................................................................................... 11 Bootstrap Parameters .................................................................................................................................... 11 Thermistor ...................................................................................................................................................... 12 Mechanical Characteristics and Ratings ...................................................................................................... 12 Circuit of a Typical Application ..................................................................................................................... 13 Switching Times Definition ............................................................................................................................ 13 Package Outline .............................................................................................................................................. 14 Data Sheet 3/14 Aug. 2010 CIPOSTM IGCM10F60GA CIPOSTM Control Integrated POwer System Dual In-Line Intelligent Power Module 3-bridge 600V / 10A Description Features Fully isolated Dual In-Line molded module Infineon reverse conducting IGBTs with monolithic body diode Rugged SOI gate driver technology with stability against transient and negative voltage Allowable negative VS potential up to -11V for signal transmission at VBS=15V Integrated bootstrap functionality Over current shutdown Temperature monitor Under-voltage lockout at all channels Low side emitter pins accessible for all phase The CIPOSTM module family offers the chance for integrating various power and control components to increase reliability, optimize PCB size and system costs. It is designed to control three phase AC motors and permanent magnet motors in variable speed drives for applications like air conditioning, refrigerator and washing machine. The package concept is specially adapted to power applications, which need good thermal conduction and electrical isolation, but also EMI-save control and overload protection. The features of Infineon reverse conducting IGBT are combined with an optimized SOI gate driver for excellent electrical performance. current monitoring (open emitter) Cross-conduction prevention System Configuration All of 6 switches turn off during protection 3 half bridges with reverse conducting IGBT Minimum deadtime built in driver IC 3 SOI gate driver Lead-free terminal plating; RoHS compliant Thermistor Pin-to-heasink creepage distance typ. 1.6mm Target Applications Dish washers Refrigerators Washing machines Air-conditioners Fans Low power motor drives Data Sheet 4/14 Aug. 2010 CIPOSTM IGCM10F60GA Pin Configuration Bottom View (24) NC (1) VS(U) (2) VB(U) (23) P (3) VS(V) (4) VB(V) (22) U (5) VS(W) (6) VB(W) (21) V (7) HIN(U) (8) HIN(V) (9) HIN(W) (10) LIN(U) (11) LIN(V) (12) LIN(W) (13) VDD (14) VFO (15) ITRIP (16) VSS (20) W (19) NU (18) NV (17) NW Figure 1: Pin configuration Internal Electrical Schematic NC (24) P (23) (1) VS(U) (2) VB(U) VB1 HO1 RBS1 VS1 U (22) (3) VS(V) (4) VB(V) VB2 RBS2 HO2 VS2 V (21) (5) VS(W) (6) VB(W) VB3 RBS3 (7) HIN(U) HIN1 (8) HIN(V) HIN2 (9) HIN(W) (10) LIN(U) HIN3 LIN1 (11) LIN(V) LIN2 (12) LIN(W) LIN3 (13) VDD VDD (14) VFO VFO (15) ITRIP ITRIP (16) VSS HO3 VS3 W (20) LO1 NU (19) LO2 NV (18) LO3 VSS NW (17) Thermistor Figure 2: Internal schematic Data Sheet 5/14 Aug. 2010 CIPOSTM IGCM10F60GA Pin Assignment Pin Number Pin Name Pin Description 1 VS(U) U-phase high side floating IC supply offset voltage 2 VB(U) U-phase high side floating IC supply voltage 3 VS(V) V-phase high side floating IC supply offset voltage 4 VB(V) V-phase high side floating IC supply voltage 5 VS(W) W-phase high side floating IC supply offset voltage 6 VB(W) W-phase high side floating IC supply voltage 7 HIN(U) U-phase high side gate driver input 8 HIN(V) V-phase high side gate driver input 9 HIN(W) W-phase high side gate driver input 10 LIN(U) U-phase low side gate driver input 11 LIN(V) V-phase low side gate driver input 12 LIN(W) W-phase low side gate driver input 13 VDD Low side control supply 14 VFO Fault output / Temperature monitor 15 ITRIP Over current shutdown input 16 VSS Low side control negative supply 17 NW W-phase low side emitter 18 NV V-phase low side emitter 19 NU U-phase low side emitter 20 W Motor W-phase output 21 V Motor V-phase output 22 U Motor U-phase output 23 P Positive bus input voltage 24 NC No Connection Pin Description Schmitt-Trigger HIN(U,V,W) and LIN(U,V,W) (Low side and high side control pins, Pin 7 - 12) These pins are positive logic and they are responsible for the control of the integrated IGBT. The Schmitt-trigger input threshold of them are such to guarantee LSTTL and CMOS compatibility down to 3.3V controller outputs. Pull-down resistor of about 5k is internally provided to pre-bias inputs during supply start-up and a zener clamp is provided for pin protection purposes. Input schmitt-trigger and noise filter provide beneficial noise rejection to short input pulses. The noise filter suppresses control pulses which are below the filter time tFILIN. The filter acts according to Figure 4. Data Sheet 6/14 HINx LINx INPUT NOISE FILTER UZ=10.5V 5k SWITCH LEVEL VIH; VIL Figure 3: Input pin structure a) tFILIN b) tFILIN HIN LIN HIN LIN high HO LO low HO LO Figure 4: Input filter timing diagram Aug. 2010 CIPOSTM IGCM10F60GA It is recommended for proper work of CIPOSTM not to provide input pulse-width lower than 1us. The integrated gate drive provides additionally a shoot through prevention capability which avoids the simultaneous on-state of two gate drivers of the same leg (i.e. HO1 and LO1, HO2 and LO2, HO3 and LO3). When two inputs of a same leg are activated, only former activated one is activated so that the leg is kept steadily in a safe state. A minimum deadtime insertion of typ 380ns is also provided by driver IC, in order to reduce crossconduction of the external power switches. VFO (Fault-output and NTC, Pin 14) The VFO pin indicates a module failure in case of under voltage at pin VDD or in case of triggered over current detection at ITRIP. A pull-up resistor is externally required to bias the NTC. VDD VFO RON ,FLT from ITRIP -Latch from uv - detection Thermistor VB(U,V,W) and VS(U,V,W) (High side supplies, Pin 1, 2, 3, 4, 5, 6) VB to VS is the high side supply voltage. The high side circuit can float with respect to VSS following the external high side power device emitter voltage. Due to the low power consumption, the floating driver stage is supplied by integrated bootstrap circuit. The under-voltage detection operates with a rising supply threshold of typical VBSUV+ = 12.1V and a falling threshold of VDDUV- = 10.4V. VS(U,V,W) provide a high robustness against negative voltage in respect of VSS of -50V transiently. This ensures very stable designs even under rough conditions. NU, NV, NW (Low side emitter, Pin 17, 18, 19) The low side emitters are available for current measurements of each phase leg. It is recommended to keep the connection to pin VSS as short as possible in order to avoid unnecessary inductive voltage drops. >1 VSS VDDUV- = 10.4V. This prevents the external power switches from critically low gate voltage levels during on-state and therefore from excessive power dissipation. CIPOSTM Figure 5: Internal circuit at pin VFO The same pin provides direct access to the NTC, which is referenced to VSS. An external pull-up resistor connected to +5V ensures, that the resulting voltage can be directly connected to the microcontroller P (Positive bus input voltage, Pin 23) The high side IGBT are connected to the bus voltage. It is recommended that the bus voltage does not exceed 400 V. ITRIP (Over current detection function, Pin 15) CIPOSTM provides an over current detection function by connecting the ITRIP input with the motor current feedback. The ITRIP comparator threshold (typ 0.47V) is referenced to VSS ground. A input noise filter (typ: tITRIPMIN = 530ns) prevents the driver to detect false over-current events. Over current detection generates a shut down of all outputs of the gate driver after the shutdown propagation delay of typically 1000ns. The fault-clear time is set to typical 65us. VDD, VSS (Low side control supply and reference, Pin 13, 16) VDD is the low side supply and it provides power both to input logic and to low side output power stage. Input logic is referenced to VSS ground. The under-voltage circuit enables the device to operate at power on when a supply voltage of at least a typical voltage of VDDUV+ = 12.1V is present. The IC shuts down all the gate drivers power outputs, when the VDD supply voltage is below Data Sheet 7/14 Aug. 2010 CIPOSTM IGCM10F60GA Absolute Maximum Ratings (VDD = 15V and TC = 25C, if not stated otherwise) Module Section Value Description Condition Storage temperature range Insulation test voltage RMS, f=60Hz, t =1min Operating case temperature range Refer to Figure 6 Symbol Unit min max Tstg -40 125 C VISOL 2000 - V TC -40 100 C RC-IGBT Section Value Description Condition Symbol Unit min max VCES 600 - V Max. blocking voltage IC=250A Output current TC = 25C, TJ<150C TC = 100C, TJ<150C IC -10 -6 10 6 A Maximum peak output current less than 1ms IC -20 20 A Short circuit withstand time VDC 400V tSC - 5 s Power dissipation per IGBT Ptot - 26 W Operating junction temperature range TJ -40 150 C RthJC - 4.79 K/W Single IGBT thermal resistance, junction-case Control Section Description Condition Value Symbol Unit min max Module supply voltage VDD -1 20 V High side floating supply voltage (VB vs. VS) VBS -1 20 V VIN VITRIP -1 -1 10 10 V fPWM - 20 kHz Input voltage LIN, HIN, ITRIP Switching frequency Data Sheet 8/14 Aug. 2010 CIPOSTM IGCM10F60GA Recommended Operation Conditions All voltages are absolute voltages referenced to VSS -potential unless otherwise specified. Value Description Symbol min typ max Unit DC link supply voltage VDC 0 - 400 V High side floating supply voltage (VB vs. VS) VBS 13.5 - 18.5 V Low side supply voltage VDD 14.0 16 18.5 V Control supply variation VBS, VDD -1 -1 - 1 1 V/s Logic input voltages LIN,HIN,ITRIP VIN VITRIP 0 0 - 5 5 V Between VSS - N (including surge) VSS -5 - 5 V Figure 6: TC measurement point Data Sheet 9/14 Aug. 2010 CIPOSTM IGCM10F60GA Static Parameters (VDD = 15V and TC = 25C, if not stated otherwise) Description Condition Symb ol Value Unit min typ max VCE(sat) - 1.6 1.8 2.0 - Iout = -6A TJ = 25C 150C VF - 1.75 1.8 2.2 VCE = 600V ICES - - 1 mA Logic "1" input voltage (LIN,HIN) VIH - 2.1 2.5 V Logic "0" input voltage (LIN,HIN) VIL 0.7 0.9 - V ITRIP positive going threshold VIT,TH+ 400 470 540 mV ITRIP input hysteresis VIT,HYS 40 70 - mV VDD and VBS supply under voltage positive going threshold VDDUV+ VBSUV+ 10.8 12.1 13.0 V VDD and VBS supply under voltage negative going threshold VDDUVVBSUV- 9.5 10.4 11.2 V VDD and VBS supply under voltage lockout hysteresis VDDUVH VBSUVH 1.0 1.7 - V 9.0 10.1 12.5 V Collector-Emitter saturation voltage Iout = 6A TJ = 25C 150C Emitter-Collector forward voltage Collector-Emitter leakage current V Input clamp voltage (HIN, LIN, ITRIP) Iin=4mA Quiescent VBx supply current (VBx only) HIN = 0V IQBS - 300 500 A Quiescent VDD supply current (VDD only) LIN = 0V, HINX=5V IQDD - 370 900 A Input bias current VIN = 5V IIN+ - 1 1.5 mA Input bias current VIN = 0V IIN- - 2 - A ITRIP input bias current VITRIP = 5V IITRIP+ - 65 150 A VFO input bias current VFO = 5V, VITRIP = 0V IFO - 60 - A VFO output voltage IFO = 10mA, VITRIP = 1V VFO - 0.5 - V Data Sheet VINCLAM V P 10/14 Aug. 2010 CIPOSTM IGCM10F60GA Dynamic Parameters (VDD = 15V and TC = 25C, if not stated otherwise) Value Description Condition Symbol Unit min typ max Turn-on propagation delay VLIN,HIN = 5V; Iout = 6A, VDC = 300V td(on) - 650 - ns Turn-on rise time VLIN,HIN = 5V; Iout = 6A, VDC = 300V tr - 20 - ns Turn-off propagation delay VLIN,HIN = 0V; Iout = 6A, VDC = 300V td(off) - 650 - ns Turn-off fall time VLIN,HIN = 0V; Iout = 6A, VDC = 300V tf - 170 - ns Short circuit propagation delay From VIT,TH+ to 10% ISC tSCP - 1250 - ns Input filter time ITRIP VITRIP = 1V tITRIPmin - 530 - ns Input filter time at LIN, HIN for turn on and off VLIN,HIN = 0V & 5V tFILIN - 290 - ns Fault clear time after ITRIP-fault VITRIP = 1V tFLTCLR 40 65 130 s DTPWM 1.5 - - s Deadtime between low side and high side Deadtime of gate drive circuit DTIC 380 ns IGBT turn-on energy (includes reverse recovery of diode) VDC = 300V, IC = 6A, TJ = 25C 150C Eon - 110 155 - J IGBT turn-off energy VDC = 300V, IC = 6A, TJ = 25C 150C Eoff - 155 220 - J Diode recovery energy VDC = 300V, IC = 6A, TJ = 25C 150C Erec - 45 75 - J Bootstrap Parameters (TC = 25C, if not stated otherwise) Description Condition Value Symbol min Repetitive peak reverse voltage 1 VRRM Bootstrap resistance of 1 U-phase VS2 or VS3=300V, TJ=25C VS2 and VS3=0V, TJ=25C VS2 or VS3=300V, TJ=125C VS2 and VS3=0V, TJ=125C Reverse recovery time Forward voltage drop typ 600 Unit max V RBS1 35 40 50 65 IF=0.6A, di/dt=80A/s trr_BS 50 ns IF=20mA, VS2 and VS3=0V VF_BS 2.6 V RBS2 and RBS3 have same values to RBS1. Data Sheet 11/14 Aug. 2010 CIPOSTM IGCM10F60GA Thermistor Description Resistor Condition TNTC = 25C B-constant of NTC (Negative temperature coefficient) Value Symbol Unit min typ max RNTC - 85 - k B(25/100) - 4092 - K Mechanical Characteristics and Ratings Value Description Unit Condition min typ max Mounting torque M3 screw and washer 0.59 0.69 0.78 Nm Flatness Refer to Figure 7 -50 - 100 m - 6.15 - g Weight + - - + Figure 7: Flatness measurement position Data Sheet 12/14 Aug. 2010 CIPOSTM IGCM10F60GA Circuit of a Typical Application NC (24) P (23) (1) VS(U) (2) VB(U) VB1 HO1 UU(22) RBS1 VS1 (3) VS(V) (4) VB(V) HO2 VB2 V (21) RBS2 VS2 (5) VS(W) (6) VB(W) 3-ph AC Motor HO3 VB3 W (20) VS3 RBS3 (7) HIN(U) HIN2 (9) HIN(W) Micro Controller LIN1 (11) LIN(V) LO2 LIN2 (12) LIN(W) NV (18) LIN3 (13) VDD VDD (14) VFO 5 or 3.3V line NU (19) HIN3 (10) LIN(U) VDD line LO1 HIN1 (8) HIN(V) VFO (15) ITRIP ITRIP (16) VSS VSS LO3 NW (17) Thermistor U-phase current sensing V-phase current sensing W-phase current sensing Signal for short-circuit protection Figure 8: Application circuit Switching Times Definition HIN LIN 2.1V 0.9V td(off) iCU, iCV, iCW vCEU, vCEV, vCEW tf td(on) 90% 10% tr 90% 10% 10% Figure 9: Switching times definition Data Sheet 13/14 Aug. 2010 CIPOSTM IGCM10F60GA Package Outline Data Sheet 14/14 Aug. 2010