1/9June 2001
■HIGH SPE ED: t PD = 4.0 ns (TYP.) at VCC = 5V
■LOW POWER DISSIPATION:
ICC = 4 µA (MAX.) at TA=25°C
■HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.)
■POWER DOWN PRO TECTI ON ON
CONTROL INPUTS
■SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
■BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
■OPERATING VOLTAGE R AN GE:
VCC(OPR) = 2V to 5.5V
■PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 245
■IMPROVED LATCH-UP IMMUNITY
■LOW NOISE: VOLP = 0.9V (MAX.)
DESCRIPTION
The 74VHC245 is an advanced high-speed
CMOS OCTAL BUS TRANSCEIVER (3-STATE)
fabricated with sub-micron silicon gate and
double-l ayer metal wiring C2MO S technology.
This IC is intended for two-way asynchronous
communication between data busses; the
direction of data transmission is determined by
DIR input. The enable input G can be used to
disable the device so that the busses are
effectiv ely is olated .
All inputs and outputs are equipped with
protection circuits aga inst static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
All floating bus terminals during High Z State must
be held HIGH or LOW.
74VHC245
OCTAL BUS
TRANSCEIVER (3-STATE)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE TUBE T & R
SOP 74VHC245M 74VHC245MTR
TSSOP 74VHC245TTR
TSSOPSOP
74VHC245
2/9
INPUT EQUI VALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE
X : Don‘t Care
Z : Hi gh Imp edance
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are t hose v alues beyond which damage to the device may occur. Functional operation under thes e conditions is
not implie d
RECOMMENDE D OPERATING CONDITIONS
1) VIN fr om 30 % to 70% of VCC
PIN No SYMBOL NAME AND FUNCTION
1 DIR Directional Control
2, 3, 4, 5, 6,
7, 8, 9 A1 to A8 Data Inputs/Outputs
18, 17, 16,
15, 14, 13,
12, 11
B1 to B8 Data Inputs/Outputs
19 G Output Enable Input
10 GND Ground (0V)
20 VCC Positive Supply Voltage
INPUTS FUNCTION OUTPUT
GDIR A BUS B BUS
L L OUTPUT INPUT A = B
L H INPUT OUTPUT B = A
HXZZZ
Symbol Parameter Value Unit
VCC Supply Voltage -0.5 to +7.0 V
VIDC Input Voltage (DIR, G) -0.5 to +7.0 V
VI/O Bus I/O Voltage -0.5 to VCC + 0.5 V
VODC Output Voltage -0.5 to VCC + 0.5 V
IIK DC Input Diode Current - 20 mA
IOK DC Output Diode Current ± 20 mA
IODC Output Current ± 25 mA
ICC or IGND DC VCC or Ground Curre nt ± 75 mA
Tstg Storage Temperature -65 to +150 °C
TLLead Temperature (10 sec) 300 °C
Symbol Parameter Value Unit
VCC Supply Voltage 2 to 5.5 V
VIInput Voltage (DIR, G) 0 to 5.5 V
VI/O Bus I/O Voltage 0 to VCC V
VOOutput Voltage 0 to VCC V
Top Operating Temperature -55 to 125 °C
dt/dv Input Rise and Fall Time (note 1) (VCC = 3.3 ± 0.3V)
(VCC = 5.0 ± 0.5V) 0 to 100
0 to 20 ns/V
74VHC245
3/9
DC SPE CIFICATI ONS
Symbol Parameter
Test Condition Value
Unit
VCC
(V)
TA = 25°C -40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
VIH High Level Input
Voltage 2.0 1.5 1.5 1.5 V
3.0 to
5.5
0.7V
CC
0.7V
CC
0.7V
CC
VIL Low Level Input
Voltage 2.0 0.5 0.5 0.5 V
3.0 to
5.5
0.3V
CC
0.3V
CC
0.3V
CC
VOH High Level Output
Voltage 2.0 IO=-50 µA1.9 2.0 1.9 1.9
V
3.0 IO=-50 µA2.9 3.0 2.9 2.9
4.5 IO=-50 µA4.4 4.5 4.4 4.4
3.0 IO=-4 mA 2.58 2.48 2.4
4.5 IO=-8 mA 3.94 3.8 3.7
VOL Low Level Output
Voltage 2.0 IO=50 µA0.0 0.1 0.1 0.1
V
3.0 IO=50 µA0.0 0.1 0.1 0.1
4.5 IO=50 µA0.0 0.1 0.1 0.1
3.0 IO=4 mA 0.36 0.44 0.55
4.5 IO=8 mA 0.36 0.44 0.55
Ioz High Impedance
Output Leakage
Current 5.5 VI = VIH or VIL
VO = VCC or GND ±0.25 ± 2.5 ± 2.5 µA
IIInput Leakage
Current 0 to
5.5 VI = 5.5V or GND ± 0.1 ± 1 ± 1 µA
ICC Quiescent Supply
Current 5.5 VI = VCC or GND 44040µA
74VHC245
4/9
AC EL ECTRI CAL CHARACTERISTICS (Input tr = tf = 3ns)
(*) Vol t a ge ra nge is 3.3V ± 0.3V
(**) Voltage range is 5.0V ± 0.5V
Note 1 : Param eter guaranteed by d esign. tsoLH = |tpLHm - tpLHn|, tsoHL = |tpHLm - tpHLn|
CAPACITIVE CHARACT ERISTICS
1) C PD is defined as the value of t he IC ’s internal equivalent capacitance which is calculat ed from the operating current consumption without
load. (Refer to Test Ci rcuit). Average operating current can be obtained by t he following equation. ICC(opr) = CPD x VCC x fIN + ICC/8 ( per c ircuit )
Symbol Parameter
Test Condition Value
Unit
VCC
(V) CL
(pF)
TA = 25°C -40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
tPLH
tPHL
Propagation Delay
Time 3.3(*) 15 5.8 8.4 1.0 10.0 1.0 10.0
ns
3.3(*) 50 8.3 11.9 1.0 13.5 1.0 13.5
5.0(**) 15 4.0 5.5 1.0 6.5 1.0 6.5
5.0(**) 50 5.5 7.5 1.0 8.5 1.0 8.5
tPZL
tPZH
Output Disable
Time 3.3(*) 15 RL = 1KΩ8.5 13.2 1.0 15.5 1.0 15.5
ns
3.3(*) 50 RL = 1KΩ11.0 16.7 1.0 19.0 1.0 19.0
5.0(**) 15 RL = 1KΩ5.8 8.5 1.0 10.0 1.0 10.0
5.0(**) 50 RL = 1KΩ7.3 10.6 1.0 12.0 1.0 12.0
tPLZ
tPHZ Output Enable
Time 3.3(*) 50 RL = 1KΩ11.5 15.8 1.0 18.0 1.0 18.0 ns
5.0(**) 50 RL = 1KΩ7.0 9.7 1.0 11.0 1.0 11.0
tOSLH
tOSHL Output to Output
Skew time (note 1) 3.3(*) 50 1.5 1.5 1.5 ns
5.0(**) 50 1.0 1.0 1.0
Symbol Parameter
Test Condition Value
Unit
TA = 25°C -40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
CIN Input Capacitance 4101010pF
C
I/O Output
Capacitance 8pF
C
PD Power Dissipation
Capacitance
(note 1) 21 pF
74VHC245
5/9
DYNAMIC SWITCHING CHARACT ERI STI CS
1) Worst c ase package.
2) M ax numb er of outp uts defin ed as (n). Dat a i nputs ar e driven 0V to 5.0V, (n-1) out puts swi tc hi ng and one output at G ND.
3) Max number of data inputs (n) swit ching. (n-1) switching 0V to 5.0V. Inputs under test switching: 5. 0V to threshold (VILD), 0V to threshold
(VIHD), f=1MHz.
TEST CIRCUIT
CL =15/ 50pF or equi valen t (i nclude s ji g and probe capacitance )
RL = R1 = 1 KΩ or equivalent
RT = ZOUT of pulse ge nerator (typically 50Ω)
Symbol Parameter
Test Condition Value
Unit
VCC
(V)
TA = 25°C -40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
VOLP Dynamic Low
Voltage Quiet
Output (note 1, 2) 5.0
CL = 50 pF
0.6 0.9 V
VOLV -0.9 -0.6
VIHD Dynamic High
Voltage Input
(note 1, 3) 5.0 3.5 V
VILD Dynamic Low
Voltage Input
(note 1, 3) 5.0 1.5 V
TEST SWITCH
tPLH, tPHL Open
tPZL, tPLZ VCC
tPZH, tPHZ GND
74VHC245
6/9
WAVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
WAV EFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle)
74VHC245
7/9
DIM. mm. inch
MIN. TYP MAX. MIN. TYP. MAX.
A 2.65 0.104
a1 0.1 0.2 0.004 0.008
a2 2.45 0.096
b 0.35 0.49 0.014 0.019
b1 0.23 0.32 0.009 0.012
C 0.5 0.020
c1 45° (typ.)
D 12.60 13.00 0.496 0.512
E 10.00 10.65 0.393 0.419
e 1.27 0.050
e3 11.43 0.450
F 7.40 7.60 0.291 0.300
L 0.50 1.27 0.020 0.050
M 0.75 0.029
S8° (max.)
SO-20 MECHANICAL DATA
PO13L
74VHC245
8/9
DIM. mm. inch
MIN. TYP MAX. MIN. TYP. MAX.
A 1.2 0.047
A1 0.05 0.15 0.002 0.004 0.006
A2 0.8 1 1.05 0.031 0.039 0.041
b 0.19 0.30 0.007 0.012
c 0.09 0.20 0.004 0.0089
D 6.4 6.5 6.6 0.252 0.256 0.260
E 6.2 6.4 6.6 0.244 0.252 0.260
E1 4.3 4.4 4.48 0.169 0.173 0.176
e 0.65 BSC 0.0256 BSC
K0° 8°0° 8°
L 0.45 0.60 0.75 0.018 0.024 0.030
TSSOP20 MECHANICAL DATA
cE
b
A2
A
E1
D
1
PIN 1 IDENTIFICATION
A1 L
K
e
0087225C
74VHC245
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
conseque nces of use of such i nformation nor for any infringement of patents or ot her rights of third parties which may result from
its use. No licens e is granted by implica tion or otherwise under any pat ent or patent rig hts of STMicroelectron ics. S pecific at ions
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems with out expres s written approval of STMicroelec tronics .
© The ST logo is a registered trademark of STMicroelectronic s
© 2001 STMicroe lectro n ics - Prin ted in Italy - All Rights Reserv ed
STM icroelectron i cs GROUP OF COMPANI E S
Australia - B razil - C hi na - Finl and - Fra nce - Germ any - Hong Kong - India - Italy - Japan - Malaysia - Malta - Mo rocco
Singapo re - Spain - Sweden - Sw i tzerland - Uni ted Kingdom
© http://www.st.com 9/9
