112 AVG Semiconductors DDi" Technical Data Dual JK Negative DV74LS112A Edge-Triggered Flip-Flops DV74ALS112A N Suffix This device contains two individual J, K, clock, and asynchronous Plastic DIP set and clear inputs to each flip-flop. When the clock pulse goes AVG-003 Case HIGH, the inputs are enabled and data willbe accepted. The logic level of the J and K inputs may be allowed to change when the clock pulse is HIGH and the bistable will perform according to the D Suffix truth table as long as minimum set-up and hold time are observed. Plastic SOP input data is transferred to the outputs on the negative-going edge AVG-004 Case of the clock pulse. AVG's LS operates over extended Vcc from 4.5 to 5.5 V Switching specifications for ALS at 50 pF AVG's LS and ALS both have guaranteed DC and AC specification over full temperature and Vcc range AVG's ALS has the lowest speed power product (4pJ per gate typical) of all logic series TRUTH TABLE pe Inputs Output Set 1 * set | Clear|Clock! u | K | a) Oo _ LS a L H x | KIX] HEIL Clock 1! cb H | tL | x |xX|xX{}LIH "4. 3 6 a PIN ASSIGNMENT L L x x | X | H H cn amie bee PEE TE eet yd bon Tuoi wilt i[elatel a Set ? 10 sits 14| ] Clear 2 H H l H | H | Toagle p yy 9 0 Set 1 [4 13|_] Clock 2 H Hi H x) xX ate clock 2 Ih | a1) 12] ] k2 H=HIGH Voltage Level | aris 11H v2 L=LOW Voltage Level K? - Az _!_ mT X=immaterial | L | U7 10|] Set 2 Q0=Previous Condition of Q cuear 24 7 eno [1s g{] 02 Cote ae eapreactable H Set and Clear go PIN 16 = Yer PIN 8 = GND ABSOLUTE MAXIMUM RATINGS Maximum ratings are those values beyond which damage to the device may occur. Symbol Parameter | LS112A ALS112A _| unit Vec _| Supply Voltage - 7.0 7.0 V Vin | Input Voltage 7.0 7.0 V Tsta_ | Storage Temperature Range -65 to+150 65 to + 150 4 "C DV74LS112A, DV74ALS112A 1-800-AVG-SEMI GUARANTEED OPERATING CONDITIONS Symbol Parameter LS112A ALS112A Unit Min Max Min Max Vec | Supply Voltage 4.5 5.5 4.5 5.5 VO Vin | High Level Input Voltage 2.0 2.0 Vv Vi | Low Level Input Voltage 0.8 0.8 ve | lon | High Level Output Current -0.4 0.4 | ma | lo. | Low Level Output Current 8.0 8.0 | mA | Ta | Ambient Temperature Range 10 to +70 10 to + 70 | "Cc | SWITCHING CHARACTERISTICS Symbol Parameter Condition LS112A ALS112A__| unit Min | Typ | Max] Min | Typ | Max Vin Input Clamp Voltage | Vcc= min, lin = -18 mA =-1.5 -15] V Vou | High Level Output | Vcc = min, lou =max Vee-2 | 3.5 Vee-2 V Voltage Vo. | Low Level Output Voc=min lo. = 4 mA 0.25 | 0.4 025 |} 04 Voltage lo. = 8 mA 0.35 | OS 0.35] 05 | V lina High Level Input Vec=max, Vin= 2.7V LA Current J, K 20 20 Clock BO 20 Set, Clear 60 40 J, K Vec=max, Vin= 7V 0.1 0.1 mA Clock 0.4 0.1 Set, Clear 0.3 0.2 In Low Level Input Voc=max, Vin=0.4V mA Current J,K 0.4 -0.2 Glock 0.8 0.2 Set, Clear O.8 0.4 le Output Short Circuit | Voc=max, Vout =2.25V -20 110] 30 =12 7 mA Current lcc | Power Supply Voc=max 6.0 25 | 45 > mA Current Symbol Parameter INPUT | OUTPUT LS112A ALS112A Unit C.L=15 pF C._=50pF AL=50042 Min Max Min Max fax | Maximum Clock Frequency 30 30 * | MHz tptH | Propagation Delay Time Clock Any Q 20 3 15 ns Low-to-High Level Output tpH_ =| Propagation Delay Time Clock Any Q 20 5 19 ns High-to-Low Level Output tein =| Propagation Delay Time Set or Any Q 20 3 15 ns Lo High I lear tpu. | Propagation Delay Time. Set or Any Q 20 4 18 ns High-to-Low Level Output Clear 1-800-AVG-SEMI 3-69 DV74LS112A, DV74ALS112A cLh AC SETUP REQUIREMENTS over full operating conditions Symbol Parameter LS112A ALS 112A Units MIN MAX MIN MAX tw Pulse Width Set or Clear Low 25 10 ns Clock High 20 16.5 = Clock Low 16.5 ts Setup Time 20 22 ns t) | Hold Time 0 | 0 ns tee | Clock Recovery Time 25 | 20 ns SWITCHING WAVEFORMS av GND * 1Pu t PHL Vou 1.5V O or G Vo VALID av DATA 1.3V GND ts th CLOCK 3V 1.3V GND tly ~, av SET OR RESET 13y GND = | PHL) V Q or +3 on Vou _ tT PLY VoH 1.5 Q oro __ Vol DV74LS112A, DV74ALS112A 3-70 1-800-AVG-SEMI