MC74VHC245 Octal Bus Buffer/Line Driver The MC74VHC245 is an advanced high speed CMOS octal bus transceiver fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. It is intended for two-way asynchronous communication between data buses. The direction of data transmission is determined by the level of the DIR input. The output enable pin (OE) can be used to disable the device, so that the buses are effectively isolated. All inputs are equipped with protection circuits against static discharge. * High Speed: tPD = 4.0 ns (Typ) at VCC = 5 V * Low Power Dissipation: ICC = 4 A (Max) at TA = 25C * High Noise Immunity: VNIH = VNIL = 28% VCC * Power Down Protection Provided on Inputs * Balanced Propagation Delays * Designed for 2 V to 5.5 V Operating Range * Low Noise: VOLP = 1.2 V (Max) * Pin and Function Compatible with Other Standard Logic Families * Latchup Performance Exceeds 300 mA * ESD Performance: HBM > 2000 V; Machine Model > 200 V * Chip Complexity: 308 FETs or 77 Equivalent Gates * These Devices are Pb-Free and are RoHS Compliant APPLICATION NOTES * Do not force a signal on an I/O pin when it is an active output, * * damage may occur. All floating (high impedance) input or I/O pins must be fixed by means of pull up or pull down resistors or bus terminator ICs. A parasitic diode is formed between the bus and VCC terminals. Therefore, the VHC245 cannot be used to interface 5 V to 3 V systems directly. http://onsemi.com MARKING DIAGRAMS 20 20 1 SOIC-20 DW SUFFIX CASE 751D VHC245 AWLYYWWG 1 20 20 1 TSSOP-20 DT SUFFIX CASE 948E VHC245 A WL, L Y WW, W G or G 1 VHC 245 ALYWG G = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Package Shipping MC74VHC245DWG SOIC-20 38 Units/Rail MC74VHC245DTG TSSOP-20 75 Units/Rail Device MC74VHC245DWR2G SOIC-20 1000 Units/Reel MC74VHC245DTR2G TSSOP-20 2500 Units/T&R For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. (c) Semiconductor Components Industries, LLC, 2011 May, 2011 - Rev. 6 1 Publication Order Number: MC74VHC245/D MC74VHC245 A1 A2 A3 A DATA PORT A4 A5 A6 A7 A8 DIR OE 2 18 3 17 4 16 5 15 6 14 7 13 8 12 9 11 B1 DIR 1 20 VCC B2 A1 2 19 OE B3 A2 3 18 B1 A3 4 17 B2 A4 5 16 B3 A5 6 15 B4 A6 7 14 B5 A7 8 13 B6 A8 9 12 B7 10 11 B8 B DATA PORT B4 B5 B6 B7 B8 1 19 GND Figure 1. LOGIC DIAGRAM Figure 2. PIN ASSIGNMENT FUNCTION TABLE Control Inputs OE DIR L L Data Transmitted from Bus B to Bus A L H Data Transmitted from Bus A to Bus B H X Buses Isolated (High-Impedance State) Operation http://onsemi.com 2 MC74VHC245 IIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIIIIIIII IIIII III IIIIIIIIIIIIIIIIIIIIIIIIII MAXIMUM RATINGS* Symbol Value Unit VCC DC Supply Voltage Parameter - 0.5 to + 7.0 V Vin DC Input Voltage - 0.5 to + 7.0 V Vout DC Output Voltage - 0.5 to VCC + 0.5 V IIK Input Diode Current - 20 mA IOK Output Diode Current 20 mA Iout DC Output Current, per Pin 25 mA ICC DC Supply Current, VCC and GND Pins 75 mA PD Power Dissipation in Still Air 500 450 mW Tstg Storage Temperature - 65 to + 150 _C SOIC Packages TSSOP Package This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND v (Vin or Vout) v VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V CC ). Unused outputs must be left open. * Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute-maximum-rated conditions is not implied. Derating -- SOIC Packages: - 7 mW/_C from 65_ to 125_C TSSOP Package: - 6.1 mW/_C from 65_ to 125_C IIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIII IIIIIII IIIIIIIIIII IIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIII IIIIIII III IIII III IIII IIII IIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIII II IIIIIII III IIII III IIII IIII IIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIII IIIIIII III IIII III IIII IIII IIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit 2.0 5.5 V VCC DC Supply Voltage Vin DC Input Voltage 0 5.5 V Vout DC Output Voltage 0 VCC V - 40 + 85 _C 0 0 100 20 ns/V TA Operating Temperature tr, tf Input Rise and Fall Time VCC = 3.3V 0.3V VCC =5.0V 0.5V DC ELECTRICAL CHARACTERISTICS Symbol Parameter VCC V Test Conditions VIH Minimum High-Level Input Voltage 2.0 3.0 to 5.5 VIL Maximum Low-Level Input Voltage 2.0 3.0 to 5.5 VOH Minimum High-Level Output Voltage Vin = VIH or VIL IOH = - 50A Vin = VIH or VIL IOH = - 4mA IOH = - 8mA VOL Maximum Low-Level Output Voltage Vin = VIH or VIL IOL = 50A Maximum Input Leakage Current Vin = 5.5 V or GND (DIR, OE) Min Typ TA = - 40 to 85C Max 1.50 VCC x 0.7 Min 2.0 3.0 4.5 1.9 2.9 4.4 3.0 4.5 2.58 3.94 Max 1.50 VCC x 0.7 0.50 VCC x 0.3 2.0 3.0 4.5 Vin = VIH or VIL IOL = 4mA IOL = 8mA Iin TA = 25C 2.0 3.0 4.5 V 0.50 VCC x 0.3 2.48 3.80 0.1 0.1 0.1 3.0 4.5 0.36 0.36 0.44 0.44 0 to 5.5 0.1 1.0 3 V V 1.9 2.9 4.4 0.1 0.1 0.1 http://onsemi.com Unit 0.0 0.0 0.0 V A MC74VHC245 IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIII IIIIIII IIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIII IIIIII IIII IIIIIII IIIIIII III IIII III IIII IIII IIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIII IIIIIII III IIII III IIII IIII IIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIII IIIIII IIIIIIIIII IIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIII IIIIIIII IIII III IIII III IIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIIIIIII IIIIIIIIIIIIIIIII IIIIIIIIIIII IIIIIII IIIIIII IIIIIII IIIIIII IIIIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIII IIIIIIII IIII III IIII III IIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII DC ELECTRICAL CHARACTERISTICS VCC V Symbol Parameter Test Conditions IOZ Maximum Three-State Leakage Current Vin = VIL or VIH Vout = VCC or GND 5.5 ICC Maximum Quiescent Supply Current Vin = VCC or GND 5.5 TA = 25C Min Typ TA = - 40 to 85C Max Min Max Unit 0.25 2.5 A 4.0 40.0 A AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns) TA = 25C Symbol Parameter tPLH, tPHL Maximum Propagation Delay, A to B or B to A tPZL, tPZH tPLZ, tPHZ tOSLH, tOSHL Output Enable Time OE to A or B Output Disable Time OE to A or B Output to Output Skew Test Conditions Min TA = - 40 to 85C Typ Max Min Max Unit ns VCC = 3.3 0.3V CL = 15pF CL = 50pF 5.8 8.3 8.4 11.9 1.0 1.0 10.0 13.5 VCC = 5.0 0.5V CL = 15pF CL = 50pF 4.0 5.5 5.5 7.5 1.0 1.0 6.5 8.5 VCC = 3.3 0.3V RL = 1 k CL = 15pF CL = 50pF 8.5 11.0 13.2 16.7 1.0 1.0 15.5 19.0 VCC = 5.0 0.5V RL = 1 k CL = 15pF CL = 50pF 5.8 7.3 8.5 10.6 1.0 1.0 10.0 12.0 VCC = 3.3 0.3V RL = 1 k CL = 50pF 11.5 15.8 1.0 18.0 VCC = 5.0 0.5V RL = 1 k CL = 50pF 7.0 9.7 1.0 11.0 VCC = 3.3 0.3V (Note 1) CL = 50pF 1.5 1.5 ns VCC = 5.0 0.5V (Note 1) CL = 50pF 1.0 1.0 ns 10 10 pF Cin Maximum Input Capacitance DIR, OE 4 CI/O Maximum Three-State I/O Capacitance 8 ns ns pF Typical @ 25C, VCC = 5.0V 21 CPD Power Dissipation Capacitance (Note 2) pF 1. Parameter guaranteed by design. tOSLH = |tPLHm - tPLHn|, tOSHL = |tPHLm - tPHLn|. 2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC / 8 (per bit). CPD is used to determine the no-load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 5.0V) TA = 25C Symbol Parameter Typ Max Unit VOLP Quiet Output Maximum Dynamic VOL 0.9 1.2 V VOLV Quiet Output Minimum Dynamic VOL -0.9 -1.2 V VIHD Minimum High Level Dynamic Input Voltage 3.5 V VILD Maximum Low Level Dynamic Input Voltage 1.5 V http://onsemi.com 4 MC74VHC245 SWITCHING WAVEFORMS VCC DIR 50% GND VCC OE GND VCC A or B tPZL 50% GND tPLH 50% VCC 50% VCC tPHL A or B B or A A or B HIGH IMPEDANCE 50% VCC tPZH 50% VCC tPLZ VOL +0.3V tPHZ VOH -0.3V 50% VCC Figure 3. HIGH IMPEDANCE Figure 4. TEST CIRCUITS TEST POINT TEST POINT OUTPUT DEVICE UNDER TEST OUTPUT DEVICE UNDER TEST CL* *Includes all probe and jig capacitance 1 k CL* CONNECT TO VCC WHEN TESTING tPLZ AND tPZL. CONNECT TO GND WHEN TESTING tPHZ AND tPZH. *Includes all probe and jig capacitance Figure 5. Figure 6. http://onsemi.com 5 MC74VHC245 A1 2 18 A2 3 17 A3 OE B7 9 11 DIR B6 8 12 A8 B5 7 13 A7 B4 6 14 A6 B3 5 15 A5 B2 4 16 A4 B1 B8 1 19 Figure 7. EXPANDED LOGIC DIAGRAM DIR, OE A, B INPUT I/O Figure 9. BUS TERMINAL EQUIVALENT CIRCUIT Figure 8. INPUT EQUIVALENT CIRCUIT http://onsemi.com 6 MC74VHC245 PACKAGE DIMENSIONS SOIC-20 CASE 751D-05 ISSUE G A 20 q X 45 _ E h 1 10 20X B B 0.25 M T A S B S A L H M 10X 0.25 NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. 11 B M D 18X e A1 SEATING PLANE C T http://onsemi.com 7 DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_ MC74VHC245 PACKAGE DIMENSIONS TSSOP-20 CASE 948E-02 ISSUE C 20X 0.15 (0.006) T U 2X L K REF 0.10 (0.004) S L/2 20 M T U S V IIII IIII IIII S J J1 11 B -U- PIN 1 IDENT 1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. K K1 SECTION N-N 0.25 (0.010) N 10 M 0.15 (0.006) T U S N A -V- F DETAIL E -W- C G D H 0.100 (0.004) -T- SEATING DETAIL E SOLDERING FOOTPRINT PLANE DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 6.40 6.60 4.30 4.50 --1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.252 0.260 0.169 0.177 --0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ 7.06 1 0.65 PITCH 16X 0.36 16X 1.26 DIMENSIONS: MILLIMETERS ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 http://onsemi.com 8 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MC74VHC245/D