6367252 MOTOROLA SC (LOGIC) (S) MOTOROLA CMOS SSI QUAD EXCLUSIVE OR ANDNOR GATES The MC140708 quad exclusive OR gate and the MC140778 quad exclusive. NOR gate are constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. These complementary MOS togic gates find primary use where low power dissipation and/or high noise immunity is desired. @ Supply Voltage Range = 3.0 Vdc to 18 Vdc @ All Outputs Buffered @ Capable of Driving Two Low-Power TTL Loads or One Low-Power Schottky TTL Load Over the Rated Temperature Range @ Double Diode Protection on All inputs @ MC14070B Replacement for CD4030B and CD4070B Types @ MC14077B Replacement for CD4077B Type MAXIMUM RATINGS* Referenced to Parameter Value 0.5 to + 18.0 V, Input or orTt -0.5 to +05 or Current or Ti i +10 MOTOROLA SC {LOGIC} 4&4 DEP b3b7252 0079580 O i 98D 79580 O J-43-21 MC14070B QUAD EXCLUSIVE OR GATE MC14077B QUAD EXCLUSIVE NOR GATE FaNpRAY CASE 632. L SUFFIX CERAMIC PACKAGE _ CASE 646 P SUFFIX PLASTIC PACKAGE ORDERING INFORMATION A Series: 55C to +125C MC14XXXBAL (Ceramic Package Only) C Saries: - 40C to + 85C MCi4XXXBCP (Plastic Package) MC14XXXBCL (Ceramic Package) Power T, Ty Lead 500 260 66 to + 150 mc140708 Maximum Ratings are those values beyond which damage to the device may occur. +Temperature Derating: Plastic P" Package: 12mW/*C from 65C to 85C Ceramic L" Package: 12mW/C from 100C to 125C FIGURE 1 POWER DISSIPATION TEST CIRCUIT AND WAVEFORM 60% Duty Cycte T cL tT *Inverted output on MC 140776 only. MC 14077B Quad Exclusive OR Quad Exclusive NOR Gate Gate 1 1 3 Oi 5 + 5 4 6 > 8 9 9 13 13 Vpp = Pin 14 Vgg = Pin? (Both Devices) FIGURE 2 SWITCHING TIME TEST CIRCUIT AND WAVEFORMS , PIN ASSIGNMENT Voo 20ns pe 20 ns Vs Vv too In tp Voo fF 14 | (niput oD Pulse . son 204 in2, In 2p F138 Generator T 10% Vs5 30 outa In 1p FS 12 cL tpHL tpLH v 4] Outs Outp P11 Vss T oo* Ou 5c in 1g Outc F 10 = = Output 10% Vv 6 In2g In2c fF J9 " ou 774 vss In icf 8 * Inverted output on MC140778 only. STHL TLH # Connect unused Input to Vpp for MC140708, to Vgg for MC140778, 6-156MOTOROLA SC {LOGIC} 4a DEB as47252 o0795a1 eg 1 xe . | 6367252 MOTOROLA SC (LOGIC) __ ~" 98D 79581. vD i MC14070BeMC14077B T-43-2] t ELECTRICAL CHARACTERISTICS (voltages Referenced to Vss) Vop Tiow* 25C Thigh Characteristic Symbol Vde Min Max Min Typ # Max Min Max Unit Output Voltage O"" Level VOL 5.0 ~~ 0.05 _ 0 0.05 _ 0.05 Vde Vin = Vpp or 0 10 _ 0.05 - 0 0.05 _ 0,08 15 - 0.05 _ 0 0.05 _ 0.05 1 Level Vou 5.0 4.95 _ 4.95 5.0 - 495 _ Vde Vin = 9 of Vop 10 9.95 - 9.95 10 ~ 9.95 _ i 15 14.95 _- 14.95 16 _ 14.95 _ : Input Voltage 0 Level VIL Vde : (V9 =4.5 or 0.5 Vdc} 5.0 - 15 _ 2,25 5 - 15 } (VQ =9.0 or 1.0 Vde) 10 _ 3.0 _ 4.50 3.0 _ 3.0 : (Vo = 13.5 or 1.6 Vde) 15 = 4.0 = 6.75 4.0 - 4.0 "4" Levell Vin (Vo = 0.5 of 4.5 Vde} 5.0 3.6 _ 3.5 2.75 _- 35 Vde (Vg = 1.0 or 9.0 Vdc) 10 7.0 _- 7.0 5.50 - 7.0 - (Vo =1 8 or 13.5 Vde) 16 11.0 11,0 8.25 =_ 11.0 -_ Output Orive Current (AL Device} lou . mAdc (VoH =2.5 Vde} Source 5.0 -3,0 - -2.4 4,2 _ -1.7 (VoH =4.6 Vdel 5.0 -0.64 _ -0.51 -0,88 _ -0.36 - (Von 29.5 Vde) 10 16 _ 1.3 -2,25 _ -0.9 _ (VOH = 13.5 Vdel 15 4.2 - 3.4 -8.8 _ -2.4 _ (VoL 70.4 Vde} Sink lo 5.0 0.64 ~ 0.51 0.88 - 0.36 _ mAdc (Vo_ =0.5 Vde} 10 1.6 - 1.3 2.25 _- 09 _ (Vo_ =1,8 Vde) 15 4.2 _ 3.4 88 _ 2.4 _ . fOutput Drive Current (CLYCP Device) loH mAdc (Von = 2.5 Vde) Source 5.0 2.5 -2.4 -4.2 _ 1.7 _ (Von = 4.6 Vde} 5.0 -0.52 - ~0.44 -0.88 - -0.36 _ (Von = 9.5 Vdel 10 -13 _ -14 -2.25 - -0.9 - (Voy = 13.5 Vde) 15 -3.6 _ ~3.0 -B88 _- -2.4 _ (VoL 70.4 Vdel Sink Jou 5.0 0,52 _ 044 0.88 _ 0.36 _ mAdc (Vou = 0.6 Vdc) 10 1.3 - 41 2.25 - os - (VoL = 1.5 Vde) 15 3.6 _ 3.0 88 _ 2.4 Input Current (AL Device} lin 15 -_ 201 {0.00001} :0.1 21.0 wAdc Input Current (CL/CP Device) lin 15 | 103 |#0.00001; +03 _ 21.0 pAdc tnput Capacitance Cin _ _ - - 5.0 75 -. - pF (Vin = 90) Quiescent Current (AL Device) ipo | 50 0.25 | 0.0005 | 0.25 = 76 wAdc {Per Package) 10 _ 0.60 _ 0.0010 0.50 _ 16 15 = 1,00 _- 0.0015 1,00 _- 30 Quiescent Current (CL/CP Device) Ippo 5.0 _ 1.0 0.0005 1.0 _- 76 nAdc (Per Package) 10 _ 2.0 _ 0.0010 2.0 _ 15 15 _. 4.0 _ 0.0015 4.0 _ 30 . | Total Supply Current**t iy 5.0 ty = (0.3 wA/kH2) f + IpD wAdc > (Dynamic plus Quiescent, 10 by = (0.6 BA/KHz2) f + ipp Per Package} . 15 / 17 = (0.9 wA/kHz) #+ 'OD {C_ =50 pF on all outputs, all buffers switching} Output Rise and Fall Times** tTLH, ns (C__ = 50 pF) tTHL tTLH, tTHL = (1.35 ns/pF) Cy + 33 ns 50 | _- _ 100 200 - _ tTLH, tTHL = (0.60 ns/pF) Cy + 20 ns 10 50 400 _ _ tTLH, TTHL = (0.40 ns/pF) Cy + 20 ns 18 ~ = =_ 40 80 _ _ Propagation Delay Times** tPLH- ns (CL = 50 pF) tPHL tpLH: tpHL =(0.90 ns/pF) C_ + 130 ns 5.0 _ _- _- 175 350 - _ tery: tpHL = (0.36 ns/pF) CL + 57 ns 10 _ _ _ 76 150 - tpLH: tpHE =(0.26 ns/pF) CL +937 ns 15 _ _ _ 55 110 - = *Tiow = 55C for AL Device, 40C for CL/CP Davice. To catculate total supply current at foads other than 50 pF: Thigh + 125G for AL Device, +85C for CL/CP Device. . ty(C_) = bp(50 pF) + (CL 50) Vik #Data labelled "Typ" Is not to be used for design purposes but Is I ded as an indi: of the IC's p ial perfor where: tz Is in pA (per package), C, In pF, V = (Vpp-Vgs) In volts, The formulas given are for the typical characteristics only at 25C. { In KHz is Input frequency, and k = 0.002, : This device contains protection circultry to guard against damage due to high static voltages or electric fields. : However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range Vsg * (Vin or i Vout) = Vpp- : Unused inputs must always be tied to an appropriate logic voltage level (e.g., either Vgs or Vpp). Unused outputs i must be left open. 6-157ea AE ee MOTOROLA SC (LOGIC) 78D D MM 6367252 co7444y 1 PACKAGE DIMENSIONS T- 40-20 The standard package availability for each device is indicated on the front page of the individual data sheets. Dimensions for the packages are given in this chapter. Surface mount packages may be special ordered by specifying the following suffixes: D (narrow SOIC), DW (wide SOIC), or FN (PLCC). For example, to order a quad NOR gate, use MC14001BD. ees | 4-PiN PACKAGE samme CERAMIC PACKAGE CASE 632-08 NOTES: 1, DIMENSIONING AND TOLERANCING PER ANS! Yi4.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. OIM F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. Dun PLASTIC PACKAGE CASE 646-06 NOTES: 1, LEADS WITHIN.0.13 mm (0.005) RADIUS OF TRUE POSITION AT SEATING PLANE AT MAXIMUM MATERIAL CONDITION, FAG RPK FE AG AL 2. DIMENSION L TO CENTER OF LEADS WHEN 4 8 { y FORMED PARALLEL. 4 \ 3, DIMENSION 8 DOES NOT INCLUDE MOLD O . | FLASH. . i ? 4, ROUNDED CORNERS OPTIONAL. PW AP AP AP ir fur A : NOTE 4 | Fle fg al 2 ZMOTOROLA SC (LOGIC) 44D) D MM 6367252 0079945 3 T-90-20 PACKAGE DIMENSIONS (Continued) ees =8614-PIN PACKAGE =e SOIC PACKAGE CASE 751A-02 NOTES: D SUFFIX 1, DIMENSIONS A AND B ARE DATUMS AND TIS A DATUM SURFACE, 2. DIMENSIONING AND TOLERANCING PER ANSI YI4.5M, 1982. : 3. CONTROLLING DIMENSION: MILLIMETER, ES , 4, DIMENSION A AND B DO NOT INCLUDE MOLD La} _> &\ Ete PROTRUSION. ACACACACACA an 5, MAXIMUM MOLD PROTRUSION 0.15 (0.008) i PER SIDE. el . @ 7 7PL >| Gg 7 for X 45 Ean + me fh Dalfe-un wt OR pol Ls [41025 (001) @[tle O[a O| E-13 9-3De an RR ee OTOROLA SC (LOGIC) PACKAGE DIMENSIONS (Continued) 44D D MM 6367252 0079946 5 T-90-20 ees 16-P]N PACKAGE anseuneeee CERAMIC PACKAGE CASE 620-09 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI YI4.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3, DIMENSION LTO CENTER OF LEAD WHEN FORMED PARALLEL. 4, DIM F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. 5 SEATING PLANE i e | F G J 16 Pt D 16 0.25 (0.010) @ 0.25 (0.010) PLASTIC PACKAGE CASE 648-06 NOTES: 1. LEADS WITHIN 0.13 mm (0.005} RADIUS OF TRUE POSITION AT SEATING PLANE AT MAXIMUM MATERIAL CONDITION. 2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 4, F" DIMENSION IS FOR FULL LEADS. 5, ROUNDED CORNERS OPTIONAL.Poe cise. all, MOTOROLA SC (LOGIC) 78) D MM 6367252 0079947 7 PACKAGE DIMENSIONS (Continued) SOIC PACKAGE ~ CASE 751B-03 D SUFFIX NOTES: 1. DIMENSIONS A AND B ARE DATUMS AND TIS A DATUM SURFACE. 2, DIMENSIONING AND TOLERANCING PER ANSI _Y14.5M, 1982, 3. CONTROLLING DIMENSION: MILLIMETER. 4. DIMENSION A AND 8 DO NOT INCLUDE MOLD --__[-A-}} + PROTRUSION. ~ fo , 5. MAXIMUM MOLD PROTRUSION 0.15 (0.008) : HAH AACA H PER SIDE. 7) 10 8 ar. tobe c - [-R x 45" SSS +f sennne Sh { p->| t 16 PL bk PANE M r+| [fy + SOIC PACKAGE CASE 751G-01 NOTES DW SUFFIX L DIMENSIONS AAND B ARE DATUMS AND TISA DATUM SURFACE. 2. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982, 3. CONTROLLING DIMENSION: MILLIMETER, 4. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 5. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. HAH AA AAA 1 TARR a||- own Ly mm ~ [e]oxs on OTs Ola G] 0566 ~sF-01 9-5MOTOROLA SC (LOGIC) 94) D MM &367e52 0079948 7 T-90-20 -_- PACKAGE DIMENSIONS (Continued) a ene 18-PIN PACKAGE Eli EE ee PLASTIC PACKAGE CASE 707-02 NOTES: 1, POSITIONAL TOLERANCE OF LEADS {D), SHALL BE WITHIN 0,25mm(0.010) AT MAXIMUM MATERIAL CONDITION, IN RELATION TO SEATING PLANE AND EACH OTHER. 2, DIMENSION TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSION B DOES NOT INCLUDE MOLD FLASH. AAAAAAA 18 10 D Q, 9 Wu A je Rie Oo WAU Nt tee Le oe them Jot PLANE CERAMIC PACKAGE CASE 726-04 ' WV NOTES: 1. LEADS, TRUE POSITIONED WITHIN 0.25 mm (0.010) DIA. AT SEATING PLANE, AT MAXIMUM MATERIAL CONDITION. 2. DIM L" TO CENTER OF LEADS WHEN FORMED PARALLEL, . ) fF 3, DIM A & "B INCLUDES MENISCUS, B 4, "F DIMENSION IS FOR FULL LEADS, HALE 1 so} | LEADS ARE OPTIONAL AT LEAD POSITIONS 1, 9, VV VVVYVV VV 10, AND 18, slab cra = 9-6ee ia aE MOTOROLA SC (LOGIC) CERAMIC PACKAGE CASE 623-05 > AOFM 24 13 [o> See aaa F A 48) D MM G3b7252 0079949 0 PACKAGE DIMENSIONS (Continued) FA A 24 > P 13 12 Vue A PLASTIC PACKAGE CASE 709-02 9568 F-03 lH che ake aie, xv te k = 9-7 T-90-29 nes D4.P1\) PACK AGE sms NOTES: 1, DIM L" TO CENTER OF LEADS WHEN FORMED PARALLEL. 2. LEADS WITHIN 0.13 mm (0.005) RADIUS OF TRUE POSITION AT SEATING PLANE AT MAXIMUM MATERIAL CONDITION. {WHEN FORMED PARALLEL). NOTES: 1, POSITIONAL TOLERANCE OF LEADS (D), SHALL BE WITHIN 0.25 mm {0.010} AT MAXIMUM MATERIAL CONDITION, IN RELATION TO SEATING PLANE AND EACH OTHER. 2, DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSION B DOES NOT INCLUDE MOLD FLASH.