74LVCH16244ADGG,118 - NEXPERIA - Datasheet.Directory

1. Product profile

1.1 General description

Dual logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic

package using TrenchMOS technology. This product is designed and qualified for use in

computing, communications, consumer and industrial applications only.

1.2 Features and benefits

Low conduction losses due to low

on-state resistance

Simple gate drive required due to low

gate charge

Suitable for high frequency

application s du e to fast swit ch ing

characteristics

1.3 Applications

DC-to-DC convertors

Lithium-ion batt er y ap plica tio n s

Notebook computers

Portable equipment

1.4 Quick reference data

[1] Single device conducting.

PHKD13N03LT

Dual N-channel TrenchMOS logic level FET

Rev. 5 — 27 December 2011 Product data sheet

Table 1. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

VDS drain-source voltage Tj≥25 °C; Tj≤150°C --30V

IDdrain current Tsp =25°C; V

GS =10V; see Figure 1;

see Figure 3 [1] - - 10.4 A

Ptot total power dissipation Tsp =25°C; see Figure 2 --3.57W

Static characteristics

RDSon drain-source on-state resistance VGS =10V; I

D=8A; T

j=25°C;

see Figure 9; see Figure 10 - 1720mΩ

Dynamic characteristics

QGD gate-drain charge VGS =5V; I

D=5A; V

DS =15V;

Tj=25°C; see Figure 11 -3.9-nC

PHKD13N03LT All information provided in this document is subject to legal disclaimers.

Product data sheet Rev. 5 — 27 December 2011 2 of 13

Nexperia PHKD13N03LT

Dual N-channel TrenchMOS logic level FET

2. Pinning information

3. Ordering information

4. Limiting values

[1] Single device conducting.

Table 2. Pinning information

Pin Symbol Description Simplified outline Graphi c sy mbol

1S1source1

SOT96-1 (SO8)

2 G1 gate1

3S2source2

4 G2 gate2

5D2drain2

6D2drain2

7D1drain1

8D1drain

mbk725

G1S1

D1 D2

G2S2

Table 3. Ordering information

Type number Package

Name Description Version

PHKD13N03LT SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

VDS drain-source voltage Tj≥25 °C; Tj≤150 °C - 30 V

VDGR drain-gate voltage Tj≥25 °C; Tj≤150 °C; RGS =20kΩ-30V

VGS gate-source voltage -20 20 V

IDdrain current Tsp =100°C; V

GS =10V; see Figure 1 [1] -6.6A

Tsp =25°C; V

GS =10V; see Figure 1;

see Figure 3 [1] - 10.4 A

IDM peak drain current Tsp = 25 °C; pulsed; tp≤10 µs; see Figure 3 [1] -42A

Ptot total power dissipation Tsp =25°C; see Figure 2 -3.57W

Tstg storage temperature -55 150 °C

Tjjunction temperature -55 150 °C

Source-drain diode

ISsource current Tsp =25°C [1] -3.2A

ISM peak source current Tsp = 25 °C; pulsed; tp≤10 µs [1] -42A

PHKD13N03LT All information provided in this document is subject to legal disclaimers.

Product data sheet Rev. 5 — 27 December 2011 3 of 13

Nexperia PHKD13N03LT

Dual N-channel TrenchMOS logic level FET

Fig 1. Normalized continuous drain curre nt as a

function of solde r point temperature Fig 2. Normalized total po we r dissi pa tio n as a

function of solder point temperature

Fig 3. Safe operating area; continuou s and peak drain curren ts as a function of drain-source voltage

Tsp (°C)

0 20015050 100

03aa25

120

Ider

(%)

Tsp (°C)

0 20015050 100

03aa17

120

Pder

(%)

003aag938

10-2

10-1

102

10-1 1 10 102

VDS

(V)

(A) Limit RDSon = VDS

/ ID

100 μs

10 ms

tp =10 μs

100 ms

1 ms

PHKD13N03LT All information provided in this document is subject to legal disclaimers.

Product data sheet Rev. 5 — 27 December 2011 4 of 13

Nexperia PHKD13N03LT

Dual N-channel TrenchMOS logic level FET

5. Thermal characteristics

Table 5. Thermal characteristics

Symbol Parameter Conditions Min Typ Max Unit

Rth(j-sp) thermal resistance from junction to

solder point see Figure 4 --35K/W

Rth(j-a) thermal resistance from junction to

ambient minimum footprint ; mounted on

a printed-circuit board -70-K/W

Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration

003aaa415

-1

-4

-3

-2

-1

1 10

(s)

th(j-sp)

(K/W)

single pulse

0.2

0.1

0.05

0.02

δ = 0.5

tpT

δ =

PHKD13N03LT All information provided in this document is subject to legal disclaimers.

Product data sheet Rev. 5 — 27 December 2011 5 of 13

Nexperia PHKD13N03LT

Dual N-channel TrenchMOS logic level FET

6. Characteristics

Table 6. Characteristics

Symbol Parameter Conditions Min Typ Max Unit

Static characteristics

V(BR)DSS drain-source breakdown

voltage ID= 250 µA; VGS =0V; T

j=-55°C 27--V

ID= 250 µA; VGS =0V; T

j=25°C 30--V

VGS(th) gate-source threshold voltage ID= 250 µA; VDS =V

GS; Tj=-55°C;

see Figure 8 --2.2V

ID= 250 µA; VDS =V

GS; Tj=150°C;

see Figure 8 0.5--V

ID= 250 µA; VDS =V

GS; Tj=25°C;

see Figure 8 11.52V

IDSS drain leakage current VDS =24V; V

GS =0V; T

j=25°C --1µA

VDS =24V; V

GS =0V; T

j= 100 °C - - 5 µA

IGSS gate leakage current VGS =20V; V

DS =0V; T

j= 25 °C - - 100 nA

VGS =-20V; V

DS =0V; T

j= 25 °C - - 100 nA

RDSon drain-source on-state

resistance VGS =10V; I

D=8A; T

j=150°C;

see Figure 9; see Fi gure 10 --34mΩ

VGS = 4.5 V; ID=7A; T

j=25°C;

see Figure 9 - 2126mΩ

VGS =10V; I

D=8A; T

j=25°C;

see Figure 9; see Fi gure 10 - 1720mΩ

Dynamic characteristics

QG(tot) total gate charge ID=5A; V

DS =15V; V

GS =5V;

Tj= 25 °C; see Figure 11 - 10.7 - nC

QGS gate-source charge - 2.7 - nC

QGD gate-drain charge - 3.9 - nC

Ciss input capacitance VDS =15V; V

GS = 0 V; f = 1 MHz;

Tj= 25 °C; see Figure 12 - 752 - pF

Coss output capacitance - 200 - pF

Crss reverse transfer capacitance - 130 - pF

td(on) turn-on delay time VDS =15V; R

L=10Ω; VGS =10V;

RG(ext) =6Ω; Tj=25°C; I

D=1.5A -6-ns

trrise time - 7 - ns

td(off) turn-off delay time - 23 - ns

tffall time - 11 - ns

Source-drain diode

VSD source-drain voltage IS=7A; V

GS =0V; T

j=25°C;

see Figure 13 - 0.86 1.1 V

trr reverse recovery time IS=7A; dI

S/dt = -100 A/µs; VGS =0V;

VDS =30V; T

j=25°C -25-ns

Qrrecovered charge - 5 - nC

PHKD13N03LT All information provided in this document is subject to legal disclaimers.

Product data sheet Rev. 5 — 27 December 2011 6 of 13

Nexperia PHKD13N03LT

Dual N-channel TrenchMOS logic level FET

Fig 5. Output characteristics: drain current as a

function of drain-source voltage; typical values Fig 6. Transfer characteristics: drain current as a

function of gate-s ourc e vol tage; typical values

Fig 7. Sub-threshold drain cu rrent as a function of

gate-source voltage Fig 8. Gate-source threshold voltage as a function of

junction temperature

VDS (V)

010.80.4 0.60.2

003aaa325

(A)

10 V 5 V 3 V VGS (V) = 2.8 V

2.7 V

2.6 V

2.5 V

2.4 V

2.3 V

003aaa326

VGS (V)

0321

(A)

VDS > ID × RDSon

Tj = 150 °C 25 °C

003aaa426

VGS (V)

0321

10−4

10−5

10−2

10−3

10−1

(A)

10−6

min typ max

03aa33

0.5

1.5

2.5

-60 0 60 120 180

Tj (°C)

VGS(th)

(V)

max

typ

min

PHKD13N03LT All information provided in this document is subject to legal disclaimers.

Product data sheet Rev. 5 — 27 December 2011 7 of 13

Nexperia PHKD13N03LT

Dual N-channel TrenchMOS logic level FET

Fig 9. Drain-source on-state resistance as a function

of drain current; typical values Fig 10. Normalized drain-source on-state resistance

factor as a function of junction temperature

Fig 11. Gate-source voltage as a function of gate

charge; typical values Fig 12. Input, output and reverse transfer capacitances

as a function of drain-source voltage; typical

values

ID (A)

0108462

003aaa327

RDSon

(mΩ)

0VGS (V) =

2.5 V 2.6 V 2.8 V

3 V

4 V 5 V

10 V

03aa27

0.5

1.5

−60 0 60 120 180

Tj (°C)

003aaa330

QG (nC)

015105

VGS

(V)

VDS (V)

10−1102101

003aaa328

103

102

104

(pF)

Ciss

Coss

Crss

PHKD13N03LT All information provided in this document is subject to legal disclaimers.

Product data sheet Rev. 5 — 27 December 2011 8 of 13

Nexperia PHKD13N03LT

Dual N-channel TrenchMOS logic level FET

Fig 13. Source current as a function of source-drain voltage; typical values

VSD (V)

0.2 10.80.4 0.6

003aaa329

(A)

150 °CTj = 25 °C

PHKD13N03LT All information provided in this document is subject to legal disclaimers.

Product data sheet Rev. 5 — 27 December 2011 9 of 13

Nexperia PHKD13N03LT

Dual N-channel TrenchMOS logic level FET

7. Package outline

Fig 14. Package outline SOT96-1 (SO8)

UNIT A

max. A1A2A3bpcD

(1) E(2) (1)

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

inches

1.75 0.25

0.10 1.45

1.25 0.25 0.49

0.36 0.25

0.19 5.0

4.8 4.0

3.8 1.27 6.2

5.8 1.05 0.7

0.6 0.7

0.3 8

0.25 0.10.25

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Notes

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.

1.0

0.4

SOT96-1

detail X

vMA

(A )

pin 1 index

076E03 MS-012

0.069 0.010

0.004 0.057

0.049 0.01 0.019

0.014 0.0100

0.0075 0.20

0.19 0.16

0.15 0.05 0.244

0.228 0.028

0.024 0.028

0.012

0.010.010.041 0.004

0.039

0.016

0 2.5 5 mm

scale

SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1

99-12-27

03-02-18

PHKD13N03LT All information provided in this document is subject to legal disclaimers.

Product data sheet Rev. 5 — 27 December 2011 10 of 13

Nexperia PHKD13N03LT

Dual N-channel TrenchMOS logic level FET

8. Revision history

Table 7. Revision history

Document ID Release date Data sheet status Change notice Supersedes

PHKD13N03LT v.5 20111227 Product data sheet - PHKD13N03LT v.4

Modifications: •Various changes to content.

PHKD13N03LT v.4 20111122 Product data sheet - PHKD13N03LT v.3

PHKD13N03LT All information provided in this document is subject to legal disclaimers.

Product data sheet Rev. 5 — 27 December 2011 11 of 13

Nexperia PHKD13N03LT

Dual N-channel TrenchMOS logic level FET

9. Legal information

9.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term 'short data sheet' is explained in section "Definitions".

[3] The p r oduct status of device(s) described in this document may have chang ed since this document was published and may differ in case of multiple devices. The latest product

status information is available on the Internet at URL http://www.nexperia.com.

9.2 Definitions

Preview — The document is a preview version only. The document is still

subject to formal approval, which may result in modificati ons or additions.

Nexperia does not give any representations or warranties as to

the accuracy or completeness of informati on included herein and shall have

no liability for the consequences of use of such info rmation.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. Nexperia does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liab ility for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and tit le. A short data sh eet is intended

for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local Nexperia sales

office. In case of any inconsisten cy or conf lict with the short data sheet, the

full data sheet shall pre vail.

Product specifica t io n — The information and data provided in a Product

data sheet shall define the specification of the product as agr eed between

Nexperia and its customer, unless Nexperia and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the Nexperia product is

deemed to off er functions and qualities beyond those described in the

Product data sheet.

9.3 Disclaimers

Limited warranty and liability — Information in this d ocument is be lieved to

be accurate and reliable. However, Nexperia does not give any

representations or warranties, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information.

In no event shall Nexperia be liable for any indirect, incidental,

punitive, special or consequ ential damages (including - wit hout limitatio n - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason

whatsoever, Nexperia’s aggregate and cumulative liability towards

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of Nexperia.

Right to make changes — Nexperia reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersed es an d r eplaces all inf ormation supplied pri or

to the publication hereof.

Suitability for use — Nexperia products are not designed,

authorized or warranted to be suitable for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of a Nexperia product can reasonably be expected

to result in perso nal injury, death or severe prop erty or environmental

damage. Nexperia accepts no liability for inclusion and/or use of

Nexperia products in such equipment or applications and

therefore such inclusion and/or use is at the customer’s own risk.

Quick reference data — The Quick reference dat a i s an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. Nexperia makes no

representation or warranty tha t such application s will be suitable for the

specified use without further testing or modification.

Customers are responsible for the design and ope ration of their applications

and products using Nexperia products, and Nexperia

accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the Nexperia

product is suitable and fit for the customer’s applications and

products planned, as well as fo r the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associate d with their

applications and products.

Nexperia does not accept any liability related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the application or use by customer’s

third party customer(s). Customer is responsible for doing all necessa ry

testing for the customer’s applications and products using Nexperia

products in order to avoid a default of the applications and

the products or of the application or use by customer’s third party

customer(s). Nexperia does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanent ly and irreversibly affect

the quality and reliability of the device.

Document status [1] [2] Product status [3] Definition

Objective [short] data sheet Development This document contains data from the objective specification for product development.

Preliminary [shor t] data sheet Qualification This document contains data from the preliminary specification.

Product [short] data sheet Production This document contains the product specification.

PHKD13N03LT All information provided in this document is subject to legal disclaimers.

Product data sheet Rev. 5 — 27 December 2011 12 of 13

Nexperia PHKD13N03LT

Dual N-channel TrenchMOS logic level FET

Terms and conditions of commercial sale — Nexperia

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nexperia.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individual

agreement is concluded only the terms and conditions of the respective

agreement shall apply. Nexperia hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of Nexperia products by customer.

No offer to sell or license — Nothing in this document ma y be interpret ed or

construed as an of fer to sell product s that is op en for accept ance or the grant ,

conveyance or implication of any license under any copyrights, patents or

other industrial or intellectual property rights.

Export control — This document as well as the item(s) d escribed herein may

be subject to export control regulat i ons. Export might require a prior

authorization from competent authorities.

Non-automotive qualified products — Unless this data sheet expressly

states that this specific Nexperia product is automotive qualified,

the product is not suitable for automotive use. It i s neit her qua lified nor tested

in accordance with automotive testing or application requirements. Nexperia

accepts no liability for inclusion and/or use of

non-automotive qualified products in automotive equipment or applicati ons.

In the event that customer uses the product for design-in and use in

automotive applications to automotive specifications and st andards, customer

(a) shall use the product without Nexperia’s warranty of the

product for such automotive applications, use and specifications, and (b)

whenever customer uses the product for automotive applications beyond

Nexperia’s specifications such use shall be solely at customer’s

own risk, and (c) customer fully indemnifies Nexperia for any

liability, damages or failed product claims resulting from custome r design and

use of the product for automotive applications beyond Nexperia’s

standard warranty and Nexperia’s product specifications.

9.4 Trademarks

Notice: All referenced b rands, produc t names, service names and trademarks

are the property of their respect i ve ow ners.

10. Contact information

For more information, please visit: http://www.nexperia.com

For sales office addresses, please send an email to: salesaddresses@nexperia.com

Nexperia PHKD13N03LT

Dual N-channel TrenchMOS logic level FET

11. Contents

1 Product profile. . . . . . . . . . . . . . . . . . . . . . . . . . .1

1.1 General description . . . . . . . . . . . . . . . . . . . . . .1

1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . .1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1

1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . .1

2 Pinning information. . . . . . . . . . . . . . . . . . . . . . .2

3 Ordering information. . . . . . . . . . . . . . . . . . . . . .2

4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2

5 Thermal characteristics . . . . . . . . . . . . . . . . . . .4

6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .5

7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .9

8 Revision history. . . . . . . . . . . . . . . . . . . . . . . . .10

9 Legal information. . . . . . . . . . . . . . . . . . . . . . . .11

9.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .11

9.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

9.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .11

9.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . .12

10 Contact information. . . . . . . . . . . . . . . . . . . . . .12

For more information, please visit: http://www.nexperia.com

For sales office addresses, please send an email to: salesaddresses@nexperia.com

Date of release:

27 December 2011