FEATURES
DLOW OFFSET: 5mV (max)
DLOW IB: 10pA (max)
DHIGH BANDWIDTH: 6.5MHz
DRAIL-TO-RAIL INPUT AND OUTPUT
DSINGLE SUPPLY: +2.3V to +5.5V
DSHUTDOWN: OPAx373
DSPECIFIED UP TO +125°C
DMicroSIZE PACKAGES: SOT23-5, SOT23-6,
SOT23-8 and DFN-10
APPLICATIONS
DPORTABLE EQUIPMENT
DBATTERY-POWERED DEVICES
DACTIVE FILTERS
DDRIVING A/D CONVERTERS
DESCRIPTION
The OPA373 and OPA374 families of operational
amplifiers are low power and low cost with excellent
bandwidth (6.5MHz) and slew rate (5V/µs). The input
range extends 200mV beyond the rails and the output
range is within 25mV of the rails. The speed/power ratio
and small size make them ideal for portable and
battery-powered applications.
The OPA373 family includes a shutdown mode. Under
logic control, the amplifiers can be switched from normal
operation to a standby current that is less than 1µA.
The OPA373 and OPA374 families of operational
amplifiers are specified for single or dual power supplies
of +2.7V to +5.5V, with operation from +2.3V to +5.5V. All
models are specified for −40°C to +125°C.
1
2
3
5
4
V+
−IN
Out
V−
+IN
OPA374
SOT23−5
1
2
3
4
8
7
6
5
Enable
V+
OUT
NC(2)
NC(2)
−IN
+IN
V−
OPA373
SO−8
1
2
3
4
8
7
6
5
NC(2)
V+
OUT
NC(2)
NC(2)
−IN
+IN
V−
OPA374
SO−8
1
2
3
4
5
10
9
8
7
6
V+
OUTB
−IN B
+IN B
Enable B
OUT A
−IN A
+IN A
V−
Enable A
OPA2373
MSOP−10
A
B
1
2
3
4
8
7
6
5
V+
OUT B
−IN B
+IN B
OUT A
−IN A
+IN A
V−
OPA2374
SO−8, SOT23−8
A
B
1
2
3
4
5
6
7
14
13
12
11
10
9
8
OUT D
−IN D
+IN D
V−
+IN C
−IN C
OUT C
OUT A
−IN A
+IN A
V+
+IN B
−IN B
OUT B
OPA4374
SO−14, TSSOP−14
AD
BC
1
2
3
6
5
4
V+
Enable
−IN
Out
V−
+IN
OPA373
SOT23−6(1)
A75
OPA2373
DFN−10
V+
OUT B
−INB
+IN B
Enable B
OUT A
−INA
+INA
V−
Enable A
Exposed
thermal
die pad on
underside
(Must be
connected to V−)
(1) Pin 1 of the SOT23-6 is determined by orienting the package marking as shown.
(2) NC indicates no internal connection.
OPA373, OPA2373
OPA374
OPA2374, OPA4374
SBOS279E − SEPTEMBER 2003 − REVISED MAY 2008
6.5MHz, 585µA, Rail-to-Rail I/O
CMOS Operational Amplifier
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Copyright 2003-2008, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
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2
PACKAGE/ORDERING INFORMATION(1)
PRODUCT PACKAGE-LEAD PACKAGE
DESIGNATOR
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING ORDERING
NUMBER TRANSPORT
MEDIA, QUANTITY
Shutdown
OPA373 SOT23-6 DBV −40°C to +125°C A75 OPA373AIDBVT Tape and Reel, 250
″ ″ ″ ″ ″ OPA373AIDBVR Tape and Reel, 3000
OPA373 SO-8 D −40°C to +125°C OPA373A OPA373AID Rails, 100
″ ″ ″ ″ ″ OPA373AIDR Tape and Reel, 2500
OPA2373 MSOP-10 DGS −40°C to +125°CAYO OPA2373AIDGST Tape and Reel, 250
″ ″ ″ ″ ″ OPA2373AIDGSR Tape and Reel, 2500
OPA2373 DFN-10 DRC −40°C to +125°C OCEQ OPA2373AIDRCT Tape and Reel, 250
″ ″ ″ ″ ″ OPA2373AIDRCR Tape and Reel, 3000
Non-Shutdown
OPA374 SOT23-5 DBV −40°C to +125°C A76 OPA374AIDBVT Tape and Reel, 250
″ ″ ″ ″ ″ OPA374AIDBVR Tape and Reel, 3000
OPA374 SO-8 D −40°C to +125°C OPA274A OPA374AID Rails, 100
″ ″ ″ ″ ″ OPA374AIDR Tape and Reel, 2500
OPA2374 SOT23-8 DCN −40°C to +125°CATP OPA2374AIDCNT Tape and Reel, 250
″ ″ ″ ″ ″ OPA2374AIDCNR Tape and Reel, 3000
OPA2374 SO-8 D −40°C to +125°C OPA2374A OPA2374AID Rails, 100
″ ″ ″ ″ ″ OPA2374AIDR Tape and Reel, 2500
OPA4374 SO-14 D −40°C to +125°C OPA4374A OPA4374AID Rails, 58
″ ″ ″ ″ ″ OPA4374AIDR Tape and Reel, 2500
OPA4374 TSSOP-14 PW −40°C to +125°C OPA4374A OPA4374AIPWT Tape and Reel, 250
″ ″ ″ ″ ″ OPA4374AIPWR Tape and Reel, 2500
(1) For the most current package and ordering information, see the Package Option Addendum located at the end of this datasheet.
ABSOLUTE MAXIMUM RATINGS(1)
Supply Voltage +7.0V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Signal Input Terminals, Voltage(2) −0.5V to (V+) + 0.5V. . . . . . . . .
Current(2) ±10mA. . . . . . . . . . . . . . . . . . .
Output Short-Circuit(3) Continuous. . . . . . . . . . . . . . . . . . . . . . . . .
Operating Temperature −55°C to +150°C. . . . . . . . . . . . . . . . . . . . .
Storage Temperature −65°C to +150°C. . . . . . . . . . . . . . . . . . . . . . .
Junction Temperature +150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead Temperature (soldering, 10s) +300°C. . . . . . . . . . . . . . . . . . . .
(1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only , an d
functional operation of the device at these or any other conditions
beyond those specified is not implied.
(2) Input terminals are diode-clamped to the power-supply rails.
Input signals that can swing more than 0.5V beyond the supply
rails should be current-limited to 10mA or less.
(3) Short-circuit to ground, one amplifier per package.
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
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3
ELECTRICAL CHARACTERISTICS: VS = +2.7V to +5.5V
Boldface limits apply over the specified temperature range, TA = −40°C to +125°C.
At TA = +25°C, RL = 10kΩ connected to VS/2, and VOUT = VS/2, unless otherwise noted.
OPA373, OPA2373, OP A374,
OPA2374, OPA4374
PARAMETER CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
Input Offset Voltage VOS VS = 5V 1 5 mV
over Temperature 6.5 mV
Drift dVOS/dT 3 µV/°C
vs Power Supply PSRR VS = 2.7V to 5.5V, VCM < (V+) − 2V 25 100 µV/V
over Temperature VS = 2.7V to 5.5V, VCM < (V+) − 2V 150 µV/V
Channel Separation, DC 0.4 µV/V
f = 1kHz 128 dB
INPUT VOLTAGE RANGE
Common-Mode Voltage Range VCM (V−) − 0.2 (V+) + 0.2 V
Common-Mode Rejection Ratio CMRR (V−) − 0.2V < VCM < (V+) − 2V 80 90 dB
over Temperature (V−) − 0.2V < VCM < (V+) − 2V 70 dB
VS = 5.5V, (V−) − 0.2V < VCM < (V+) + 0.2V 66 dB
over Temperature VS = 5.5V, (V−) − 0.2V < VCM < (V+) + 0.2V 60 dB
INPUT BIAS CURRENT
Input Bias Current IB±0.5 ±10 pA
Input Offset Current IOS ±0.5 ±10 pA
INPUT IMPEDANCE
Differential 1013 3 Ω pF
Common-Mode 1013 6 Ω pF
NOISE VCM < (V+) − 2V
Input Voltage Noise, f = 0.1Hz to 10Hz 10 µVPP
Input Voltage Noise Density, f = 10kHz en15 nV/√Hz
Input Current Noise Density, f = 10kHz in4 fA/√Hz
OPEN-LOOP GAIN
Open-Loop Voltage Gain AOL VS = 5V, RL = 100kΩ, 0.025V < VO < 4.975V 94 110 dB
over Temperature VS = 5V, RL = 100kΩ, 0.025V < VO < 4.975V 80 dB
VS = 5V, RL = 5kΩ, 0.125V < VO < 4.875V 94 106 dB
over Temperature VS = 5V, RL = 5kΩ, 0.125V < VO < 4.875V 80 dB
OUTPUT
Voltage Output Swing from Rail RL = 100kΩ18 25 mV
over Temperature RL = 100kΩ25 mV
RL = 5kΩ100 125 mV
over Temperature RL = 5kΩ125 mV
Short-Circuit Current ISC See Typical Characteristics
Capacitive Load Drive CLOAD See Typical Characteristics
Open-Loop Output Impedance f = 1MHz, IO = 0 220 Ω
FREQUENCY RESPONSE CL = 100pF
Gain-Bandwidth Product GBW 6.5 MHz
Slew Rate SR G = +1 5 V/µs
Settling Time, 0.1% tSVS = 5V, 2V Step, G = +1 1µs
0.01% VS = 5V, 2V Step, G = +1 1.5 µs
Overload Recovery Time VIN • Gain > VS0.3 µs
Total Harmonic Distortion + Noise THD+N VS = 5V, VO = 3VPP, G = +1, f = 1kHz 0.0013 %
ENABLE/SHUTDOWN
tOFF 3µs
tON 12 µs
VL (shutdown) V− (V−) + 0.8 V
VH (amplifier is active) (V−) + 2 V+ V
Input Bias Current of Enable Pin 0.2 µA
IQSD (per amplifier) < 0.5 1µA
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4
ELECTRICAL CHARACTERISTICS: VS = +2.7V to +5.5V (continued)
Boldface limits apply over the specified temperature range, TA = −40°C to +125°C.
At TA = +25°C, RL = 10kΩ connected to VS/2, and VOUT = VS/2, unless otherwise noted.
OPA373, OPA2373, OP A374,
OPA2374, OPA4374
PARAMETER UNIT
MAXTYPMIN
CONDITIONS
POWER SUPPLY
Specified Voltage Range VS2.7 5.5 V
Operating Voltage Range 2.3 to 5.5 V
Quiescent Current (per amplifier) IQIO = 0 585 750 µA
over Temperature 800 µA
TEMPERATURE RANGE
Specified Range −40 +125 °C
Operating Range −55 +150 °C
Storage Range −65 +150 °C
Thermal Resistance qJA °C/W
SOT23-5, SOT23-6, SOT23-8 200 °C/W
MSOP-10, SO-8 150 °C/W
SO-14, TSSOP-14 100 °C/W
DFN-10 JEDEC High-K Board 56 °C/W
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TYPICAL CHARACTERISTICS
At TA = +25°C, RL = 10kΩ connected to VS/2, and VOUT = VS/2, unless otherwise noted.
OPEN−LOOP GAIN AND PHASE vs FREQUENCY
Frequency (Hz)
10 100 1k 10k 100k 1M 10M
120
100
80
60
40
20
0
−20
30
0
−30
−60
−90
−120
−150
−180
Open−Loop Gain (dB)
Phase Margin (_)
Phase
Gain
POWER−SUPPLY AND COMMON−MODE
REJECTION RATIO vs FREQUENCY
Frequency (Hz)
100 1k 10k 100k 1M 10M
120
100
80
60
40
20
0
PSRR and CMRR (dB)
PSRR
CMRR
INPUT VOLTAGE NOISE
SPECTRAL DENSITY vs FREQUENCY
Frequency (Hz)
10 100 1k 10k 100k
1000
100
10
Voltage Noise (nV/√Hz)
TOTAL HARMONIC DISTORTION+NOISE
vs FREQUENCY
Frequency (Hz)
10 100 1k 10k 100k
0.100
0.010
0.001
Total Harmonic Distortion+Noise (%)
RL=5k
Ω
G = 10V/V
G=1V/V
OPEN−LOOP GAIN AND POWER−SUPPLY
REJECTION RATIO vs TEMPERATURE
Temperature (_C)
−50 −25 0 25 50 75 100 125 150
130
120
110
100
90
80
AOL,PSRR(dB)
PSRR
RL=5k
Ω
RL= 100kΩ
COMMON−MODE REJECTION RATIO vs TEMPERATURE
120
110
100
90
80
70
60
50
40
CMRR (dB)
Temperature (_C)
−50 −25 0 25 50 75 100 125 150
VCM =−0.2V to 3.5V
VCM =−0.2V to 5.7V
VS=5.5V
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6
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, RL = 10kΩ connected to VS/2, and VOUT = VS/2, unless otherwise noted.
QUIESCENT CURRENT vs TEMPERATURE
800
700
600
500
400
300
Quiescent Current (µA)
Temperature (_C)
−50 −25 0 255075100125150
QUIESCENT CURRENT vs SUPPLY VOLTAGE
Supply Voltage (V)
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
800
700
600
500
400
300
Quiescent Current (µA)
VOUT = 1/2[(V+) −(V−)]
SHORT−CIRCUIT CURRENT vs TEMPERATURE
Temperature (_C)
−50 −25 0 25 50 75 100 125
16
14
12
10
8
6
4
2
0
Short−Circuit Current (mA)
+ISC
−ISC
CONTINUOUS SHORT−CIRCUIT CURRENT vs
POWER−SUPPLY VOLTAGE
Power−Supply Voltage (V)
2.02.53.03.54.04.55.05.5
12
10
8
6
4
2
0
Short−CircuitCurrent (mA)
+ISC
−ISC
INPUT BIAS CURRENT vs TEMPERATURE
Temperature (_C)
−50 −250 255075100125
10k
1k
100
10
1
0.1
Input Bias Current (pA)
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
Output Current (mA)
0 2 4 6 8 101214161820
3
2
1
0
−1
−2
−3
Output Voltage (V)
−55_C
25_C
150_C
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7
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, RL = 10kΩ connected to VS/2, and VOUT = VS/2, unless otherwise noted.
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY
Frequency (Hz)
10k 100k 1M 10M
6
5
4
3
2
1
0
Output Voltage (VPP)
VS=5.5V
VS=5V
VS=2.5V
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
Offset Voltage (mV)
−5−4−3−2−10123455.5
Population
OFFSET VOLTAGE DRIFT MAGNITUDE
PRODUCTION DISTRIBUTION
Offset Voltage Drift (µV/_C)
12345678910111213141516
Population
Typical production distribution
of packaged units.
SMALL−SIGNAL STEP RESPONSE
200ns/div
50mV/div
CL= 100pF
SMALL−SIGNAL OVERSHOOT vs LOAD CAPACITANCE
Load Capacitance (pF)
10 100 1k 10k
60
50
40
30
20
10
0
Small−Signal Overshoot (%)
G=+1V/V
G=±10V/V
RFB =10k
Ω
Refer to the Capacitive Load
and Stability section for tips
on improving performance.
LARGE−SIGNAL STEP RESPONSE
400ns/div
1V/div
CL= 100pF
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, RL = 10kΩ connected to VS/2, and VOUT = VS/2, unless otherwise noted.
SETTLING TIME vs CLOSED−LOOP GAIN
Closed−Loop Gain (V/V)
1 10 100
100
10
1
0.1
Settling Time (µs)
0.01%
0.1%
Frequency (Hz)
Channel Separation (dB)
140
120
100
80
60
40
20
010 100 1K 10K 100K 1M 10M 100M
G = +1V/V, All Channels
CHANNEL SEPARATION vs FREQUENCY
RL = 5kΩ
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9
APPLICATIONS
The OPA373 and OPA374 series op amps are unity-gain
stable and suitable for a wide range of general-purpose
applications. Rail-to-rail input and output make them ideal
for driving sampling Analog-to-Digital Converters (ADCs).
Excellent ac performance makes them well-suited for
audio applications. The class AB output stage is capable
of driving 100kΩ loads connected to any point between V+
and ground.
The input common-mode voltage range includes both
rails, allowing the OPA373 and O PA374 series op amps to
be used in virtually any single-supply application up to a
supply voltage of +5.5V.
Rail-to-rail input and output swing significantly increases
dynamic range, especially in low-supply applications.
Power-supply pins should be bypassed with 0.01µF
ceramic capacitors.
OPERATING VOLTAGE
The OPA373 and OPA374 op amps are specified and
tested over a power-supply range of +2.7V to +5.5V
(±1.35V to ±2.75V). However, the supply voltage may
range from +2.3V to +5.5V (±1.15V to ±2.75V). Supply
voltages higher than 7.0V (absolute maximum) can
permanently damage the amplifier. Parameters that vary
over supply voltage or temperature are shown in the
Typical Characteristics section of this data sheet.
COMMON-MODE VOLTAGE RANGE
The input common-mode voltage range of the OPA373
and OPA374 series extends 200mV beyond the supply
rails. This is achieved with a complementary input
stage—an N-channel input differential pair in parallel with
a P-channel differential pair. The N-channel pair is active
for input voltages close to the positive rail, typically
(V+) − 1.65V to 200mV above the positive supply, while
the P-channel pair is on for inputs from 200mV below the
negative supply to approximately (V+) − 1.65V. There is a
500mV transition region, typically (V+) − 1.9V to
(V+) − 1.4V, in which both pairs are on. This 500mV
transition region, shown in Figure 1, can vary ±300mV with
process variation. Thus, the transition region (both stages
on) can range from (V+) − 2.2V to (V+) − 1.7V on the low
end, up to (V+) − 1.6V to (V+) − 1.1V on the high end.
Within the 500mV transition region PSRR, CMRR, offset
voltage, offset drift, and THD may be degraded compared
to operation outside this region.
Common−Mode Voltage (V)
−0.5 0 0.5
V−
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
2.0
1.5
1.0
0.5
0
−0.5
−1.0
−1.5
−2.0
Offset Voltage (mV)
V+
Figure 1. Behavior of Typical Transition Region at
Room Temperature
RAIL-TO-RAIL INPUT
The input common-mode range extends from (V−) − 0.2V
to (V+) + 0.2V. For normal operation, inputs should be
limited to this range. The absolute maximum input voltage
is 500mV beyond the supplies. Inputs greater than the
input common-mode range but less than the maximum
input voltage, while not valid, will not cause any damage
to the op amp. Unlike some other op amps, if input current
is limited, the inputs may go beyond the supplies without
phase inversion, as shown in Figure 2.
1V/div
1µs/div
5V
0V
VIN
VOUT
G=+1V/V,V
S=5V
Figure 2. OPA373: No Phase Inversion with
Inputs Greater Than the Power-Supply Voltage
Normally, input bias current is approximately 500fA;
however, input voltages exceeding the power supplies by
more than 500mV can cause excessive current to flow in
or out of the input pins. Momentary voltages greater than
500mV beyond the power supply can be tolerated if the
current on the input pins is limited to 10mA. This is easily
accomplished with an input resistor; see Figure 3. (Many
input signals are inherently current-limited to less than
10mA, therefore, a limiting resistor is not required.)
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10
ROPA373
V+
VIN
VOUT
10mA max
IOVERLOAD
Figure 3. Input Current Protection for Voltages
Exceeding the Supply Voltage
RAIL-TO-RAIL OUTPUT
A class AB output stage with common-source transistors
is used to achieve rail-to-rail output. For light resistive
loads ( > 100kΩ), the output voltage can typically swing to
within 18mV from the supply rails. With moderate resistive
loads (5kΩ to 50kΩ), the output can typically swing to
within 100mV from the supply rails and maintain high
open-loop gain. See the Typical Characteristic curve,
Output Voltage Swing vs Output Current, for more
information.
CAPACITIVE LOAD AND STABILITY
OPA373 series op amps can drive a wide range of
capacitive loads. However , under certain conditions, all op
amps may become unstable. Op amp configuration, gain,
and load value are just a few of the factors to consider
when determining stability. An op amp in unity-gain
configuration is the most susceptible to the effects of
capacitive load. The capacitive load reacts with the op amp
output resistance, along with any additional load
resistance, to create a pole in the small-signal response
that degrades the phase margin. The OPA373 series op
amps perform well in unity-gain configuration, with a pure
capacitive load up to approximately 250pF. Increased
gains allow the amplifier to drive more capacitance. See
the Typical Characteristics curve, Small-Signal Overshoot
vs Capacitive Load, for further details.
One method of improving capacitive load drive in the
unity-gain configuration is to insert a small (10Ω to 20Ω)
resistor , R S, in series with the output, as shown in Figure 4.
This significantly reduces ringing while maintaining dc
performance for purely capacitive loads. When there is a
resistive load in parallel with the capacitive load, RS must
be placed within the feedback loop as shown to allow the
feedback loop to compensate for the voltage divider
created by RS and RL.
In unity-gain inverter configuration, phase margin can be
reduced by the reaction between the capacitance at the op
amp input and the gain setting resistors, thus degrading
capacitive load drive. Best performance is achieved by
using small valued resistors. However , when large valued
resistors cannot be avoided, a small (4pF to 6pF)
capacitor , C FB, can be inserted in the feedback, as shown
in Figure 5. This significantly reduces overshoot by
compensating the effect of capacitance, CIN, which
includes the amplifier input capacitance and printed circuit
board (PCP) parasitic capacitance.
RS
10Ωto 20Ω
OPA373
CL
RL
VIN
VOUT
V+
Figure 4. Series Resistor in Unity-Gain
Configuration Improves Capacitive Load Drive
RI
OPA373
VIN
VOUT
RF
CFB
CIN CL
V+
Figure 5. Improving Capacitive Load Drive
For example, when driving a 100pF load in unity-gain
inverter configuration, adding a 6pF capacitor in parallel
with the 10kΩ feedback resistor decreases overshoot from
57% to 12%, as shown in Figure 6.
Load Capacitance (pF)
10 100 1k 10k
60
50
40
30
20
10
0
Overshoot (%)
G=−1V/V
RFB =10k
Ω
CFB =6pF
Figure 6. Improving Capacitive Load Drive
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11
DRIVING ADCs
The OPA373 and OPA374 series op amps are optimized
for driving medium-speed sampling ADCs. The OPA373
and OPA374 op amps buffer the ADC input capacitance
and resulting charge injection, while providing signal gain.
The OPA373 is shown driving the ADS7816 in a basic
noninverting configuration, as shown in Figure 7. The
ADS7816 is a 12-bit, MicroPower sampling converter in
the MSOP-8 package. When used with the low-power,
miniature packages of the OPA373, the combination is
ideal for space-limited, low-power applications. In this
configuration, an R C network at the ADC input can be used
to provide anti-aliasing filtering.
Figure 8 shows the OPA373 driving the ADS7816 in a
speech band-pass filtered data acquisition system. This
small, low-cost solution provides the necessary
amplification and signal conditioning to interface directly
with an electret microphone. This circuit will operate with
VS = 2.7V to 5V.
The OPA373 is shown in the inverting configuration
described in Figure 9. In this configuration, filtering may b e
accomplished with the capacitor across the feedback
resistor.
ENABLE/SHUTDOWN
OPA373 and OPA374 series op amps typically require
585µA quiescent current. The enable/shutdown feature of
the OPA373 allows the op amp to be shut off in order to
reduce this current to less than 1µA.
ADS7816
12−Bit ADC
DCLOCK
DOUT
CS/SHDN
OPA373
+5V
VIN
V+
2
+In
3
−In
VREF
8
4GND
Serial
Interface
1
0.1µF0.1µF
7
6
5
NOTE: ADC Input = 0 to VREF
VIN =0Vto5Vfor
0V to 5V output.
RC network filters high frequency noise.
500Ω
3300pF
fSAMPLE =100kHz
Figure 7. The OPA373 in Noninverting Configuration Driving the ADS7816
C3
33pF
V+
3
18
4GND
5
6
7
−IN
+IN
2
DCLOCK
Serial
Interface
C2
1000pF
R1
1.5kΩR4
20kΩ
R5
20kΩ
R6
100kΩ
R8
150kΩ
R9
510kΩ
R7
51kΩ
DOUT
VREF
V+ = +2.7V to +5V
CS/SHDN
C1
1000pF
Electret
Microphone(1)
G = 100
Passband 300Hz to 3kHz
R3
1MΩ
R2
1MΩ
NOTE: (1) Electret microphone
powered by R1.
ADS7816
12−Bit ADC
1/2
OPA2373 1/2
OPA2373
Figure 8. The OPA2373 as a Speech Bypass Filtered Data Acquisition System
"#"$ %"#"
"#&
%"#&$ &"#&
SBOS279E − SEPTEMBER 2003 − REVISED MAY 2008
www.ti.com
12
ADS7816
12−Bit ADC
DCLOCK
DOUT
CS/SHDN
OPA373
+5V
VIN V+
2
+IN
3
−IN
VREF
8
4GND
Serial
Interface
1
0.1µF0.1µF
7
6
5
NOTE: ADC Input = 0 to VREF
5kΩ
5kΩ
330pF
500kΩ
3300pF
VS
2
Figure 9. The OPA373 in Inverting Configuration Driving the ADS7816
NOTE: FilterPro is a low-pass filter design program available for download at
no cost from TI’s web site (www.ti.com). The program can be used to determine
component values for other cutoff frequencies or filter types.
1/2
OPA373
R1
11.7kΩ
330pF
C1
680pF
R2
2.72kΩ
1/2
OPA373
C2
330pF
R3
21.4kΩ
C3
Figure 10. Three-Pole Sallen-Key Butterworth Low-Pass Filter
"#"$ %"#"
"#&
%"#&$ &"#&
SBOS279E − SEPTEMBER 2003 − REVISED MAY 2008
www.ti.com
13
DFN PACKAGE
The OPA2373 is available in a DFN-10 package (also
known as SON), which is a QFN package with lead
contacts on only two sides of the bottom of the package.
This leadless, near-chip-scale package maximizes board
space and enhances thermal and electrical characteristics
through an exposed pad. DFN packages are physically
small, have a smaller routing area, improved thermal
performance, and improved electrical parasitics, with a
pinout scheme that is consistent with other
commonly-used packages, such as SO and MSOP.
Additionally, the absence of external leads eliminates
bent-lead issues.
The DFN package can be easily mounted using standard
PCP assembly techniques. See Application Note,
QFN/SON PCB Attachment (SLUA271) and Application
Report, Quad Flatpack No-Lead Logic Packages
(SCBA017), both available for download at www.ti.com.
The exposed leadframe die pad on the bottom of the
package should be connected to V−.
LAYOUT GUIDELINES
The leadframe die pad should be soldered to a thermal pad
on the PCB. A mechanical data sheet showing an example
layout is attached at the end of this data sheet.
Refinements to this layout may be required based on
assembly process requirements.
Mechanical drawings located at the end of this data sheet
list the physical dimensions for the package and pad. The
five holes in the landing pattern are optional, and are
intended for use with thermal vias that connect the
leadframe die pad to the heatsink area on the PCB.
Soldering the exposed pad significantly improves
board-level reliability during temperature cycling, key
push, package shear, and similar board-level tests.
Even with applications that have low-power dissipation,
the exposed pad must be soldered to the PCB to provide
structural integrity and long-term reliability.
PACKAGE OPTION ADDENDUM
www.ti.com 21-Jul-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
OPA2373AIDGSR ACTIVE MSOP DGS 10 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2373AIDGSRG4 ACTIVE MSOP DGS 10 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2373AIDGST ACTIVE MSOP DGS 10 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2373AIDGSTG4 ACTIVE MSOP DGS 10 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2373AIDRCR ACTIVE SON DRC 10 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2373AIDRCRG4 ACTIVE SON DRC 10 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2373AIDRCT ACTIVE SON DRC 10 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2373AIDRCTG4 ACTIVE SON DRC 10 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2374AID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2374AIDCNR ACTIVE SOT-23 DCN 8 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2374AIDCNRG4 ACTIVE SOT-23 DCN 8 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2374AIDCNT ACTIVE SOT-23 DCN 8 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2374AIDCNTG4 ACTIVE SOT-23 DCN 8 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2374AIDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2374AIDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2374AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA373AID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
PACKAGE OPTION ADDENDUM
www.ti.com 21-Jul-2011
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
OPA373AIDBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA373AIDBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA373AIDBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA373AIDBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA373AIDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA373AIDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA373AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA374AID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA374AIDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA374AIDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA374AIDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA374AIDBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA374AIDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA374AIDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA374AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA4374AID ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA4374AIDG4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA4374AIDR ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
PACKAGE OPTION ADDENDUM
www.ti.com 21-Jul-2011
Addendum-Page 3
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
OPA4374AIDRG4 ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA4374AIPWR ACTIVE TSSOP PW 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA4374AIPWRG4 ACTIVE TSSOP PW 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA4374AIPWT ACTIVE TSSOP PW 14 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA4374AIPWTG4 ACTIVE TSSOP PW 14 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
OPA2373AIDGSR MSOP DGS 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
OPA2373AIDGST MSOP DGS 10 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
OPA2373AIDRCR SON DRC 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
OPA2373AIDRCT SON DRC 10 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
OPA2374AIDCNR SOT-23 DCN 8 3000 180.0 8.4 3.2 3.1 1.39 4.0 8.0 Q3
OPA2374AIDCNT SOT-23 DCN 8 250 180.0 8.4 3.2 3.1 1.39 4.0 8.0 Q3
OPA2374AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
OPA373AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
OPA374AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
OPA4374AIDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
OPA4374AIPWR TSSOP PW 14 2500 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
OPA4374AIPWT TSSOP PW 14 250 180.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
OPA2373AIDGSR MSOP DGS 10 2500 367.0 367.0 35.0
OPA2373AIDGST MSOP DGS 10 250 210.0 185.0 35.0
OPA2373AIDRCR SON DRC 10 3000 367.0 367.0 35.0
OPA2373AIDRCT SON DRC 10 250 210.0 185.0 35.0
OPA2374AIDCNR SOT-23 DCN 8 3000 210.0 185.0 35.0
OPA2374AIDCNT SOT-23 DCN 8 250 210.0 185.0 35.0
OPA2374AIDR SOIC D 8 2500 367.0 367.0 35.0
OPA373AIDR SOIC D 8 2500 367.0 367.0 35.0
OPA374AIDR SOIC D 8 2500 367.0 367.0 35.0
OPA4374AIDR SOIC D 14 2500 367.0 367.0 38.0
OPA4374AIPWR TSSOP PW 14 2500 367.0 367.0 35.0
OPA4374AIPWT TSSOP PW 14 250 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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