DS05-13103-4E
FUJITSU SEMICONDUCTOR
DATA SHEET
Copyright©2005-2007 FUJITSU LIMITED All rights reserved
Memory FRAM
CMOS
1 M Bit (128 K × 8)
MB85R1001
■DESCRIPTIONS
The MB85R1001 is an FRAM (Ferroelectric Random Access Memory) chip consisting of 131,072 words x 8 bits
of non-volatile memory cells created using ferroelectric process and silicon gate CMOS process technologies.
The MB85R1001 is able to retain data without using a back-up battery, as is needed for SRAM.
The memory cells used in the MB85R1001 can be used for at least 1010 read/write operations, which is a significant
improvement over the number of read and write operations supported by Flash memory and E2PROM.
The MB85R1001 uses a pseudo-SRAM interface that is compatible with conventional asynchronous SRAM.
■FEATURES
• Bit configuration : 131,072 words x 8bits
• Read/write endurance : 1010 times/bit (Min)
• Operating power supply voltage : 3.0 V to 3.6 V
• Operating temperature range : − 20 °C to + 85 °C
• Data retention : 10 years ( + 55 °C)
• Package : 48-pin plastic TSOP (1)
MB85R1001
2
■PIN ASSIGNMENTS
■PIN DESCRIPTIONS
Pin name Function
A0 to A16 Address In
I/O1 to I/O8 Data Input/Output
CE1 Chip Enable 1 in
CE2 Chip Enable 2 in
WE Write Enable in
OE Output Enable in
VCC Power Supply
GND Ground
NC No Connection
A11
A9
NC
A8
A13
WE
CE2
A15
NC
VCC
NC
NC
GND
NC
NC
VCC
NC
A16
A14
A12
A7
A6
A5
A4
OE
NC
GND
A10
CE1
NC
I/O8
I/O7
I/O6
I/O5
I/O4
VCC
NC
I/O3
I/O2
I/O1
NC
NC
NC
A0
A1
GND
A2
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
(FPT-48P-M25)
(TOP VIEW)
MB85R1001
3
■BLOCK DIAGRAM
■FUNCTION TRUTH TABLE
L = VIL, H = VIH, X can be either VIL or VIH, High-Z = High Impedance
: Latch address and latch data at falling edge, : Latch address and latch data at rising edge
Operation Mode CE1CE2 WE OE I/O1 to I/O8Supply Current
Standby Pre-charge
HXXX
High-Z Standby
(ISB)
XLXX
XXHH
Read L
HHL
Dout
Operation
(ICC)
Read
(Pseudo-SRAM, OE control) LHH
Write L
HLH
Din
Write
(Pseudo-SRAM, WE control) LH H
A0
A16
to
Address Latch.
Row Dec. Ferro Capacitor Cell
Column Dec.
S/A
I/O1 to I/O8
I/O8
I/O1
to
intCEB
intCE2
intWE
intOE
intCE2
intCEB
CE2
intCE2
·
·
·
·
·
WE
OE
CE1
MB85R1001
4
■ABSOLUTE MAXIMUM RATINGS
* : All voltages are referenced to VSS.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■RECOMMENDED OPERATING CONDITIONS
* : All voltages are referenced to VSS.
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.Always use semiconductor devices within their recommended operating
condition ranges. Operation outside these ranges may adversely affect reliability and could result in
device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
Parameter Symbol Rating Unit
Min Max
Supply Voltage* VCC −0.5 +4.0 V
Input Voltage* VIN −0.5 VCC+0.5 V
Output Voltage* VOUT −0.5 VCC+0.5 V
Ambient Operating Temperature TA−20 +85 °C
Storage Temperature Tstg −40 +125 °C
Parameter Symbol Value Unit
Min Typ Max
Supply Voltage* VCC 3.0 3.3 3.6 V
Input Voltage (high)* VIH VCC x 0.8 ⎯VCC + 0.5 V
Input Voltage (low)* VIL −0.5 ⎯+0.8 V
Operating Temperature TA−20 ⎯+85 °C
MB85R1001
5
■ELECTRICAL CHARACTERISTICS
1. DC CHARACTERISTICS
(within recommended operating conditions)
*1 : During the measurement of ICC , the Address, Data In were taken to only change once per active cycle.
Iout : output current
*2 : All pins other than setting pins should be input at the CMOS level voltages such as H ≥ VCC − 0.2 V, L ≤ 0.2 V.
Parameter Symbol Test Condition Value Unit
Min Typ Max
Input Leakage Current |ILI|VIN = 0 V to VCC ⎯⎯10 µA
Output Leakage Current |ILO|VOUT = 0 V to VCC,
CE1 = VIH or OE = VIH ⎯⎯10 µA
Supply Current ICC CE1 = 0.2 V, CE2 = VCC−0.2 V,
Iout = 0 mA*1⎯⎯15 mA
Standby Current ISB
CE1 ≥ VCC−0.2 V
⎯10 50 µACE2 ≤ 0.2 V*2
OE ≥ VCC−0.2 V, WE ≥ VCC−0.2 V*2
Output Voltage (high) VOH IOH = −0.1 mA VCC x 0.8 ⎯⎯V
Output Voltage (low) VOL IOL = 2.0 mA ⎯⎯0.4 V
MB85R1001
6
2. AC CHARACTERISTICS
• AC TEST CONDITIONS
Supply Voltage : 3.0 V to 3.6 V
Operating Temperature : −20 °C to +85 °C
Input Voltage Amplitude : 0.3 V to 2.7 V
Input Rising Time : 5 ns
Input Falling Time : 5 ns
Input Evaluation Level : 2.0 V / 0.8 V
Output Evaluation Level : 2.0 V / 0.8 V
Output Impedance : 50 pF
(1) Read Operation
(within recommended operating conditions)
(2) Write Operation
(within recommended operating conditions)
Parameter Symbol Value Unit
Min Max
Read Cycle Time tRC 150 ⎯ns
CE1 Active Time tCA1 120 2000 ns
OE Active Time tRP 120 2000 ns
Pre-charge Time tPC 20 ⎯ns
Address Setup Time tAS 0⎯ns
Address Hold Time tAH 50 ⎯ns
OE Setup Time tES 0⎯ns
Output Hold Time tOH 0⎯ns
Output Set Time tLZ 30 ⎯ns
CE1 Access Time tCE1 ⎯100 ns
CE2 Access Time tCE2 ⎯100 ns
OE Access Time tOE ⎯100 ns
Output Floating Time tOHZ ⎯20 ns
Parameter Symbol Value Unit
Min Max
Write Cycle Time tWC 150 ⎯ns
CE1 Active Time tCA1 120 2000 ns
CE2 Active Time tCA2 120 2000 ns
Pre-charge Time tPC 20 ⎯ns
Address Setup Time tAS 0⎯ns
Address Hold Time tAH 50 ⎯ns
Write Pulse Width tWP 120 ⎯ns
Data Setup Time tDS 0⎯ns
Data Hold Time tDH 50 ⎯ns
Write Setup Time tWS 0⎯ns
MB85R1001
7
(3) Power ON/OFF Sequence
(within recommended operating conditions)
3. Pin Capacitance
(f = 1 MHz, TA = +25 °C)
Parameter Sym-
bol
Value Unit
Min Typ Max
CE1 level hold time for Power OFF tpd 85 ⎯⎯ns
CE1 level hold time for Power ON tpu 85 ⎯⎯ns
Parameter Symbol Test Condition Value Unit
Min Typ Max
Input Capacitance CIN VIN = GND ⎯⎯10 pF
Output Capacitance COUT VOUT = GND ⎯⎯10 pF
MB85R1001
8
■TIMING DIAGRAMS
1. Read Cycle Timing (CE1, CE2 Control)
2. Read Cycle Timing (OE Control)
t
AS
t
AH
t
ES
Valid
t
RP
H or L
CE1
CE2
t
RC
t
CA1
t
CE1
t
PC
t
CE2
A0 to A16
OE
I/O1 to I/O8
t
OE
t
OHZ
High-Z
Valid
t
OH
t
LZ
Invalid Invalid
A0 to A16
OE
I/O1 to I/O8
t
AS
t
AH
t
RC
t
OE
t
OHZ
High-Z
Valid
t
OH
t
LZ
Valid H or L
t
RP
Invalid Invalid
t
PC
CE1
CE2
t
CA1
t
CA2
MB85R1001
9
3. Write Cycle Timing (CE1, CE2 Control)
4. Write Cycle Timing (WE Control)
CE1
CE2 tCA2
tCA1
tWC
tPC
A0 to A16
WE
Data In
tWP
tDH
High-Z
tAH
tAS
tDS
Valid H or L
Valid H or L
tWS
A0 to A16
tWP
tWC
tDH
High-Z
tAH
tAS
tDS
Valid H or L
Valid H or L
tPC
WE
Data In
CE1
CE2
tCA1
tCA2
MB85R1001
10
■POWER ON/OFF SEQUENCE
■NOTES ON USE
Data that is written prior to IR reflow is not guaranteed to be retained after IR reflow.
■ORDERING INFOMATION
Part number Package
MB85R1001PFTN 48-pin plastic TSOP(1)
(FPT-48P-M25)
CE1 > V
CC
× 0.8*CE1 : Don't Care CE1 > V
CC
× 0.8*
tputpd
VCC
CE2
3.0 V
1.0 V
VIH (Min)
VIL (Max)
GND
CE1 CE1
VCC
CE2
3.0 V
1.0 V
VIH (Min)
VIL (Max)
GND
* : CE1 (Max) < VCC + 0.5 V
Note : You can choose either of CE1 or CE2, or both for disenable control of the device.
CE2 ≤ 0.2 V
MB85R1001
11
■PACKAGE DIMENSIONS
Please confirm the latest Package dimension by following URL.
http://edevice.fujitsu.com/fj/DATASHEET/ef-ovpklv.html
48-pin plastic TSOP(1) Lead pitch 0.50 mm
Package width ×
package length 12.00 × 12.40 mm
Lead shape Gullwing
Sealing method Plastic mold
Mounting height 1.20 mm MAX
Weight 0.37 g
Code
(Reference) P-TSOP(1)48-12×12.4-0.50
48-pin plastic TSOP(1)
(FPT-48P-M25)
(FPT-48P-M25)
C
2003 FUJITSU LIMITED F48043S-c-2-2
24
1 48
25
LEAD No.
12.40±0.10(.488±.004)
14.00±0.20(.551±.008)
0.08(.003).006 –.001
+.002
–0.03
+0.05
0.145
"A"
INDEX
12.00±0.10
(.472±.004)
1.13±0.07
0.10±0.05
0.50(.020)
.009 –.002
+.002
–0.04
+0.05
0.22 M
0.10(.004)
0.25(.010) 0.60±0.15
(.024±.006)
0˚~8˚
Details of "A" part
(.044±.003)(Mounting height)
(Stand off)
(.004±.002)
*2
*1
Dimensions in mm (inches).
Note: The values in parentheses are reference values
Note 1) *1 : Resin protrusion. (Each side : +0.15 (.006) Max).
Note 2) *2 : These dimensions do not include resin protrusion.
Note 3)Pins width and pins thickness include plating thickness.
Note 4) Pins width do not include tie bar cutting remainder.
MB85R1001
F0704
FUJITSU LIMITED
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