Page 18 Rev 3.0, Apr 20, 2020
Patent Protected: US 9,729,059 B1; US 10,193,442 B2
Copyright© 2018–20 TDK Corporation. All rights reserved.
All registered trademarks and trademarks are the property of their respective owners.
Data and specifications subject to change without notice.
Pre-biased start-up
The FS1406 can start up into a pre-charged output
smoothly, without causing oscillations and
disturbances of the output voltage. When it starts
up in this way, the Control and Synchronous
MOSFETs are forced off until the internal Soft-Start
(SS) signal exceeds the sensed output voltage at
the VOS pin. Only then is the first gate signal of the
Control MOSFET generated, followed by comple-
mentary turn on of the Synchronous MOSFET. The
Power Good (PG) function is not active until this
point.
Shut-down mechanisms
The FS1406 has two shut-down mechanisms:
• Hard shut-down or decay according to load
Initiated by de-asserting the En pin.
Both drivers switch off and the digital-to-
analog converter (DAC) and soft-start are
pulled down instantaneously.
• Soft-Stop or controlled ramp down
Initiated by setting user register bit
SoftStopEnable to 1 and user register bit
SoftDisable to 1. The SS signal falls to 0 at the
same rate as it rises during start-up; the drivers
are disabled only when it reaches 0. The output
voltage then follows the SS signal down to 0.
The SoftDisable bit must not be toggled while
the part is enabled and switching. Instead, for
applications requiring soft-stop, this bit must
be set to 1 and, with the En pin asserted, the
SoftStopEnable bit must be toggled to soft-
start or soft-stop the device.
By default, both the SoftDisable bit and the
SoftStopEnable bit are 0, which means that
soft-stop operation is disabled by default.
Switching frequency, minimum on-
time and off-time
The switching frequency of the FS1406 depends on
the output voltage. For an output voltage of 1.8V,
the switching frequency is nominally 2MHz.
When the output voltage is set by programming
the user registers, the appropriate switching
frequency is also programmed at the factory.
When the output voltage is set using an external
resistor divider, the switching frequency
automatically adjusts to the appropriate value:
=650 ×
0.6
Therefore, with either method, system designers
need not concern themselves with selecting the
switching frequency and have one fewer design
task to manage.
When input voltage is high relative to target
output voltage, the Control MOSFET is switched on
for shorter periods. The shortest period for which
it can reliably be switched on is defined by
minimum on-time (TON(MIN)). During start-up, when
the output voltage is very small, the FS1406
operates with minimum on-time.
When input voltage is low relative to target output
voltage, the Control MOSFET is switched on for
longer periods. The shortest period for which it can
be switched off is defined by minimum off-time
(TOFF(MIN)). The Synchronous MOSFET stays on
during this period and its current is detected for
over-current protection. This dictates the
minimum input voltage that can still allow the
device to regulate its output at the target voltage.
Figure 10 shows the minimum input voltage
required for some typical output voltages. This
curve assumes typical efficiency numbers; since it
is affected by efficiency, system designers should
validate the values in their own applications.