PD-9.901 international Rectifier IRF630S HEXFET Power MOSFET Surface Mount Available in Tape & Reel D _ Dynamic dv/dt Rating Voss = 200V Repetitive Avalanche Rated @ Fast Switching @ Ease of Paralleling @ Simple Drive Requirements Rpgcon) = 0.400 S lp = 9.0A Description Third Generation HEXFETs from International Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SMD-220 is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The SMD-220 is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. ( LS SMD-220 Absolute Maximum Ratings Parameter Max. Units lo @ Tce = 25C Continuous Drain Current, Vas @ 10 V 9.0 Ip @ Tc = 100C | Continuous Drain Current, Vas @ 10 V 5.7 A lom Pulsed Drain Current 36 Pp @ Te = 25C _ | Power Dissipation 74 Ww Pp @ Ta=25C_ | Power Dissipation (PCB Mount)** 3.0 Linear Derating Factor 0.59 WC Linear Derating Factor (PCB Mount)** - 0.025 Vas Gate-io-Source Voltage +20 Vv Eas Single Pulse Avalanche Energy @ 250 mJ lag Avalanche Current 9.0 A Ear Repetitive Avalanche Energy 7A mJ dv/dt Peak Diode Recovery dv/dt 5.0 Vins Tu, Tste@ Junction and Storage Temperature Range -65 to +150 C Soldering Temperature, for 10 seconds 300 (1.6mm from case) Thermal Resistance Parameter Min. Typ. Max. Units Rac Junction-to-Case _ = 17 Rasa Junction-to-Ambient (PCB mount)** _ 40 CAN Raa Junction-io-Ambient _ _ 62 ** When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994. 203IRF630S Electrical Characteristics @ Ty = 25C (unless otherwise specified) Parameter Min. | Typ. | Max. | Units Test Conditions Vierypss Drain-to-Source Breakdown Voltage 200 | = V__ | Ves=0V, In= 250nA AViarypss/ATy| Breakdown Voltage Temp. Coefficient | 0.24 | | VC | Reference to 25C, lo= 1mA Rosvon) Static Drain-to-Source On-Resistance _ | 0.40 | Q. | Vas=10V, In=5.4A Veash) Gate Threshold Voltage 2.0 _ 4.0 V_ | Vps=Vas, Ip= 250nA Gs Forward Transconductance 3.8 _ = S__| Vos=50V, Ip=5.4A loss Drain-to-Source Leakage Current = 25 HA Vos=200V, Vas=0V _ _ 250 Vps=160V, Vas=0V, Ty=125C less Gate-to-Source Forward Leakage _ _ 100 nA Vas=20V Gate-to-Source Reverse Leakage _ | -100 Ves=-20V Qg Total Gate Charge }/ | 4 Ip=5.9A Qgs Gate-to-Source Charge - 7.0 nC | Vps=160V Qoa Gate-to-Drain ("Miller") Charge _ _ 23 Ves=10V See Fig. 6 and 13 @ tafon) Turn-On Delay Time _ 9.4 = Vpp=100V tr Rise Time _ 28 _ ns lp=5.9A tom Turn-Off Delay Time _ 39 _ Re=t20 t Fall Time _ 20 _ Rpo=i6Q See Figure 10 @ Lo Internal Drain Inductance 45) B mn i(o. oad ) g nH | from package ir) Ls Internal Source inductance |75) and center of die contact 8 Ciss Input Capacitance - 800 _- Vas=0V Coss Output Capacitance | 240 | PF | Vps=25V Ciss Reverse Transfer Capacitance _ 76 _ f=1.0MHz See Figure 5 Source-Drain Ratings and Characteristics Parameter Min. | Typ. | Max. | Units Test Conditions Is Continuous Source Current _ _ 9.0 MOSFET symbol D (Body Diode) . A showing the Ism Pulsed Source Current _ _ 36 integral reverse g (Body Diode) @ p-n junction diode. 8 Vsp Diode Forward Voltage _ _ 2.0 Vs Ty=25C, Is=9.0A, Vas=0V tre Reverse Recovery Time | 170 | 340 | ns | Ty=25C, Ip=5.9A Qn Reverse Recovery Charge _ 11 2.2 | uC jdi/dt=100A/us @ ton Forward Turn-On Time Intrinsic turn-on time is neglegible (turn-on is dominated by Lg+Lp) Notes: Repetitive rating; pulse width limited by Isps9.0A, di/dts120A/us, Vpp required las 600 500 400 300 200 100 Eas, Single Pulse Energy (mJ) Vps 0 25 50 75 100 125 150 Starting Ty, Junction Temperature(C) 'as 7 7 Fig 12c. Maximum Avalanche Energy Fig 12b. Unclamped Inductive Waveforms Vs. Drain Current Current Regulator | | | yt Lae Q | =.3yF tov 42 VO kt Qes + Qep Vas Vg Charge > Ig * Ip Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit Appendix A: Figure 14, Peak Diode Recovery dv/dt Test Circuit - See page 1505 Appendix B: Package Outline Mechanical Drawing See page 1507 Appendix C: Part Marking Information ~ See page 1515 International Appendix D: Tape & Reel Information - See page 1519 Rectifier 208