General Description
The MAX6736–MAX6745 are low-power dual-/triple-
voltage microprocessor (µP) supervisors. These
devices assert a reset if any monitored supply falls
below its factory-trimmed or adjustable threshold and
maintain reset for a minimum timeout period after all
supplies rise above their thresholds. The integrated
dual/triple supervisory circuits significantly reduce size
and power compared to separate ICs or discrete com-
ponents. The low supply current of 6µA makes these
devices ideal for portable equipment.
The MAX6736/MAX6737 are dual fixed-voltage µP
supervisors with a manual reset input. The MAX6738/
MAX6739 have one fixed and one adjustable reset
threshold and a manual reset input. The MAX6740/
MAX6743 are triple-voltage µP supervisors with two
fixed and one user-adjustable reset threshold inputs.
The MAX6741/MAX6744 are dual-voltage µP supervi-
sors with a power-OK (POK) output ideal for power-
supply sequencing. The MAX6742/MAX6745 monitor
the primary VCC supply and have an independent
power-fail comparator.
The MAX6736–MAX6745 monitor I/O supply voltages
(VCC1) from 1.8V to 5.0V and core supply voltages
(VCC2) from 0.9V to 3.3V with factory-trimmed reset
threshold voltage options (Table 1). An external
adjustable RSTIN input option allows monitoring volt-
ages down to 0.5V.
A variety of push-pull or open-drain reset outputs along
with manual reset input and power-fail input/output fea-
tures are available (see the Selector Guide). The
MAX6736–MAX6745 are offered in a space-saving 5-pin
SC70 package and operate over the -40°C to +85°C
temperature range.
Applications
Features
♦Dual-/Triple-Supply Reset Voltage Monitors
♦Precision Factory-Set Reset Thresholds for
Monitoring from 0.9V to 5.0V
♦Adjustable Reset Input Down to 0.488V
♦150ms and 1200ms (min) Reset Timeout Period
Options
♦VCC1 Power-OK Output for Power-Supply
Sequencing Applications (MAX6741/MAX6744)
♦Power-Fail Input/Power-Fail Output
(MAX6742/MAX6745)
♦6µA Supply Current
♦Tiny SC70 Package
MAX6736–MAX6745
Low-Power Dual-/Triple-Voltage SC70 µP
Supervisory Circuits
________________________________________________________________ Maxim Integrated Products 1
PART VOLTAGE
MONITORS
OPEN-DRAIN
RESET
PUSH-PULL
RESET
MANUAL
RESET
POWER-FAIL
INPUT/
OUTPUT
POK
OUTPUT
RSTIN
INPUT
MAX6736 2 fixed X — X — — —
MAX6737 2 fixed — X X — — —
MAX6738 1 fixed, 1 adj X — X — — X
Selector Guide
Ordering Information
19-2531; Rev 2; 12/05
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
PART
TEMP RANGE
PIN-PACKAGE
MAX6736XK_ _D_-T
-40°C to +85°C
5 SC70-5
MAX6737XK_ _D_-T
-40°C to +85°C
5 SC70-5
Note: The first “_ _” or “_” are placeholders for the threshold
voltage levels of the devices. Desired threshold levels are set
by the part number suffix found in Tables 1 and 2. The “_” after
the D is a placeholder for the reset timeout period suffix found
in Table 3. For example, the MAX6736XKLTD3-T is a dual-volt-
age supervisor VTH1 = 4.625V, VTH2 = 3.075V, and a 150ms
minimum reset timeout period. All devices are available in
tape-and-reel only. There is a 2500-piece minimum order
increment for standard versions (see Table 1). Sample stock is
typically held on standard versions only. Nonstandard versions
require a minimum order increment of 10,000 pieces. Contact
factory for availability.
Devices are available in both leaded and lead-free packaging.
Specify lead-free by replacing “-T” with “+T” when ordering.
Portable/Battery-
Powered Equipment
Multivoltage Systems
Notebook Computers
Controllers
PDAs
GPS Equipment
POS Equipment
Ordering Information and Selector Guide continued at end
of data sheet.
Pin Configurations, Typical Application Circuits, and
Functional Diagram appear at end of data sheet.
*Manual reset detect on
RESET
output.
MAX6736–MAX6745
Low-Power Dual-/Triple-Voltage SC70 µP
Supervisory Circuits
2_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VCC = 1.2V to 5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCC1, VCC2, POK1 to GND ......................................-0.3V to +6V
Open-Drain RESET, PFO to GND.............................-0.3V to +6V
Push-Pull RESET to GND..........................-0.3V to (VCC1 + 0.3V)
MR, RSTIN, PFI to GND............................-0.3V to (VCC1 + 0.3V)
Input/Output Current, All Pins .............................................20mA
Continuous Power Dissipation (TA= +70°C)
5-Pin SC70 (derate 3.1mW/°C above +70°C)..............247mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
UNITS
TA = -40°C to 0°C 1.2 5.5
Operating Voltage Range VCC1,
VCC2TA = 0°C to +85°C 1.0 5.5 V
VCC1 = 3.3V, VCC1 > VCC2, no load, reset
not asserted 510
VCC1 Supply Current ICC1
VCC1 = 1.8V, VCC1 < VCC2, no load, reset
not asserted 510
µA
VCC2 = 1.8V, VCC2 < VCC1, no load, reset
not asserted 12
VCC2 Supply Current ICC2
VCC2 = 3.3V, VCC2 > VCC1, no load, reset
not asserted 10 20
µA
TA = 0°C to +85°C
4.500 4.625 4.750
MAX67_ _L TA = -40°C to +85°C
4.425 4.825
TA = 0°C to +85°C
4.250 4.375 4.500
MAX67_ _M TA = -40°C to +85°C
4.175 4.575
TA = 0°C to +85°C
3.000 3.075 3.150
MAX67_ _T TA = -40°C to +85°C
2.950 3.200
TA = 0°C to +85°C
2.850 2.925 3.000
MAX67_ _S TA = -40°C to +85°C
2.800 3.050
TA = 0°C to +85°C
2.550 2.625 2.700
MAX67_ _R TA = -40°C to +85°C
2.505 2.745
TA = 0°C to +85°C
2.250 2.313 2.375
MAX67_ _Z TA = -40°C to +85°C
2.213 2.413
TA = 0°C to +85°C
2.125 2.188 2.250
MAX67_ _Y TA = -40°C to +85°C
2.088 2.288
TA = 0°C to +85°C
1.620 1.665 1.710
MAX67_ _W TA = -40°C to +85°C
1.593 1.737
TA = 0°C to +85°C
1.530 1.575 1.620
Reset Threshold for VCC1V
TH1
MAX67_ _V TA = -40°C to +85°C
1.503 1.647
V
MAX6736–MAX6745
Low-Power Dual-/Triple-Voltage SC70 µP
Supervisory Circuits
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 1.2V to 5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
TA = 0°C to +85°C
3.000 3.075 3.150
MAX67_ _T TA = -40°C to +85°C
2.905 3.050
TA = 0°C to +85°C
2.850 2.925 3.000
MAX67_ _S TA = -40°C to +85°C
2.800 3.050
TA = 0°C to +85°C
2.550 2.625 2.700
MAX67_ _R TA = -40°C to +85°C
2.505 2.745
TA = 0°C to +85°C
2.250 2.313 2.375
MAX67_ _Z TA = -40°C to +85°C
2.213 2.413
TA = 0°C to +85°C
2.125 2.188 2.250
MAX67_ _Y TA = -40°C to +85°C
2.088 2.288
TA = 0°C to +85°C
1.620 1.665 1.710
MAX67_ _W TA = -40°C to +85°C
1.593 1.737
TA = 0°C to +85°C
1.530 1.575 1.620
MAX67_ _V TA = -40°C to +85°C
1.503 1.647
TA = 0°C to +85°C
1.350 1.388 1.425
MAX67_ _I TA = -40°C to +85°C
1.328 1.448
TA = 0°C to +85°C
1.275 1.313 1.350
MAX67_ _H TA = -40°C to +85°C
1.253 1.373
TA = 0°C to +85°C
1.080 1.110 1.140
MAX67_ _G TA = -40°C to +85°C
1.062 1.158
TA = 0°C to +85°C
1.020 1.050 1.080
MAX67_ _F TA = -40°C to +85°C
1.002 1.098
TA = 0°C to +85°C
0.810 0.833 0.855
MAX67_ _E TA = -40°C to +85°C
0.797 0.869
TA = 0°C to + 85°C
0.765 0.788 0.810
Reset Threshold for VCC2V
TH2
MAX67_ _D TA = -40°C to +85°C
0.752 0.824
V
TA = 0°C to +85°C
0.476 0.488 0.500
RSTIN Threshold (MAX6738/
MAX6739/MAX6740/MAX6743)
VTH-RSTIN
TA = -40°C to +85°C
0.468 0.507
V
RSTIN Input Current VRSTIN ≥ 0.1V (Note 2) -10
+10
nA
Reset Threshold Hysteresis VTH1, VTH2, RSTIN, PFI 0.5 %
VCC1 ≥ 1.0V, ISINK = 50µA, TA = 0°C to
+85°C 0.3
VCC1 ≥ 1.2V, ISINK = 100µA 0.3
VCC1 ≥ 2.13V, ISINK = 1.2mA 0.3
RESET, POK1 Output Low VOL
VCC1 ≥ 4.25V, ISINK = 3.2mA, 0.4
V
VCC1 ≥ 2.38V, ISOURCE = 500µA, output
deasserted
0.8 ×
VCC
RESET Output High (Push-Pull) VOH VCC1 ≥ 4.75V, ISOURCE = 800µA, output
deasserted
0.8 ×
VCC
V
MAX6736–MAX6745
Low-Power Dual-/Triple-Voltage SC70 µP
Supervisory Circuits
4_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 1.2V to 5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
UNITS
RESET Output Open-Drain
Leakage Current
(MAX6736/MAX6738)
ILKG Output not asserted low (Note 2)
500
nA
POK1 Output Open-Drain
Leakage Output not asserted low (Note 2)
500
nA
VCC Reset Delay tRD VCC1, VCC2, or RSTIN falling at 10mV/µs
from VTH + 100mV to VTH - 100mV 35 µs
MAX67_ _ _ _ XK_ _D3
150 225 300
VCC Reset Timeout Period
(Note 3) tRP MAX67_ _ _ _ XK_ _ D7
1200 1800 2400
ms
MANUAL RESET (MAX6736–MAX6739 only)
MR to VCC1 Internal Pullup
Impedance
0.75
1.5
3.00
kΩ
MR Timeout Period tMRP Both D3 and D7 timing options
150 225 300
ms
MR Minimum Input Pulse Width tMPW 1µs
MR Glitch Rejection
100
ns
VIL 0.3 ×
VCC1
MR Input Voltage
VIH 0.8 ×
VCC1
V
MR to RESET Delay
300
ns
VCC1 POWER-OK OUTPUT (MAX6741/MAX6744 only)
POK1 Timeout Period tPOKP
37.5 56.25 75.0
ms
PUSHBUTTON RESET (MAX6740/MAX6741/MAX6742 only)
RESET to VCC1 Internal Pullup
Impedance 25 50
100
kΩ
Manual Reset Detect Debounce
Period tDEB (Note 4)
37.5 56.25 75.0
ms
MAX67_ _ _ _ XK_ _D3
150 225 300
Manual Reset Timeout
Period (Note 3) tMRP MAX67_ _ _ _ XK_ _ D7
1200 1800 2400
ms
Manual Reset Minimum Input
Pulse Width tMPW (Note 4) 1 µs
Manual Reset Release Detect
Threshold (Note 4) 0.5 ×
VCC1
V
Manual Reset Glitch Rejection (Note 4)
100
ns
Manual Reset to RESET Delay
300
ns
MAX6736–MAX6745
Low-Power Dual-/Triple-Voltage SC70 µP
Supervisory Circuits
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 1.2V to 5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWER-FAIL COMPARATOR (MAX6742/MAX6745 only)
TA = 0°C to +85°C
0.476 0.488 0.500
Power Fail In Threshold (Note 5)
VTH-PFI TA = -40°C to +85°C
0.468 0.507
V
Power Fail In Current IPFI VPFI ≥ 0.1V (Note 2) -10
+10
nA
VCC1 ≥ 1.53V, ISINK = 500µA 0.3
VCC1 ≥ 2.03V, ISINK = 1.2mA 0.3PFO Output Low VOL
VCC1 ≥ 4.25V, ISINK = 3.2mA 0.4
V
PFI to PFO Propagation Delay tP
PFI falling at 10mV/µs from VTH-PFI +
100mV to VTH-PFI - 100mV or rising at
10mV/µs from VTH-PFI - 100mV to VTH-PFI +
100mV (Note 5)
35 µs
PFO Startup Delay To output valid (Note 5) 5 ms
Note 1: All devices are 100% tested at TA= +25°C. All temperature limits are guaranteed by design.
Note 2: Guaranteed by design.
Note 3: tRD timeout period begins after POK1 timeout period (tPOKP) and VCC2 ≥VTH2 (max) (MAX6741/MAX6744).
Note 4: Refers to the manual reset function obtained by forcing the RESET output low.
Note 5: VCC1 ≥1.6V.
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
SUPPLY CURRENT vs. TEMPERATURE
MAX6736-45 toc01
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
6040200-20
1
2
3
4
5
6
7
8
9
10
0
-40 80
VCC1 = 3.3V, VCC2 = 2.5V
TOTAL
ICC1
ICC2
SUPPLY CURRENT vs. TEMPERATURE
MAX6736-45 toc02
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
6040200-20
1
2
3
4
5
6
7
8
9
10
0
-40 80
VCC1 = 2.5V, VCC2 = 1.8V
TOTAL
ICC1
ICC2
SUPPLY CURRENT vs. TEMPERATURE
MAX6736-45 toc03
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
6040200-20
1
2
3
4
5
6
7
8
9
10
0
-40 80
VCC1 = 1.8V, VCC2 = 1.2V
TOTAL
ICC1
ICC2
MAX6736–MAX6745
Low-Power Dual-/Triple-Voltage SC70 µP
Supervisory Circuits
6_______________________________________________________________________________________
NORMALIZED VCC/POK1/MR
TIMEOUT PERIOD vs. TEMPERATURE
MAX6736-45 toc04
TEMPERATURE (°C)
NORMALIZED VCC/POK1/MR RESET
TIMEOUT PERIOD
6040200-20
0.989
0.994
0.999
1.004
1.009
1.014
1.019
0.984
-40 80
MAXIMUM VCC1/VCC2 TRANSIENT DURATION
vs. RESET THRESHOLD OVERDRIVE
MAX6736-45 toc05
RESET THRESHOLD OVERDRIVE (mV)
MAXIMUM VCC1/VCC2 TRANSIENT DURATION (µs)
100
10
100
1000
10,000
0
10 1000
VCC1
VCC2
RESET OCCURS ABOVE
THESE LINES
NORMALIZED VCC RESET THRESHOLD
vs. TEMPERATURE
MAX6736-45 toc06
TEMPERATURE (°C)
NORMALIZED VCC RESET THRESHOLD
604020
0
-20
0.993
0.998
1.003
1.008
0.988
-40 80
NORMALIZED TO +25°C
VCC TO RESET OUTPUT DELAY
vs. TEMPERATURE
MAX6736-45 toc07
TEMPERATURE (°C)
VCC TO RESET OUTPUT DELAY (µs)
604020
0
-20
33.5
38.5
43.5
48.5
28.5
-40 80
100mV OVERDRIVE
RESET INPUT TO RESET OUTPUT DELAY
vs. TEMPERATURE
MAX6736-45 toc08
TEMPERATURE (°C)
RSTIN TO RESET OUTPUT DELAY (µs)
604020
0
-20
25
30
35
20
-40 80
100mV OVERDRIVE
POWER-FAIL INPUT TO POWER-FAIL
OUTPUT DELAY vs. TEMPERATURE
MAX6736-45 toc09
TEMPERATURE (°C)
PFI TO PFO DELAY (µs)
604020
0
-20
29
39
44
49
24
-40 80
100mV OVERDRIVE
RISING EDGE
FALLING EDGE
34
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
MAX6736–MAX6745
Low-Power Dual-/Triple-Voltage SC70 µP
Supervisory Circuits
_______________________________________________________________________________________ 7
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
MR TO RESET OUTPUT DELAY
MAX6736-45 toc10
100ns/div
VMR
2V/div
VRESET
2V/div
POWER-FAIL INPUT TO
POWER-FAIL OUTPUT DELAY
MAX6736-45 toc11
10µs/div
PFI
200mV/div
PFO
2V/div
VCC TO RESET OUTPUT DELAY
MAX6736-45 toc12
4µs/div
VCC
200mV/div
AC-COUPLED
VRESET
2V/div
0
100
200
300
400
500
045231678910
OUTPUT LOW VOLTAGE
vs. SINK CURRENT
MAX6736-45 toc13
SINK CURRENT (mA)
OUTPUT LOW VOLTAGE (mV)
VCC = 3.3V
0
1
2
3
4
0 0.50 1.00 1.500.25 0.75 1.25 1.75 2.00
OUTPUT HIGH VOLTAGE
vs. SOURCE CURRENT
MAX6736-45 toc14
SOURCING CURRENT (mA)
OUTPUT HIGH VOLTAGE (V)
VCC = 3.3V
MAX6736–MAX6745
Low-Power Dual-/Triple-Voltage SC70 µP
Supervisory Circuits
8_______________________________________________________________________________________
Pin Description
PIN
MAX6736
MAX6737
MAX6738
MAX6739
MAX6740
MAX6743
MAX6741
MAX6744
MAX6742
MAX6745
NAME
FUNCTION
11111
RESET
Reset Output, Push-Pull or Open Drain Active Low. RESET
changes from high to low when any monitored power-supply
input (VCC1, VCC2, RSTIN) drops below its selected reset
threshold. It remains low until all monitored power-supply
inputs exceed their selected reset thresholds for the VCC
reset timeout period. RESET is forced low if MR is low for at
least the MR minimum input pulse width. It remains low for
the MR reset timeout period after MR goes high. The push-
pull output is referenced to VCC1. The MAX6736/MAX6738
open-drain outputs require an external pullup resistor. The
MAX6740/MAX6741/MAX6742 open-drain outputs have an
internal 50kΩ pullup resistor to VCC1 and provide a manual
reset function.
22222GNDGround
33———MR
Manual Reset, Active Low. Pull low for at least MR minimum
input pulse width to force RESET low. Reset remains active
as long as MR is low and for the MR reset timeout period
after MR goes high. There is an internal 1.5kΩ pullup resistor
to VCC1.
4—4 4—
VCC2
Voltage Input 1. Power supply and input for the secondary
µP voltage reset monitor.
—4 3——
RSTIN
Adjustable Reset Threshold Input. RESET is asserted when
RSTIN is below the internal 0.488V reference level. Set the
adjustable reset threshold with an external resistor-divider
network. Connect RSTIN to VCC1 if unused.
55555
VCC1
Voltage Input 2. Power supply and input for the primary µP
voltage reset monitor.
———— 4PFI
Power-Fail Comparator Input. PFO is asserted when PFI is
below 0.488V. PFO is deasserted without any reset timeout
period when PFI goes above 0.488V. Connect PFI to an
external resistor network to set the desired monitor
threshold.
———— 3PFO Power-Fail Comparator Output, Open Drain Active Low. PFO
is asserted when PFI is below 0.488V.
——— 3 —
POK1
VCC1 Power-OK Output, Open Drain Active High. POK1
remains low as long as VCC1 is below VTH1. POK1 output
goes high after VCC1 exceeds VTH1 for the POK1 timeout
period. POK1 logic is independent of the MR or VCC2 inputs.
The output can be used to control VCC1-to-VCC2 supply
sequencing.
MAX6736–MAX6745
Low-Power Dual-/Triple-Voltage SC70 µP
Supervisory Circuits
_______________________________________________________________________________________ 9
PART NO.
SUFFIX
( _ _ )
VCC1 NOMINAL
VOLTAGE
THRESHOLD (V)
VCC2 NOMINAL
VOLTAGE
THRESHOLD (V)
LT 4.625 3.075
MS 4.375 2.925
MR 4.375 2.625
TZ 3.075 2.313
TW 3.075 1.665
TI 3.075 1.388
TG 3.075 1.110
TE 3.075 0.833
SY 2.925 2.188
SV 2.925 1.575
SH 2.925 1.313
SF 2.925 1.050
SD 2.925 0.788
RY 2.625 2.188
RV 2.625 1.575
RH 2.625 1.313
RF 2.625 1.050
PART NO.
SUFFIX
( _ _ )
VCC1 NOMINAL
VOLTAGE
THRESHOLD (V)
VCC2 NOMINAL
VOLTAGE
THRESHOLD (V)
RD 2.625 0.788
ZW 2.313 1.665
ZI 2.313 1.388
ZG 2.313 1.110
ZE 2.313 0.833
YV 2.188 1.575
YH 2.188 1.313
YF 2.188 1.050
YD 2.188 0.788
WT 1.665 3.075
WI 1.665 1.388
WG 1.665 1.110
WE 1.665 0.833
VR 1.575 2.625
VH 1.575 1.313
VF 1.575 1.050
VD 1.575 0.788
Table 1. Reset Voltage Threshold Suffix Guide for MAX6736/MAX6737/MAX6740/
MAX6741/MAX6743/MAX6744
Table 2. Reset Voltage Threshold Suffix
Guide for MAX6738/MAX6739/MAX6742/
MAX6745
Note: Standard versions, shown in bold, are available in the D3 timeout option only. Samples are typically held on standard versions
only. There is a 10,000-piece order increment on nonstandard versions. Other threshold voltage combinations may be available;
contact factory for availability.
PART NO.
SUFFIX
( _ )
VCC1 NOMINAL
VOLTAGE
THRESHOLD (V)
L 4.625
M4.375
T3.075
S 2.925
R 2.625
Z 2.313
Y2.188
W1.665
V 1.575
Note: Standard versions, shown in bold, are available in the
D3 timeout option only. Samples are typically held on standard
versions only. There is a 10,000-piece order increment on non-
standard versions. Other threshold voltages may be avail-
able; contact factory for availability.
Table 3. VCC Timeout Period Suffix
Guide
ACTIVE TIMEOUT PERIOD
TIMEOUT
PERIOD
SUFFIX MIN (ms) MAX (ms)
D3 150 300
D7 1200 2400
MAX6736–MAX6745
Low-Power Dual-/Triple-Voltage SC70 µP
Supervisory Circuits
10 ______________________________________________________________________________________
Detailed Description
Supply Voltages
The MAX6736–MAX6745 µP supervisory circuits main-
tain system integrity by alerting the µP to fault condi-
tions. These devices are optimized for systems that
monitor two or three supply voltages. The reset output
state is guaranteed to remain valid while either VCC1 or
VCC2 is above 1.2V.
Threshold Levels
The MAX6736/MAX6737/MAX6740/MAX6741/MAX6743/
MAX6744 input voltage threshold combinations are indi-
cated by a two-letter code in Table 1. The MAX6738/
MAX6739/MAX6742/MAX6745 input voltage thresholds
are indicated by a one-letter code in Table 2. Contact the
factory for the availability of other voltage thresholds.
Reset Output
The MAX6736–MAX6745 provide an active-low reset out-
put (RESET). RESET is asserted when the voltage at
either VCC1 or VCC2 falls below the voltage threshold
level, RSTIN drops below the threshold, or MR is pulled
low. Once reset is asserted, it stays low for the reset time-
out period. If VCC1, VCC2, or RSTIN goes below the reset
threshold before the reset timeout period is completed,
the internal timer restarts. The MAX6736/MAX6738/
MAX6740/MAX6741/MAX6742 have open-drain reset out-
puts, while the MAX6737/MAX6739/MAX6743/MAX6744/
MAX6745 have push-pull reset outputs (Figure 1).
The MAX6740/MAX6741/MAX6742 include a RESET
output with a manual reset detect function. The open-
drain RESET output has an internal 50kΩpullup to
VCC1. The RESET output is low while the output is
pulled to GND and remains low for at least the manual
reset timeout period after the external GND pulldown is
VTH1
VCC1
GND
GND
tRP
tMRP
GND
POK1
GND
VTH2
VCC2
GND
tPOKP
MR
RESET
SWITCH
BOUNCE
SWITCH
BOUNCE
Figure 1. Timing Diagram
MAX6736–MAX6745
Low-Power Dual-/Triple-Voltage SC70 µP
Supervisory Circuits
______________________________________________________________________________________ 11
released. The manual reset detect function is internally
debounced for the tDEB timeout period, so the output
can be connected directly to a momentary pushbutton
switch, if desired (Figure 2).
Manual Reset Input
Many microprocessor-based products require manual
reset capability, allowing the operator, a test techni-
cian, or external logic circuitry to initiate a reset while
the monitored supplies remain above their reset thresh-
olds. The MAX6736–MAX6739 have a dedicated
active-low MR input. The RESET is asserted low while
MR is held low and remains asserted for the manual
reset timeout period after MR returns high. The MR
input has an internal 1.5kΩpullup resistor to VCC1and
can be left unconnected if not used. MR can be driven
with CMOS logic levels, open-drain/open-collector out-
puts, or a momentary pushbutton switch to GND to cre-
ate a manual reset function.
Adjustable Input Voltage
The MAX6738/MAX6739 and MAX6740/MAX6743 pro-
vide an additional input to monitor a second or third
system voltage. The threshold voltage at RSTIN is typi-
cally 488mV. Connect a resistor-divider network to the
circuit as shown in Figure 3 to establish an externally
controlled threshold voltage, VEXT_TH.
VEXT_TH = 0.488V((R1 + R2) / R2)
Low leakage current at RSTIN allows the use of large-
valued resistors, resulting in reduced power consump-
tion of the system.
Power-Fail Comparator
PFI is the noninverting input to an auxiliary comparator. A
488mV internal reference (VTH-PFI) is connected to the
inverting input of the comparator. If PFI is less than
488mV, PFO is asserted low. PFO deasserts without a
timeout period when PFI rises above the externally set
threshold. Common uses for the power-fail comparator
include monitoring for low battery conditions or a failing
DC-DC converter input voltage (see the Typical
Application Circuits). The asserted PFO output can place
a system in a low-power suspend mode or support an
orderly system shutdown before monitored VCC voltages
drop below the reset thresholds. Connect PFI to an exter-
nal resistor-divider network as shown in Figure 4 to set
the desired trip threshold. Connect PFI to VCC1 if unused.
Applications Information
Interfacing to the µP with
Bidirectional Reset Pins
Most microprocessors with bidirectional reset pins can
interface directly to open-drain RESET output options.
Systems simultaneously requiring a push-pull RESET
output and a bidirectional reset interface can be in
logic contention. To prevent contention, connect a
4.7kΩresistor between RESET and the µP’s reset I/O
port as shown in Figure 5.
Figure 2. MAX6740/MAX6741/MAX6742 Manual Reset Timing Diagram
OPEN
CLOSED
tDEB
GND
tMRP tMRP
tDEB
VCC1
RESET
PUSHBUTTON
SWITCH
SWITCH
BOUNCE
SWITCH
BOUNCE
SWITCH
BOUNCE
SWITCH
BOUNCE
MAX6738
MAX6739
MAX6740
MAX6743
RSTIN
GND
VEXT_TH
R1
R2
Figure 3. Monitoring an Additional Voltage
MAX6736–MAX6745
Low-Power Dual-/Triple-Voltage SC70 µP
Supervisory Circuits
12 ______________________________________________________________________________________
Adding Hysteresis to the
Power-Fail Comparator
The power-fail comparator has a typical input hystere-
sis of 2.5mV. This is sufficient for most applications in
which a power-supply line is being monitored through
an external voltage-divider. If additional noise margin is
desired, connect a resistor between PFO and PFI, as
shown in Figure 6. Select the values of R1, R2, and R3
such that PFI sees VTH-PFI (488mV) when VEXT falls to
its power-fail trip point (VFAIL) and when VEXT rises to
its power-good trip point (VGOOD). The hysteresis win-
dow extends between the specified VFAIL and VGOOD
thresholds. R3 adds the additional hysteresis by sink-
ing current from the R1/R2 divider network when the
PFO output is logic low and sourcing current into the
network when PFO is logic high. R3 is typically an order
of magnitude greater than R1 or R2.
The current through R2 should be at least 1µA to ensure
that the 10nA (max) PFI input current does not significant-
ly shift the trip points. Therefore, for most applications:
R2 < VTH-PFI / 1mA < 0.488V / 1mA < 488kΩ
PFO is an open-drain output requiring an external
pullup resistor, R4. Select R4 to be less than 1% of R3.
VGOOD = DESIRED VEXT GOOD VOLTAGE THRESHOLD
VFAIL = DESIRED VEXT FAIL VOLTAGE THRESHOLD
VPU = VPULLUP (FOR OPEN-DRAIN PFO)
R2 = 488kΩ(FOR >1µA R2 CURRENT)
R3 = (R1 x VPU) / (VGOOD - VFAIL)
R4 ≤0.01 x R3
Power Sequencing Applications
Many dual-voltage processors/ASICs require specific
power-up/power-down sequences for the I/O and core
supplies.
RR
VV
VV V
V
V
GOOD TH PFI
TH PFI GOOD FAIL
PU
TH PFI
12=
()
()
−−
-
-
-
-
(
MAX6742
MAX6745
PFI
GND
VEXT_TH
A) VIN IS POSITIVE
R1
R2
PFO
VEXT_TH = VTH-PFI R1 + R2
R2
()
MAX6742
MAX6745
PFI
GND
VEXT_TH
VCC
B) VIN IS NEGATIVE
R1
R2
PFO
VEXT_TH = R21
R1
1
R2
VCC
R1
+
(() ) -
(VTH-PFI)
VPFI = 488mV
Figure 4. Using Power-Fail Input to Monitor an Additional
Power Supply
MAX6737
MAX6739
MAX6743
MAX6744
MAX6745
GND GND
VCC1V
CC2
VCC2
VCC1
RESET
RESET TO OTHER SYSTEM COMPONENTS
RESET
µP
4.7kΩ
Figure 5. Interfacing to µPs with Bidirectional Reset I/O
MAX6742
MAX6745
VEXT
R1 R4
R3
R2
PFI
GND
PFO
VGOOD = DESIRED VEXT GOOD VOLTAGE THRESHOLD
VFAIL = DESIRED VEXT FAIL VOLTAGE THRESHOLD
VOH = VCC1 (FOR PUSH-PULL PFO)
R2 = 200kΩ (FOR > 2.5µA R2 CURRENT)
R1 = R2 ((VGOOD - VTH-PFI) - (VTH-PFI)(VGOOD - VFAIL) / VPU) / VTH-PFI
R3 = (R1 x VOH) / (VGOOD - VFAIL)
VGOOD
VFAIL
VIN
PFO
VPULLUP
Figure 6. Adding Hysteresis to Power Fail for Push-Pull
PFO
MAX6736–MAX6745
Low-Power Dual-/Triple-Voltage SC70 µP
Supervisory Circuits
______________________________________________________________________________________ 13
Functional Diagram
VCC1
VCC2
RSTIN/PFI
VCC1
VCC1
VCC1
RESET
TIMEOUT
PERIOD
VCC2
POK1
RESET
RESET
OUTPUT
0.488V
1.23V
MR
PULLUP
MR
MAX6736–
MAX6745
PFO
DELAY
The MAX6741/MAX6744 offer a VCC1 POK (POK1) ideal
for VCC1-to-VCC2 sequencing. POK1 remains low as
long as VCC1 is below its VTH1 threshold. When VCC1
exceeds VTH1 for the POK1 timeout period (tPOKP), the
open-drain POK1 output is deasserted. The POK1 output
can then enable the VCC2 power supply (use an external
POK1 pullup resistor). RESET is deasserted when both
VCC1 and VCC2 remain above their selected thresholds
for the reset timeout period (tRP). The POK1 output can
be used for I/O before core or core before I/O sequenc-
ing, depending on the selected VCC1/VCC2 thresholds.
See the Typical Application Circuit and Figure 1.
Monitoring a Negative Voltage
The power-fail comparator can be used to monitor a
negative supply voltage using the circuit shown in
Figure 4. When the negative supply is valid, PFO is low.
When the negative supply voltage drops, PFO goes
high. The circuit’s accuracy is affected by the PFI
threshold tolerance, VCC, R1, and R2.
Transient Immunity
The MAX6736–MAX6745 supervisors are relatively
immune to short-duration falling VCC transients (glitch-
es). It is usually undesirable to reset the µP when VCC
experiences only small glitches. The Typical Operating
Characteristics show Maximum VCC1/VCC2Transient
Duration vs. Reset Threshold Overdrive, for which reset
pulses are not generated. The graph shows the maxi-
mum pulse width that a falling VCC transient might typi-
cally have without causing a reset pulse to be issued.
As the amplitude of the transient increases, the maxi-
mum allowable pulse width decreases. A 0.1µF bypass
capacitor mounted close to the VCC pin provides addi-
tional transient immunity.
Chip Information
TRANSISTOR COUNT: 249
PROCESS: BiCMOS
MAX6736–MAX6745
Low-Power Dual-/Triple-Voltage SC70 µP
Supervisory Circuits
14 ______________________________________________________________________________________
PART VOLTAGE
MONITORS
OPEN-DRAIN
RESET
PUSH-PULL
RESET
MANUAL
RESET
POWER-FAIL
INPUT/
OUTPUT
POK
OUTPUT
RSTIN
INPUT
MAX6739 1 fixed, 1 adj — X X — — X
MAX6740 2 fixed, 1 adj X* — X* — — X
MAX6741 2 fixed X* — X* — X —
MAX6742 1 fixed X* — X* X — —
MAX6743 2 fixed, 1adj — X — — — X
MAX6744 2 fixed — X — — X —
MAX6745 1 fixed — X — X — —
Selector Guide (continued)
*Manual reset detect on
RESET
output.
MAX6741
VCC2
IN
UNREGULATED
DC
OUT
DC/DC
CONVERTER
IN OUT
SHDN
DC/DC
CONVERTER
POK1 GND
µP
RESET
VCC1CORE
SUPPLY
I/O
SUPPLY
RESET
PUSHBUTTON
SWITCH
GND
MAX6742
VCC1
IN OUT
DC/DC
CONVERTER
PFI
GND
µP
RESET
PFO
VBATT
PUSHBUTTON
SWITCH
RESET
GND
VCC
Typical Application Circuits
MAX6736–MAX6745
Low-Power Dual-/Triple-Voltage SC70 µP
Supervisory Circuits
______________________________________________________________________________________ 15
Pin Configurations
TOP VIEW
GND
RSTINMR
15VCC1RESET
MAX6738
MAX6739
SC70
2
34
GND
VCC2RSTIN
15VCC1RESET
MAX6740
MAX6743
SC70
2
34
GND
VCC2MR
15VCC1RESET
MAX6736
MAX6737
SC70
2
34
GND
VCC2POK1
15VCC1RESET
MAX6741
MAX6744
SC70
2
34
GND
PFIPFO
15VCC1RESET
MAX6742
MAX6745
SC70
2
34
Ordering Information (continued)
PART
TEMP RANGE
PIN-PACKAGE
MAX6738XK_D_-T
-40°C to +85°C
5 SC70-5
MAX6739XK_D_-T
-40°C to +85°C
5 SC70-5
MAX6740XK_ _D_-T
-40°C to +85°C
5 SC70-5
MAX6741XK_ _D_-T
-40°C to +85°C
5 SC70-5
MAX6742XK_D_-T
-40°C to +85°C
5 SC70-5
MAX6743XK_ _D_-T
-40°C to +85°C
5 SC70-5
MAX6744XK_ _D_-T
-40°C to +85°C
5 SC70-5
MAX6745XK_D_-T
-40°C to +85°C
5 SC70-5
Note: The first “_ _” or “_” are placeholders for the threshold
voltage levels of the devices. Desired threshold levels are set
by the part number suffix found in Tables 1 and 2. The “_” after
the D is a placeholder for the reset timeout period suffix found
in Table 3. For example, the MAX6736XKLTD3-T is a dual-volt-
age supervisor VTH1 = 4.625V, VTH2 = 3.075V, and a 150ms
minimum reset timeout period. All devices are available in
tape-and-reel only. There is a 2500-piece minimum order
increment for standard versions (see Table 1). Sample stock is
typically held on standard versions only. Nonstandard versions
require a minimum order increment of 10,000 pieces. Contact
factory for availability.
Devices are available in both leaded and lead-free packaging.
Specify lead-free by replacing “-T” with “+T” when ordering.
MAX6736–MAX6745
Low-Power Dual-/Triple-Voltage SC70 µP
Supervisory Circuits
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
©2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
SC70, 5L.EPS
PACKAGE OUTLINE, 5L SC70
21-0076
1
1
C
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Maxim Integrated:
MAX6740XKVDD3+T MAX6740XKVFD3+T MAX6736XKRVD7+T MAX6736XKSFD3+T MAX6736XKTWD7+T
MAX6736XKVDD3+T MAX6736XKZGD3+T MAX6736XKZWD3+T MAX6737XKSFD3+T MAX6737XKSVD3+T
MAX6737XKTGD3+T MAX6740XKLTD3+T MAX6740XKSYD3+T MAX6740XKVHD3+T MAX6740XKWGD3+T
MAX6741XKTGD3+T MAX6741XKZGD3+T MAX6743XKLTD3+T MAX6743XKRVD3+T MAX6743XKSDD3+T
MAX6743XKSHD3+T MAX6743XKSVD3+T MAX6743XKSYD3+T MAX6743XKTGD3+T MAX6743XKVDD3+T
MAX6743XKVHD3+T MAX6743XKVRD3+T MAX6743XKWGD3+T MAX6743XKWTD3+T MAX6743XKYDD3+T
MAX6743XKYHD3+T MAX6743XKZGD3+T MAX6743XKZWD3+T MAX6744XKSHD3+T MAX6744XKSVD3+T
MAX6737XKSHD3+T MAX6737XKTZD3+T MAX6741XKLTD3+T MAX6741XKSDD3+T MAX6741XKSHD3+T
MAX6741XKSVD3+T MAX6741XKYDD3+T MAX6745XKSD3+T MAX6741XKRVD3+T MAX6740XKZGD3+T
MAX6738XKSD3+T MAX6740XKSDD3+T MAX6736XKTGD3+T MAX6738XKLD3+T MAX6745XKZD3+T
MAX6745XKRD3+T MAX6744XKTZD3+T MAX6738XKRD3+T MAX6738XKVD3+T MAX6738XKZD3+T
MAX6738XKTD3+T MAX396CPI+ MAX6326UR29+