CMOS ±5 V/+5 V,
4 Ω Dual SPST Switches
ADG621/ADG622/ADG623
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result fro
m its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©20012009 Analog Devices, Inc. All rights reserved.
FE ATU RES
5.5 Ω (maximum) on resistance
0.9 Ω (maximum) on resistance flatness
2.7 V to 5.5 V single supply
±2.7 V to ±5.5 V dual supply
Rail-to-rail operation
10-lead MSOP package
Typical power consumption (<0.01 µW)
TTL-/CMOS-compatible inputs
APPLICATIONS
Automatic test equipment
Power routing
Communication systems
Data acquisition systems
Sample-and-hold systems
Avionics
Relay replacements
Battery-powered systems
GENERAL DESCRIPTION
The ADG621/ADG622/ADG623 are monolithic, CMOS,
single-pole, single-throw (SPST) switches. Each switch of the
ADG621/ADG622/ADG623 conducts equally well in both
directions when on.
The ADG621/ADG622/ADG623 contain two independent
switches. The ADG621 and ADG622 differ only in that both
switches are normally open and normally closed. In the ADG623,
Switch 1 is normally open, and Switch 2 is normally closed. The
ADG623 exhibits break-before-make switching action.
The ADG621/ADG622/ADG623 offer low on resistance of
4 Ω, which is matched to within 0.25 between channels.
These switches also provide low power dissipation yet give
high switching speeds. The ADG621/ADG622/ADG623 are
available in a 10-lead MSOP package.
FUNCTIONAL BLOCK DIAGRAMS
ADG621
IN1
D2
S2
S1
D1
IN2
NOTES
1. SWITCHES SHOWN FOR A LOGIC 0 INPUT
02616-001
Figure 1.
ADG622
IN1
D2
S2
S1
D1
IN2
NOTES
1. SWITCHES SHOWN FOR A LOGIC 0 INPUT
02616-002
Figure 2.
ADG623
IN1
D2
S2
S1
D1
IN2
NOTES
1. SWITCHES SHOWN FOR A LOGIC 0 INPUT
02616-003
Figure 3.
PRODUCT HIGHLIGHTS
1. Low on resistance, RON (4 Ω typical).
2. Dual ±2.7 V to ±5.5 V or single +2.7 V to +5.5 V.
3. Low power dissipation; CMOS construction ensures low
power dissipation.
4. Tiny 10-lead MSOP package.
ADG621/ADG622/ADG623
Rev. B | Page 2 of 12
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams ............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Dual Supply ................................................................................... 3
Single Supply ................................................................................. 4
Absolute Maximum Ratings.............................................................5
ESD Caution...................................................................................5
Pin Configuration and Function Descriptions ..............................6
Terminology .......................................................................................7
Typical Performance Characteristics ..............................................8
Test Circuits ......................................................................................10
Outline Dimensions ........................................................................12
Ordering Guide............................................................................12
REVISION HISTORY
11/09—R ev. A to Rev. B
Changes to Table 5 ............................................................................ 5
Changes to Ordering Guide .......................................................... 12
6/07—Rev. 0 to Rev. A
Change to On Resistance Flatness, RFLAT(ON)
Specification (Table 1) ...................................................................... 3
Change to On Resistance Flatness, RFLAT(ON)
Specification (Table 2) ...................................................................... 4
Added Table 6.................................................................................... 6
Changes to Terminology Section.................................................... 7
Changes to Figure 13 ........................................................................ 9
Updated Outline Dimensions ....................................................... 12
Changes to Ordering Guide .......................................................... 12
11/01—Revision 0: Initial Versi on
ADG621/ADG622/ADG623
Rev. B | Page 3 of 12
SPECIFICATIONS
DUAL SUPPLY1
VDD = +5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter +25°C 40°C to +85°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range VSS to VDD V VDD = +4.5 V, VSS = −4.5 V
On Resistance, RON 4 typ VS = ±4.5 V, IS = −10 mA, see Figure 16
5.5 7 max
On Resistance Match Between Channels, ∆RON 0.25 typ VS = ±4.5 V, IS = −10 mA
0.35 0.4 max
On Resistance Flatness, RFLAT(ON) 0.9 0.9 typ VS = ±3.3 V, IS = −10 mA
1.5 max
LEAKAGE CURRENTS VDD = +5.5 V, VSS = −5.5 V
Source Off Leakage, IS (Off) ±0.01 nA typ VS = ±4.5 V, VD =
4.5 V, see Figure 17
±0.25 ±1 nA max
Drain Off Leakage, ID (Off) ±0.01 nA typ VS = ±4.5 V, VD =
4.5 V, see Figure 17
±0.25 ±1 nA max
Channel On Leakage, ID, IS (On) ±0.01 nA typ VS = VD = ±4.5 V, see Figure 18
±0.25 ±1 nA max
DIGITAL INPUTS
Input High Voltage, VINH 2.4 V min
Input Low Voltage, VINL 0.8 V max
Input Current, IINL or IINH 0.005 µA typ VIN = VINL or VINH
±0.1 µA max
Digital Input Capacitance, CIN 2 pF typ
DYNAMIC CHARACTERISTICS2
tON 75 ns typ RL = 300 , CL = 35 pF; VS = 3.3 V, see Figure 19
120 155 ns max
tOFF 45 ns typ RL = 300 , CL = 35 pF; VS = 3.3 V, see Figure 19
70 85 ns max
Break-Before-Make Time Delay, tBBM (ADG623 Only) 30 ns typ RL = 300 Ω, CL = 35 pF; VS1 = VS2 = 3.3 V
10 ns min See Figure 20
Charge Injection 110 pC typ VS = 0 V, RS = 0 , CL = 1 nF, see Figure 21
Off Isolation −65 dB typ RL = 50 , CL = 5 pF, f = 1 MHz, see Figure 22
Channel-to-Channel Crosstalk −90 dB typ RL = 50 , CL = 5 pF, f = 1 MHz, see Figure 23
Bandwidth −3 dB 230 MHz typ RL = 50 , CL = 5 pF, see Figure 24
CS (Off) 20 pF typ f = 1 MHz
CD (Off) 20 pF typ f = 1 MHz
CD, CS (On) 70 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = 5.5 V, VSS = 5.5 V
IDD 0.001 µA typ Digital inputs = 0 V or 5.5 V
1.0 µA max
ISS 0.001 µA typ Digital inputs = 0 V or 5.5 V
1.0 µA max
1 Temperature range is as follows: B version, 40°C to +85°C.
2 Guaranteed by design; not subject to production test.
ADG621/ADG622/ADG623
Rev. B | Page 4 of 12
SINGLE SUPPLY1
VDD = 5 V ± 10%, VSS = 0 V, G N D = 0 V, unless otherwise noted.
Table 2.
Parameter +25°C 40°C to +85°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 to VDD V VDD = 4.5 V, VSS = 0 V
On Resistance, RON 7 typ VS = 0 V to 4.5 V, IS = 10 mA, see Figure 16
10 12.5 max
On Resistance Match Between Channels, ∆RON 0.5 Ω typ VS = 0 V to 4.5 V, IS = −10 mA
0.75 1 max
On Resistance Flatness, RFLAT(ON) 0.5 0.5 typ VS = 1.5 V to 3.3 V, IS = −10 mA
1.2 max
LEAKAGE CURRENTS VDD = 5.5 V
Source Off Leakage IS (Off) ±0.01 nA typ VS = 1 V/4.5 V, VD = 4.5 V/1 V, see Figure 17
±0.25 ±1 nA max
Drain Off Leakage ID (Off) ±0.01 nA typ VS = 1 V/4.5 V, VD = 4.5 V/1 V, see Figure 17
±0.25 ±1 nA max
Channel On Leakage, ID, IS (On) ±0.01 nA typ VS = VD = 1 V/4.5 V, see Figure 18
±0.25 ±1 nA max
DIGITAL INPUTS
Input High Voltage, VINH 2.4 V min
Input Low Voltage, VINL 0.8 V max
Input Current, IINL or IINH 0.005 µA typ VIN = VINL or VINH
±0.1 µA max
Digital Input Capacitance, CIN 2 pF typ
DYNAMIC CHARACTERISTICS2
tON 120 ns typ RL = 300 , CL = 35 pF; VS = 3.3 V, see Figure 19
210 260 ns max
tOFF 50 ns typ RL = 300 Ω, CL = 35 pF; VS = 3.3 V, see Figure 19
75 100 ns max
Break-Before-Make Time Delay, tBBM (ADG623 Only) 70 ns typ RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3.3 V
10 ns min See Figure 20
Charge Injection 6 pC typ VS = 0 V; RS = 0 Ω, CL = 1 nF, see Figure 21
Off Isolation 65 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 22
Channel-to-Channel Crosstalk 90 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 23
Bandwidth −3 dB 230 MHz typ RL = 50 , CL = 5 pF, see Figure 24
CS (Off) 20 pF typ f = 1 MHz
CD (Off) 20 pF typ f = 1 MHz
CD, CS (On) 70 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = 5.5 V
IDD 0.001 µA typ Digital Inputs = 0 V or 5.5 V
1.0 µA max
1 Temperature range is as follows: B Version, 40°C to +85°C.
2 Guaranteed by design; not subject to production test.
ADG621/ADG622/ADG623
Rev. B | Page 5 of 12
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter Rating
V
to V
13 V
VDD to GND 0.3 V to +6.5 V
VSS to GND +0.3 V to6.5 V
Analog Inputs1VSS0.3 V to VDD + 0.3 V
Digital Inputs1 0.3 V to VDD + 0.3 V or 30 mA,
whichever occurs first
Peak Current, S or D 100 mA (pulsed at 1 ms,
10% duty cycle maximum)
Continuous Current, S or D 50 mA
Operating Temperature Range
Industrial (B Version) 40°C to +85°C
Storage Temperature Range 65°C to +150°C
Junction Temperature 150°C
MSOP Package
θJA Thermal Impedance 206°C/W
θJC Thermal Impedance 44°C/W
Lead Soldering
Lead Temperature, Soldering
(10 sec)
300°C
IR Reflow, Peak Temperature 220°C
Pb-Free Soldering
Reflow, Peak Temperature 260(+0/5)°C
Time at Peak Temperature 20 sec to 40 sec
1 Overvoltages at INx, S, or D must be clamped by internal diodes. Currents
should be limited to the maximum ratings given.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Only one absolute maximum rating may be applied at any
one time.
Table 4. ADG621/ADG622 Truth Table
ADG621 INx ADG622 INx Switch Sx Condition
0 1 Off
1 0 On
Table 5. ADG623 Truth Table
IN1 IN2 Switch S1 Switch S2
0 0 Off On
0 1 Off Off
1 0 On On
1 1 On Off
ESD CAUTION
ADG621/ADG622/ADG623
Rev. B | Page 6 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NC = NO CONNECT
S1 1
D1 2
IN2 3
GND 4
VSS 5
VDD
10
IN1
9
D2
8
S2
7
NC
6
TOP VIEW
(No t t o Scale)
ADG621/
ADG622/
ADG623
02616-004
Figure 4. 10-Lead MSOP (RM-10)
Table 6. Pin Function Descriptions
Pin No. Mnemonic Description
1, 7 S1, S2 Source Terminal. May be an input or an output.
2, 8 D1, D2 Drain Terminal. May be an input or an output.
3, 9 IN2, IN1 Control Input.
4 GND Ground (0 V) Reference.
5 VSS Most Negative Power Supply in a Dual-Supply Application. In single-supply applications, this should be tied to
ground at the device.
6 NC No Connect.
10 VDD Most Positive Power Supply Potential.
ADG621/ADG622/ADG623
Rev. B | Page 7 of 12
TERMINOLOGY
IDD
Positive supply current.
ISS
Negative supply current
VD (VS)
Analog voltage on Terminal D and Te r mi n a l S.
RON
Ohmic resistance between Te r m in al D and Te r m in al S.
RFLAT (ON)
On resistance fl atness is defined as the difference between the
maximum and minimum value of on resistance as measured
over the specified analog signal range.
∆RON
On resistance match between any two channels.
IS (Off)
Source leakage current with the switch off.
ID (Off)
Drain leakage current with the switch off.
ID, IS (On)
Channel leakage current with the switch on.
VINL
Maximum input voltage for Logic 0.
VINH
Minimum input voltage for Logic 1.
IINL (IINH)
Input current of the digital input.
CS (Off)
Off switch source capacitance. Measured with reference to
ground.
CD (Off)
Off switch drain capacitance. Measured with reference to
ground.
CD, CS (On)
On switch capacitance. Measured with reference to ground.
CIN
Digital input capacitance.
tON
Delay time between the 50% and the 90% points of the digital
input and switch on condition.
tOFF
Delay time between the 50% and the 90% points of the digital
input and switch off condition.
tBBM
On or off time measured between the 90% points of both
switches when switching from one address state to another.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during on-off switching.
Off Isolation
A measure of an unwanted signal coupling through an
off switch.
Crosstalk
A measure of an unwanted signal that is coupled through from
one channel to another as a result of parasitic capacitance.
−3 dB Bandwidth
The frequency at which the output is attenuated by 3 dB.
On Response
The frequency response of the on switch.
Insertion Loss
The attenuation between the input and output ports of the
switch when the switch is in the on condition and is due to
the on resistance of the switch.
ADG621/ADG622/ADG623
Rev. B | Page 8 of 12
TYPICAL PERFORMANCE CHARACTERISTICS
02616-005
ON RE S ISTANCE (Ω)
8
7
6
5
4
3
2
1
0
V
D
, V
S
(V)
–5 –4 –3 –2 –1 0 1 2 3 54
V
DD
, V
SS
= ±2. 5V
T
A
= 25° C
V
DD
, V
SS
= ±3V
V
DD
, V
SS
= ±3. 3V
V
DD
, V
SS
= ±4. 5V
V
DD
, V
SS
= ±5V
Figure 5. On Resistance vs. VD, VS (Dual Supply)
02616-006
V
DD
= 2.7V
V
DD
= 3V
V
DD
= 3.3V V
DD
= 4.5V
V
DD
= 5V
T
A
= 25° C
V
SS
= 0V
V
D
, V
S
(V)
ON RE S ISTANCE (Ω)
20
0
16
12
8
4
1 2 3 4 5
0
Figure 6. On Resistance vs. VD, VS (Single Supply)
02616-007
VD, VS (V)
ON RE S ISTANCE (Ω)
6
–5
5
4
3
2
1
0–3 –1 1 53–4 –2 024
VDD = +5V
VSS = 5V
TA = +85°C
TA = +25°C
TA = 40°C
Figure 7. On Resistance vs. VD, VS for Different Temperatures
(Dual Supply)
02616-008
V
D
, V
S
(V)
ON RE S ISTANCE (Ω)
0 1 2 3 54
10
8
6
4
2
0
9
7
5
3
1
T
A
= +85°C
T
A
= +25°C
T
A
= 40°C
V
DD
= 5V
V
SS
= 0V
Figure 8. On Resistance vs. VD, VS for Different Temperature
(Single Supply)
TEMPERATURE (°C)
LE AKAGE CURRENT ( nA)
010 20 30 40 50 60 70 80
0.5
–0.5
0.2
0.4
0.3
0.1
0
–0.1
–0.2
–0.3
–0.4
ID (OFF)
ID, IS (O N)
IS (OFF)
VDD = +5V
VSS = 0V
VD =±4.5V
VS = ±4.5V
02616-009
Figure 9. Leakage Current vs. Temperature (Dual Supply)
TEMPERATURE (°C)
LE AKAGE CURRENT ( nA)
010 20 30 40 50 60 70 80
0.5
–0.5
0.2
0.4
0.3
0.1
0
–0.1
–0.2
–0.3
–0.4
ID (OFF)
ID, IS (O N)
IS (OFF)
VDD = 5V
VSS = 0V
VD = 4.5V /1V
VS = 1V/ 4.5V
02616-010
Figure 10. Leakage Current vs. Temperature (Single Supply)
ADG621/ADG622/ADG623
Rev. B | Page 9 of 12
02616-011
V
S
CHARGE INJECTION ( pC)
250
–5 –4 –3 –2 –1 0123 5
T
A
= 25° C
200
150
100
50
04
V
DD
= +5V
V
SS
= 0V
V
DD
= +5V
V
SS
= 5V
Figure 11. Charge Injection vs. Source Voltage
TEMPERATURE (°C)
40 20 020 40 60 80
TIME (n s)
180
160
0
80
60
40
20
140
100
120
tON
tOFF
V
DD
= +5V
V
SS
= 0V V
DD
= +5V
V
SS
= 5V
V
DD
= +5V
V
SS
= 5V
V
DD
= +5V
V
SS
= 0V
02616-012
Figure 12. tON/tOFF Times vs. Temperature
02616-013
0.2 110 100
FREQUENCY (MHz)
ATTENUATION (dB)
V
DD
= +5V
V
SS
= –5V
T
A
= 25° C
0
10
20
30
40
50
60
70
80
90
Figure 13. Off Isolation vs. Frequency
02616-014
0.2 110 100
FREQUENCY (MHz)
ATTENUATION (dB)
V
DD
= +5V
V
SS
= –5V
T
A
= 25° C
0
10
20
30
40
50
60
70
80
90
Figure 14. Crosstalk vs. Frequency
0.2 1k10
V
DD
= +5V
V
SS
= –5V
T
A
= 25° C
1100
FREQUENCY (MHz)
ATTENUATION (dB)
0
–2
–4
–6
–8
–10
–12
–14
02616-015
Figure 15. On Response vs. Frequency
ADG621/ADG622/ADG623
Rev. B | Page 10 of 12
TEST CIRCUITS
I
DS
V1
S D
V
S
R
ON
= V1/ I
DS
02616-016
S D
V
S
V
D
I
S
(OFF) I
D
(OFF)
AA
02616-017
S D
V
D
I
D
(ON)
A
02616-018
NC
NC = NO CONNECT
Figure 16. On Resistance Figure 17. Off Leakage Figure 18. On Leakage
0.1µF
V
S
IN
S D
V
DD
GND
R
L
300C
L
35pF
V
OUT
V
DD
V
IN
V
IN
V
OUT
tON tOFF
50% 50%
90% 90%
50% 50%
V
SS
V
SS
0.1µF
ADG621
ADG622
02616-019
Figure 19. Switching Times (tON, tOFF)
S1 D1
0.1µF
V
DD
IN1, IN2
V
S1
GND
R
L1
300
C
L1
35pF
V
OUT1
V
S2
V
OUT2
R
L2
300C
L2
35pF
S2
V
IN
D2
V
DD
tBBM tBBM
50% 50%
90%
V
IN
V
OUT1
V
OUT2
90%
90%
90%
0V
0V
0V
0.1µF
V
SS
V
SS
02616-020
Figure 20. Break-Before-Make Time Delay, tBBM (ADG623 Only)
S D
V
DD
IN
V
S
GND
C
L
1nF
V
OUT
R
S
V
DD
SW ON
V
IN
V
OUT
Q
INJ
= C
L
×ΔV
OUT
SW OFF
V
SS
V
SS
ΔV
OUT
02616-021
Figure 21. Charge Injection
ADG621/ADG622/ADG623
Rev. B | Page 11 of 12
NETWORK
ANALYZER
VDD VSS
0.1µF
0.1µF
VDD VSS
IN
VIN
S
D
OFF ISOLATION = 20 LOG VOUT
VS
GND
5050
RL
50
VS
VOUT
02616-022
Figure 22. Off Isolation
CHANNEL-TO-CHANNEL CROS S TALK = 20 LOG
NETWORK
ANALYZER
V
DD
V
SS
0.1µF
0.1µF
V
DD
V
SS
IN
V
OUT
V
S
GND
50
R
L
50
V
S
V
OUT
02616-023
D1 S1
S2 D2 R
50
R
50
Figure 23. Channel-to-Channel Crosstalk
NETWORK
ANALYZER
VDD VSS
0.1µF
0.1µF
VDD VSS
IN
VIN
S
D
INSERTION LOSS = 20 LOG VOUT WITH SWITCH
VOUT WITHOUT SWITCH
GND
50
RL
50
VS
VOUT
02616-024
Figure 24. Bandwidth
ADG621/ADG622/ADG623
Rev. B | Page 12 of 12
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-187-BA
091709-A
0.70
0.55
0.40
5
10
1
6
0.50 BSC
0.30
0.15
1.10 MAX
3.10
3.00
2.90
COPLANARITY
0.10
0.23
0.13
3.10
3.00
2.90
5.15
4.90
4.65
PIN 1
IDENTIFIER
15° MAX
0.95
0.85
0.75
0.15
0.05
Figure 25. 10-Lead Mini Small Outline Package [MSOP]
(RM-10)
Dimensions shown in millimeters
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding
ADG621BRM 40°C to +85°C 10-Lead Mini Small Outline Package [MSOP] RM-10 SXB
ADG621BRMREEL7 40°C to +85°C 10-Lead Mini Small Outline Package [MSOP] RM-10 SXB
ADG621BRMZ140°C to +85°C 10-Lead Mini Small Outline Package [MSOP] RM-10 SXB#
ADG621BRMZ-REEL1 40°C to +85°C 10-Lead Mini Small Outline Package [MSOP] RM-10 SXB#
ADG622BRM 40°C to +85°C 10-Lead Mini Small Outline Package [MSOP] RM-10 SYB
ADG622BRM-REEL 40°C to +85°C 10-Lead Mini Small Outline Package [MSOP] RM-10 SYB
ADG622BRM-REEL7 40°C to +85°C 10-Lead Mini Small Outline Package [MSOP] RM-10 SYB
ADG622BRMZ1 40°C to +85°C 10-Lead Mini Small Outline Package [MSOP] RM-10 S12
ADG622BRMZ-REEL1 40°C to +85°C 10-Lead Mini Small Outline Package [MSOP] RM-10 S12
ADG622BRMZ-REEL71 40°C to +85°C 10-Lead Mini Small Outline Package [MSOP] RM-10 S12
ADG623BRM 40°C to +85°C 10-Lead Mini Small Outline Package [MSOP] RM-10 SZB
ADG623BRM-REEL 40°C to +85°C 10-Lead Mini Small Outline Package [MSOP] RM-10 SZB
ADG623BRM-REEL7 40°C to +85°C 10-Lead Mini Small Outline Package [MSOP] RM-10 SZB
ADG623BRMZ1 40°C to +85°C 10-Lead Mini Small Outline Package [MSOP] RM-10 SZB#
ADG623BRMZ-REEL1 40°C to +85°C 10-Lead Mini Small Outline Package [MSOP] RM-10 SZB#
ADG623BRMZ-REEL71 40°C to +85°C 10-Lead Mini Small Outline Package [MSOP] RM-10 SZB#
1 Z= RoHS Compliant Part, # denotes RoHS compliant product and may be top or bottom marked.
©20012009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D02616-0-11/09(B)