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© 1998
MOS FIELD EFFECT TRANSISTOR
2SK3221
SWITCHING
N-CHANNEL POWER MOS FET
DATA SHEET
Document No. D13789EJ1V0DS00 (1st edition)
Date Published June 2002 NS CP(K)
Printed in Japan
DESCRIPTION
The 2SK3221 is N-channel DMOS FET device that features a
low gate charge and excellent switching characteristics, and
designed for high voltage applications such as switching power
supply, AC adapter.
FEATURES
•Low gate charge
QG = 9 nC TYP. (VDD = 450 V, VGS = 10 V, ID = 2.0 A)
•Gate voltage rating ±30 V
•Low on-state resistance
RDS(on) = 4.4 Ω MAX. (VGS = 10 V, ID = 1.0 A)
•Avalanche capability ratings
•Isolated TO-220 package
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage (VGS = 0 V) VDSS 600 V
Gate to Source Voltage (VDS = 0 V) VGSS ±30 V
Drain Current (DC) (TC = 25°C) ID(DC) ±2.0 A
Drain Current (pulse) Note1 ID(pulse) ±8.0 A
Total Power Dissipation (TA = 25°C) PT1 2.0 W
Total Power Dissipation (TC = 25°C) PT2 25 W
Channel Temperature Tch 150 °C
Storage Temperature Tstg –55 to +150 °C
Single Avalanche Current Note2 IAS 2.0 A
Single Avalanche Energy Note2 EAS 2.7 mJ
Diode Recovery dv/dt Note3 dv/dt 3.5 V/ns
Notes 1. PW ≤ 10
µ
s, Duty Cycle ≤ 1%
2. Starting Tch = 25°C, VDD = 150 V, RG = 25 Ω, VGS = 20 → 0 V
3. IF ≤ 1.0 A, Vclamp = 600 V, di/dt ≤ 100 A/
µ
s, TA = 25°C
ORDERING INFORMATION
PART NUMBER PACKAGE
2SK3211 Isolat ed TO-220
Data Sheet D13789EJ1V0DS
2
2SK3221
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTE RISTI CS SYMBOL TEST CONDI TIONS MIN. TYP. MAX. UNIT
Zero Gate Volt age Drai n Current IDSS VDS = 600 V, VGS = 0 V 100
µ
A
Gate Leakage Current IGSS VGS = ±30 V, VDS = 0 V ±10
µ
A
Gate Cut-off Voltage VGS(off) VDS = 10 V, ID = 1 mA 2.5 3.5 V
Forward Transfer Adm i t tance | yfs |V
DS = 10 V, ID = 1. 0 A 0.5 S
Drain to Sourc e On-state Res i stance RDS(on) VGS = 10 V, ID = 1. 0 A 3.3 4.4 Ω
Input Capac i t ance Ciss VDS = 10 V 290 pF
Output Capaci tance Coss VGS = 0 V 60 pF
Reverse Transf er Capacitanc e Crss f = 1 MHz 5 pF
Turn-on Delay Time td(on) VDD = 150 V, I D = 1. 0 A 7 ns
Rise Time trVGS = 10 V 2 ns
Turn-off Del a y T i me td(off) RG = 10 Ω20 ns
Fall Time tf10 ns
Total Gate Charge QGVDD = 450 V 9 nC
Gate to Source Charge QGS VGS = 10 V 2.4 nC
Gate to Drain Charge QGD ID = 2.0 A 2 nC
Body Diode Forward Voltage VF(S-D) IF = 2. 0 A, VGS = 0 V 0.9 V
Reverse Recovery T i me trr IF = 2.0 A, VGS = 0 V 0.9
µ
s
Reverse Recovery Charge Qrr di/dt = 50 A/
µ
s2.0
µ
C
TEST CIRCUIT 1 AVALANCHE CAPABILITY
R
G
= 25 Ω
50 Ω
PG.
L
V
DD
V
GS
= 20 → 0 V
BV
DSS
I
AS
I
D
V
DS
Starting Tch
V
DD
D.U.T.
TEST CIRCUIT 3 GATE CHARGE
TEST CIRCUIT 2 SWITCHING TIME
PG. R
G
R
G
= 10 Ω
0
V
GS
D.U.T.
R
L
V
DD
τ = 1
s
µ
Duty Cycle ≤ 1%
V
GS
Wave Form
I
D
Wave Form
V
GS
10% 90%
V
GS
10%
0
I
D
90%
90%
td(on) trtd(off) t
f
10%
τ
I
D
0
ton toff
PG. 50 Ω
D.U.T.
R
L
V
DD
I
G
= 2 mA
Data Sheet D13789EJ1V0DS 3
2SK3221
TYPICAL CHARACTERISTICS (TA = 25°C)
DERATI NG F ACTOR OF FORWARD BI AS
SAFE OPERATING AREA TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
dT - Percentage of Rated Power - %
0
20
40
60
80
100
120
0 25 50 75 100 125 150 175
TC - Case Temperature - °C
PT - Total Power Dissipation - W
0
5
10
15
20
25
0 25 50 75 100 125 150 175
TC - Case Temperature - °C
FORWARD BIAS SAFE OPERATING AREA
ID - Drain Current - A
0.01
0.1
1
10
100
1 10 100 1000
1 m s
10ms
ID(DC) = 2.0 A
RDS(on) Limited
(VGS = 20 V)
100 ms
Power Dissipation Lim ited
PW = 100 µs
ID(Pulse) = 8.0 A
TC = 25°C
Single Pulse
VDS - Drain to Source Volt age - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
rth - Transient Therm al Resistance - °C/W
0.1
1
10
100
Rth(j-A) = 6 2 .5°C /W
Rth(j-C) = 5.0°C/W
Single Pulse
PW - Pul se Widt h - s
1 m 10 m 100 m 1 10 100 1000
Data Sheet D13789EJ1V0DS
4
2SK3221
DRAIN CURRE NT vs.
DRAIN TO S O URCE VOLTA G E FORWA RD T RANSFE R CHARACTE RISTI CS
ID - Drain Current - A
10 4020 30
1
3
4
2
0
0
5
6 V
V
GS
= 10 V
8 V
Pulsed
VDS - Drain to Source Volt age - V
ID - Drain Current - A
151050
100
10
1
0.1
V
DS
= 10 V
Pulsed
T
ch
= 125˚C
75˚C
T
ch
= 25˚C
−25˚C
VGS - Gate to Sourc e Voltage - V
GATE CUT-OFF VOLTAGE vs .
CHANNEL TEMPERATURE FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRE NT
VGS(off) - Gat e Cut-off V ol tage - V
−50 0 50 100 150
5
4
3
2
1
0
VDS = 10 V
ID = 1 mA
Tch - Channel Temperat ure - °C
| yfs | - Forward Transfer Admi ttance - S
0.1 1 100.01
0.1
1
10
100 V
DS
= 10 V
Pulsed
T
ch
= −25˚C
25˚C
75˚C
125˚C
ID - Drain Current - A
DRAIN TO SOURCE ON-ST ATE RE S ISTA NCE vs.
GATE TO SOURCE VOLTAGE DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRE NT
RDS(on) - Drain to Source On-state Resistance - Ω
10
5
1
0515
0
Pulsed
ID = 2.0 A
1.0 A
2
3
4
6
7
VGS - Gate to Sourc e Voltage - V
RDS(on) - Drain to Source On-state Resistance - Ω
0.1 1 10
0
V
GS
= 10 V
20 V
Pulsed
1
2
3
4
5
6
7
ID - Drain Current - A
Data Sheet D13789EJ1V0DS 5
2SK3221
DRAIN TO SOURCE ON-ST ATE RE S ISTA NCE vs.
CHANNEL TEMPERATURE SOURCE TO DRAIN DIODE
FORWA RD V O LT AGE
50 150
2
00 100−50
3
1
V
GS
= 10 V
4
1.0 A
6
7
5
8
9
I
D
= 2.0 A
Tch - Channel Temperat ure - ° C
IF - Diode Forward Current - A
1.510.50
100
10
1
0.1
Pulsed
0 V
V
GS
= 10 V
VF(S-D) - Source to Drain Volt age - V
RDS(on) - Drain to Source On-state Resistance - Ω
CAPACITANCE vs. DRAIN TO SO URCE VOLTA G E SWITCHING CHA RACTERI S TICS
Ciss, Coss, Crss - Capacitance - pF
1001010.1
10000
1000
100
10
1
C
iss
C
oss
C
rss
V
GS
= 0 V
f = 1 MHz
VDS - Drain to Source Volt age - V
td(on), tr, td(off), tf - Switching Time - ns
0.1 1 10
100
10
1
0.1
V
DD
=
150
V
V
GS
= 10
V
R
G
=
10
Ω
t
d(off)
t
d(on)
t
f
t
r
ID - Drain Current - A
REVE RS E RECOVERY TI ME vs.
DIODE FO RWARD CURRENT DYNAMIC I NPUT/OUTPUT CHARA CT ERIST ICS
trr - Reverse Recovery Time - ns
1 10 1000.1
10000
1000
100
10
di/dt = 50 A/ s
V
GS
= 0 V
µ
IF - Diode Forward Current - A
VDS - Drain to Source Voltage - V
0841216
600
400
200
0
16
14
12
10
8
6
4
2
0
V
DS
I
D
= 2.0 A
V
GS
800
V
DD
= 450 V
300 V
150 V
QG - Gate Charge - nC
VGS - Gate to Sourc e Voltage - V
Data Sheet D13789EJ1V0DS
6
2SK3221
SINGLE AVALANCHE CURRENT vs.
INDUCTIVE LOAD SINGLE A VALANCHE E NE RGY
DERATI NG F ACTOR
IAS - Single Avalanche Current - A
100 1 m 10 m
100
1
10
0.1
10
R
G
= 25 Ω
V
DD
= 150 V
V
GS
= 20
→ 0 V
Starting T
ch
= 25˚C
E
AS
= 2.7 mJ
I
AS
= 2.0 A
µµ
L - Induct i ve Load - H
Energy Derating Factor - %
75 15012550 10025
VDD = 150 V
RG = 25 Ω
VGS = 20 → 0 V
IAS ≤ 2.0 A
0
20
40
60
80
100
Starti ng T ch - Starting Channel Temperature - ° C
Data Sheet D13789EJ1V0DS 7
2SK3221
PACKAGE DRAWING (Unit: mm)
Isolated TO-220 (MP-45F)
1. Gate
2. Drain
3. Source
10.0±0.3 3.2±0.2 2.7±0.2
1.3±0.20.7±0.1
2.54 TYP. 2.54 TYP.
1.5±0.2
123
4±0.2
13.5 MIN. 12.0±0.2
15.0±0.3
3±0.1
4.5±0.2
2.5±0.1
0.65±0.1
EQUIVALENT CIRCUIT
Source
Body
Diode
Gate
Protection
Diode
Gate
Drain
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. W hen
this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated
voltage may be applied to this device.
2SK3221
M8E 00. 4
The information in this document is current as of June, 2002. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data
books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products
and/or types are available in every country. Please check with an NEC sales representative for
availability and additional information.
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