General Description
The MAX6730–MAX6735 single-/dual-/triple-voltage
microprocessor (µP) supervisors feature a watchdog
timer and manual reset capability. The MAX6730–
MAX6735 offer factory-set reset thresholds for monitor-
ing voltages from +0.9V to +5V and an adjustable reset
input for monitoring voltages down to +0.63V. The com-
bination of these features significantly improves system
reliability and accuracy when compared to separate
ICs or discrete components.
The active-low reset output asserts and remains asserted
for the reset timeout period after all the monitored volt-
ages exceed their respective thresholds. Multiple factory-
set reset threshold combinations reduce the number of
external components required. The MAX6730/MAX6731
monitor a single fixed voltage, the MAX6732/MAX6733
monitor two fixed voltages, and the MAX6734/MAX6735
monitor two fixed voltages and one adjustable voltage. All
devices are offered with six minimum reset timeout peri-
ods ranging from 1.1ms to 1120ms.
The MAX6730–MAX6735 feature a watchdog timer with
an independent watchdog output. The watchdog timer
prevents system lockup during code execution errors.
A watchdog startup delay of 54s after reset asserts
allows system initialization during power-up. The watch-
dog operates in normal mode with a 1.68s delay after
initialization. The MAX6730/MAX6732/MAX6734 provide
an active-low, open-drain watchdog output. The
MAX6731/MAX6733/MAX6735 provide an active-low,
push-pull watchdog output.
Other features include a manual reset input (MAX6730/
MAX6731/MAX6734/MAX6735) and push-pull reset out-
put (MAX6731/MAX6733/MAX6735) or open-drain reset
output (MAX6730/MAX6732/MAX6734). The MAX6730–
MAX6733 are offered in a tiny SOT23-6 package. The
MAX6734/MAX6735 are offered in a space-saving
SOT23-8 package. All devices are fully specified over
the extended -40°C to +85°C temperature range.
Applications
Multivoltage Systems
Telecom/Networking Equipment
Computers/Servers
Portable/Battery-Operated Equipment
Industrial Equipment
Printer/Fax
Set-Top Boxes
Features
VCC1 (Primary Supply) Reset Threshold Voltages
from +1.575V to +4.63V
VCC2 (Secondary Supply) Reset Threshold
Voltages from +0.79V to +3.08V
Adjustable RSTIN Threshold for Monitoring
Voltages Down to +0.63V (MAX6734/MAX6735 Only)
Six Reset Timeout Options
Watchdog Timer with Independent Watchdog Output
35s (min) Initial Watchdog Startup Period
1.12s (min) Normal Watchdog Timeout Period
Manual Reset Input
(MAX6730/MAX6731/MAX6734/MAX6735)
Guaranteed Reset Valid down to
VCC1 or VCC2 = +0.8V
Push-Pull RESET or Open-Drain RESET Output
Immune to Short VCC Transients
Low Supply Current: 14μA (typ) at +3.6V
Small 6-Pin and 8-Pin SOT23 Packages
MAX6730–MAX6735
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
________________________________________________________________
Maxim Integrated Products
1
Ordering Information
19-2629; Rev 5; 3/09
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
*
Insert the threshold level suffixes for VCC1 and VCC2 (Table 1)
after “UT” or “KA.” For the MAX6730/MAX6731, insert only the
VCC1 threshold suffix after the “UT.” Insert the reset timeout
delay (Table 2) after “D” to complete the part number. For exam-
ple, the MAX6732UTLTD3-T provides a VCC1 threshold of
+4.625V, a VCC2 threshold of +3.075V, and a 210ms reset time-
out period. Sample stock is generally held on standard versions
only (see the Standard Versions table). Standard versions have
an order increment requirement of 2500 pieces. Nonstandard
versions have an order increment requirement of 10,000 pieces.
Contact factory for availability.
PART* TEMP RANGE PIN-PACKAGE
MAX6730UT_D_ -T -40°C to +8C 6 SOT23
MAX6731UT_D_ -T -40°C to +8C 6 SOT23
MAX6732UT_ _D_ -T -40°C to +8C 6 SOT23
MAX6733UT_ _D_ -T -40°C to +8C 6 SOT23
MAX6734KA_ _D_ -T -40°C to +8C 8 SOT23
MAX6735KA_ _D_ -T -40°C to +8C 8 SOT23
Typical Operating Circuit and Pin Configurations appear at
end of data sheet.
Devices are available in both leaded and lead(Pb)-free/RoHS-
compliant packaging.
Specify lead-free by replacing “-T” with “+T” when ordering.
MAX6730–MAX6735
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VCC1 = VCC2 = +0.8V to +5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
PARAMETER SYM B O L CONDITIONS MIN TYP MAX UNITS
Supply Voltage VCC1,
VCC20.8 5.5 V
VCC1 < +5.5V, all I/O connections
open, outputs not asserted 15 39
ICC1
VCC1 < +3.6V, all I/O connections
open, outputs not asserted 10 28
VCC2 < +3.6V, all I/O connections
open, outputs not asserted 411
Supply Current
ICC2
VCC2 < +2.75V, all I/O connections
open, outputs not asserted 39
µA
L (falling) 4.500 4.625 4.750
M (falling) 4.250 4.375 4.500
T (falling) 3.000 3.075 3.150
S (falling) 2.850 2.925 3.000
R (falling) 2.550 2.625 2.700
Z (falling) 2.250 2.313 2.375
Y (falling) 2.125 2.188 2.250
W (falling) 1.620 1.665 1.710
VCC1 Reset Threshold VTH1
V (falling) 1.530 1.575 1.620
V
VCC1, VCC2, RSTIN, MR, WDI to GND.....................-0.3V to +6V
RST, WDO to GND (open drain)...............................-0.3V to +6V
RST, WDO to GND (push-pull) .................-0.3V to (VCC1 + 0.3V)
Input Current/Output Current (all pins) ...............................20mA
Continuous Power Dissipation (TA= +70°C)
6-Pin SOT23-6 (derate 8.7mW/°C above +70°C) ........696mW
8-Pin SOT23-8 (derate 8.9mW/°C above +70°C) ........714mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
MAX6730–MAX6735
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VCC1 = VCC2 = +0.8V to +5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
PARAMETER SYM B O L CONDITIONS MIN TYP MAX UNITS
T (falling) 3.000 3.075 3.150
S (falling) 2.850 2.925 3.000
R (falling) 2.550 2.625 2.700
Z (falling) 2.250 2.313 2.375
Y (falling) 2.125 2.188 2.250
W (falling) 1.620 1.665 1.710
V (falling) 1.530 1.575 1.620
I (falling) 1.350 1.388 1.425
H (falling) 1.275 1.313 1.350
G (falling) 1.080 1.110 1.140
F (falling) 1.020 1.050 1.080
E (falling) 0.810 0.833 0.855
VCC2 Reset Threshold VTH2
D (falling) 0.765 0.788 0.810
V
Reset Threshold Tempco 20 ppm/oC
Reset Threshold Hysteresis VHYST Referenced to VTH typical 0.5 %
VCC_ to RST Output Delay tRD
VCC1 = (VTH1 + 100mV) to
(VTH1 - 100mV) or
VCC2 = (VTH2 + 75mV) to
(VTH2 - 75mV)
45 µs
D1 1.1 1.65 2.2
D2 8.8 13.2 17.6
D3 140 210 280
D5 280 420 560
D6 560 840 1120
Reset Timeout Period tRP
D4 1120 1680 2240
ms
ADJUSTABLE RESET COMPARATOR INPUT (MAX6734/MAX6735)
RSTIN Input Threshold VRSTIN 611 626.5 642 mV
RSTIN Input Current IRSTIN -25 +25 nA
RSTIN Hysteresis 3mV
RSTIN to Reset Output Delay tRSTIND VRSTIN to (VRSTIN - 30mV) 22 µs
MANUAL RESET INPUT (MAX6730/MAX6731/MAX6734/MAX6735)
VIL 0.3 × VCC1
MR Input Threshold VIH 0.7 × VCC1V
MR Minimum Pulse Width 1 µs
MR Glitch Rejection 100 ns
MR to Reset Output Delay tMR 200 ns
MR Pullup Resistance 25 50 80 kΩ
MAX6730–MAX6735
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VCC1 = VCC2 = +0.8V to +5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
PARAMETER SYM B O L CONDITIONS MIN TYP MAX UNITS
WATCHDOG INPUT
tWD-L First watchdog period after reset
timeout period 35 54 72
Watchdog Timeout Period
tWD-S Normal mode 1.12 1.68 2.24
s
WDI Pulse Width tWDI (Note 2) 50 ns
VIL 0.3 × VCC1
WDI Input Voltage VIH 0.7 × VCC1V
WDI Input Current IWDI WDI = 0 or VCC1-1+1µA
RESET/WATCHDOG OUTPUT
VCC1 or VCC2 +0.8V,
ISINK = 1µA, output asserted 0.3
VCC1 or VCC2 +1.0V,
ISINK = 50µA, output asserted 0.3
VCC1 or VCC2 +1.2V,
ISINK = 100µA, output asserted 0.3
VCC1 or VCC2 +2.7V,
ISINK = 1.2mA, output asserted 0.3
RST / WDO Output Low Voltage
(Push-Pull or Open Drain) VOL
VCC1 or VCC2 +4.5V,
ISINK = 3.2mA, output asserted 0.4
V
VCC1 +1.8V, ISOURCE = 200µA,
output not asserted 0.8 × VCC1
VCC1 +2.7V, ISOURCE = 500µA,
output not asserted 0.8 × VCC1
RST / WDO Output High Voltage
(Push-Pull Only) VOH
VCC1 +4.5V, ISOURCE = 800µA,
output not asserted 0.8 × VCC1
V
RST / WDO Output Open-Drain
Leakage Current Output not asserted 0.5 µA
Note 1: Devices tested at TA= +25°C. Overtemperature limits are guaranteed by design and not production tested.
Note 2: Parameter guaranteed by design.
MAX6730–MAX6735
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
_______________________________________________________________________________________
5
0
4
2
10
8
6
16
14
12
18
-40 10-15 35 60 85
SUPPLY CURRENT vs. TEMPERATURE
(VCC1 = +5V, VCC2 = +3.3V)
MAX6730-35 toc01
TEMPERATURE (°C)
SUPPLY CURRENT (μA)
TOTAL
ICC1
ICC2
0
4
2
10
8
6
16
14
12
18
-40 10-15 35 60 85
SUPPLY CURRENT vs. TEMPERATURE
(VCC1 = +3.3V, VCC2 = +2.5V)
MAX6730-35 toc02
TEMPERATURE (°C)
SUPPLY CURRENT (μA)
TOTAL
ICC1
ICC2
0
4
2
10
8
6
16
14
12
18
-40 10-15 35 60 85
SUPPLY CURRENT vs. TEMPERATURE
(VCC1 = +2.5V, VCC2 = +1.8V)
MAX6730-35 toc03
TEMPERATURE (°C)
SUPPLY CURRENT (μA)
TOTAL
ICC1
ICC2
0
4
2
10
8
6
16
14
12
18
-40 10-15 35 60 85
SUPPLY CURRENT vs. TEMPERATURE
(VCC1 = +1.8V, VCC2 = +1.2V)
MAX6730-35 toc04
TEMPERATURE (°C)
SUPPLY CURRENT (μA)
TOTAL
ICC1
ICC2
NORMALIZED THRESHOLD VOLTAGE
vs. TEMPERATURE
MAX6730-35 toc05
TEMPERATURE (°C)
NORMALIZED THRESHOLD VOLTAGE
603510-15
0.992
0.994
0.996
0.998
1.000
1.002
1.004
1.006
1.008
1.010
0.990
-40 85
Typical Operating Characteristics
(VCC1 = +5V, VCC2 = +3.3V, TA= +25°C, unless otherwise noted.)
MAX6730–MAX6735
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
6 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(VCC1 = +5V, VCC2 = +3.3V, TA= +25°C, unless otherwise noted.)
12
14
16
18
20
22
24
26
28
30
10
RSTIN TO RESET OUTPUT DELAY
vs. TEMPERATURE
MAX6730-35 toc10
TEMPERATURE (°C)
RSTIN TO RESET OUTPUT DELAY (μs)
6035-15 10-45 85
MAXIMUM VCC_ TRANSIENT DURATION
vs. RESET THRESHOLD OVERDRIVE
MAX6730-35 toc07
RESET THRESHOLD OVERDRIVE (mV)
MAXIMUM VCC_ TRANSIENT DURATION (μs)
10 100
100
1000
10,000
10
1 1000
RST ASSERTS
ABOVE THIS LINE
MR TO RESET OUTPUT DELAY
MAX6730-35 toc08
40ns/div
MR
2V/div
RST
2V/div
VCC_ TO RESET OUTPUT DELAY
vs. TEMPERATURE (100mV OVERDRIVE)
MAX6730-35 toc09
TEMPERATURE (°C)
VCC_ TO RESET OUTPUT DELAY (μs)
6035-15 10
45
50
55
60
65
70
75
80
40
-45 85
NORMALIZED TIMEOUT PERIOD
vs. TEMPERATURE
MAX6730-35 toc06
TEMPERATURE (°C)
NORMALIZED TIMEOUT PERIOD
603510-15
0.9995
1.0000
1.0005
1.0010
1.0015
1.0020
1.0025
1.0030
1.0035
1.0040
0.9990
-40 85
MAX6730–MAX6735
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
_______________________________________________________________________________________ 7
Pin Description
PIN
MAX6730
MAX6731
MAX6732
MAX6733
MAX6734
MAX6735
NAME FUNCTION
1 1 1 RST
Active-Low Reset Output. The MAX6730/MAX6732/MAX6734 provide an open-
drain output. The MAX6731/MAX6733/MAX6735 provide a push-pull output. RST
asserts low when any of the following conditions occur: VCC1 or VCC2 drops
below its preset threshold, RSTIN drops below its reset threshold, or MR is driven
low. Open-drain versions require an external pullup resistor.
2 2 2 GND Ground
3 3 4 WDO
Active-Low Watchdog Output. The MAX6730/MAX6732/MAX6734 provide an
open-drain WDO output. The MAX6731/MAX6733/MAX6735 provide a push-pull
WDO output. WDO asserts low when no low-to-high or high-to-low transition
occurs on WDI within the watchdog timeout period (tWD) or if an undervoltage
lockout condition exists for VCC1, VCC2, or RSTIN. WDO deasserts without a
timeout period when VCC1, VCC2, and RSTIN exceed their reset thresholds, or
when the manual reset input is asserted. Open-drain versions require an external
pullup resistor.
4 — 5 MR
Active-Low Manual Reset Input. Drive MR low to force a reset. RST remains
asserted as long as MR is low and for the reset timeout period after MR releases
high. MR has a 50k pullup resistor to VCC1; leave MR open or connect to VCC1
if unused.
5 5 3 WDI
Watchdog Input. If WDI remains high or low for longer than the watchdog timeout
period, the internal watchdog timer expires and the watchdog output asserts low.
The internal watchdog timer clears whenever RST asserts or a rising or falling
edge on WDI is detected. The watchdog has an initial watchdog timeout period
(35s min) after each reset event and a short timeout period (1.12s min) after the
first valid WDI transition. Floating WDI does not disable the watchdog timer
function.
6 6 8 VCC1Primary Supply-Voltage Input. VCC1 provides power to the device when it is
greater than VCC2. VCC1 is the input to the primary reset threshold monitor.
— 4 6 VCC2Secondary Supply-Voltage Input. VCC2 provides power to the device when it is
greater than VCC1. VCC2 is the input to the secondary reset threshold monitor.
— — 7 RSTIN
Undervoltage Reset Comparator Input. RSTIN provides a high-impedance
comparator input for the adjustable reset monitor. RST asserts low if the voltage
at RSTIN drops below the 626mV internal reference voltage. Connect a resistive
voltage-divider to RSTIN to monitor voltages higher than 626mV. Connect RSTIN
to VCC1 or VCC2 if unused.
MAX6730–MAX6735
Detailed Description
Supply Voltages
The MAX6730–MAX6735 microprocessor (µP) supervi-
sors maintain system integrity by alerting the µP to fault
conditions. The MAX6730–MAX6735 monitor one to
three supply voltages in µP-based systems and assert
an active-low reset output when any monitored supply
voltage drops below its preset threshold. The output
state remains valid for VCC1 or VCC2 greater than +0.8V.
Threshold Levels
The two-letter code in the Reset Voltage Threshold
Suffix Guide (Table 1) indicates the threshold level
combinations for VCC1 and VCC2.
Reset Output
The MAX6730–MAX6735 feature an active-low reset out-
put (RST). RST asserts when the voltage at either VCC1 or
VCC2 falls below the voltage threshold level, VRSTIN
drops below its threshold, or MR is driven low (Figure 1).
RST remains low for the reset timeout period (Table 2)
after VCC1, VCC2, and RSTIN increase above their
respective thresholds and after MR releases high.
Whenever VCC1, VCC2, or RSTIN go below the reset
threshold before the end of the reset timeout period, the
internal timer restarts. The MAX6730/MAX6732/ MAX6734
provide an open-drain RST output, and the MAX6731/
MAX6733/MAX6735 provide a push-pull RST output.
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
8 _______________________________________________________________________________________
Table 1. Reset Voltage Threshold Suffix Guide**
PART NO. SUFFIX
VCC1 NOMINAL
VOLTAGE
THRESHOLD(V)
VCC2 NOMINAL
VOLTAGE
THRESHOLD (V)
LT 4.625 3.075
MS 4.375 2.925
MR 4.375 2.625
TZ 3.075 2.313
SY 2.925 2.188
RY 2.625 2.188
TW 3.075 1.665
SV 2.925 1.575
RV 2.625 1.575
TI 3.075 1.388
SH 2.925 1.313
RH 2.625 1.313
TG 3.075 1.110
SF 2.925 1.050
RF 2.625 1.050
TE 3.075 0.833
SD 2.925 0.788
RD 2.625 0.788
ZW 2.313 1.665
YV 2.188 1.575
ZI 2.313 1.388
YH 2.188 1.313
ZG 2.313 1.110
YF 2.188 1.050
ZE 2.313 0.833
YD 2.188 0.788
WI 1.665 1.388
VH 1.575 1.313
WG 1.665 1.110
VF 1.575 1.050
WE 1.665 0.833
VD 1.575 0.788
**
Standard versions are shown in bold and are available in a
D3 timeout option only. Standard versions require 2500-piece
order increments and are typically held in sample stock. There
is a 10,000-piece order increment on nonstandard versions.
Other threshold voltages may be available; contact factory
for availability.
Table 2. Reset Timeout Period Suffix Guide
ACTIVE TIMEOUT PERIOD
TIMEOUT
PERIOD SUFFIX MIN (ms) MAX (ms)
D1 1.1 2.2
D2 8.8 17.6
D3 140 280
D5 280 560
D6 560 1120
D4 1120 2240
Manual Reset Input
Many µP-based products require manual reset capabil-
ity, allowing the operator, a test technician, or external
logic circuitry to initiate a reset. A logic low on MR
asserts the reset output, clears the watchdog timer,
and deasserts the watchdog output. Reset remains
asserted while MR is low and for the reset timeout peri-
od (tRP) after MR returns high. An internal 50kΩpullup
resistor allows MR to be left open if unused. Drive MR
with TTL or CMOS-logic levels or with open-drain/col-
lector outputs. Connect a normally open momentary
switch from MR to GND to create a manual reset func-
tion; external debounce circuitry is not required.
Connect a 0.1µF capacitor from MR to GND to provide
additional noise immunity when driving MR over long
cables or if the device is used in a noisy environment.
Adjustable Input Voltage (RSTIN)
The MAX6734/MAX6735 provide an additional high-
impedance comparator input with a 626mV threshold to
monitor a third supply voltage. To monitor a voltage
higher than 626mV, connect a resistive-divider to the
circuit as shown in Figure 2 to establish an externally
controlled threshold voltage, VEXT_TH.
V = 626mV EXT_TH ×+
()RR
R
12
2
MAX6730–MAX6735
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
_______________________________________________________________________________________ 9
tRP
tRP
VTH
VCC
(MIN)
VCC1,
VCC2
RSTIN
RST
WDO
MR
Figure 1. RST, WDO, and MR Timing Diagram
MAX6734
MAX6735
VEXT_TH
GND
RSTIN
R1
R2
Figure 2. Monitoring a Third Voltage
MAX6730–MAX6735
The RSTIN comparator derives power from VCC1, and
the input voltage must remain less than or equal to
VCC1. Low leakage current at RSTIN allows the use of
large-valued resistors, resulting in reduced power con-
sumption of the system.
Watchdog
The watchdog feature monitors µP activity through
the watchdog input (WDI). A rising or falling edge on
WDI within the watchdog timeout period (tWD) indi-
cates normal µP operation. WDO asserts low if WDI
remains high or low for longer than the watchdog
timeout period. Floating WDI does not disable the
watchdog timer.
The MAX6730–MAX6735 include a dual-mode watch-
dog timer to monitor µP activity. The flexible timeout
architecture provides a long-period initial watchdog
mode, allowing complicated systems to complete
lengthy boots, and a short-period normal watchdog
mode, allowing the supervisor to provide quick alerts
when processor activity fails. After each reset event
(VCC power-up, brownout, or manual reset), there is a
long initial watchdog period of 35s (min). The long
watchdog period mode provides an extended time for
the system to power up and fully initialize all µP and
system components before assuming responsibility for
routine watchdog updates.
The usual watchdog timeout period (1.12s min) begins
after the initial watchdog timeout period (tWD-L) expires
or after the first transition on WDI (Figure 3). During nor-
mal operating mode, the supervisor asserts the WDO
output if the µP does not update the WDI with a valid
transition (high to low or low to high) within the standard
timeout period (tWD-S) (1.12s min).
Connect MR to WDO to force a system reset in the
event that no rising or falling edge is detected at WDI
within the watchdog timeout period. WDO asserts low
when no edge is detected by WDI, the RST output
asserts low, the watchdog counter immediately clears,
and WDO returns high. The watchdog counter restarts,
using the long watchdog period, when the reset timeout
period ends (Figure 4).
Ensuring a Valid RESET
Output Down to VCC = 0
The MAX6730–MAX6735 guarantee proper operation
down to VCC = +0.8V. In applications that require valid
reset levels down to VCC = 0, use a 100kΩpulldown
resistor from RST to GND. The resistor value used is not
critical, but it must be large enough not to load the
reset output when VCC is above the reset threshold. For
most applications, 100kΩis adequate. Note that this
configuration does not work for the open-drain outputs
of MAX6730/MAX6732/MAX6734.
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
10 ______________________________________________________________________________________
tRP
VTH
VCC
(MIN)
VCC1,
VCC2
RSTIN
RST
WDO
WDI < tWD-S
< tWD-S
> tWD-S
tWD-S
< tWD-S
< tWD-S
< tWD-L
Figure 3. Watchdog Input/Output Timing Diagram (MR and WDO Not Connected)
Applications Information
Interfacing to µPs with Bidirectional
Reset Pins
Microprocessors with bidirectional reset pins can inter-
face directly with the open-drain RST output options.
However, conditions might occur in which the push-pull
output versions experience logic contention with the
bidirectional reset pin of the µP. Connect a 10kΩresis-
tor between RST and the µP’s reset I/O port to prevent
logic contention (Figure 5).
Falling VCC Transients
The MAX6730–MAX6735 µP supervisors are relatively
immune to short-duration falling VCC_ transients (glitch-
es). Small glitches on VCC_ are ignored by the
MAX6730–MAX6735, preventing undesirable reset
pulses to the µP. The
Typical Operating Characteristics
show Maximum Transient Duration vs. Reset Threshold
MAX6730–MAX6735
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
______________________________________________________________________________________ 11
tRP
> tWD-S
tMR
< tWD-S < tWD-L
< tWD-L
tRP
VTH
VCC
(MIN)
VCC1,
VCC2
RSTIN
RST
WDO
WDI
MR
Figure 4. Watchdog Input/Output Timing Diagram (MR and WDO Connected)
MAX6731
MAX6733
MAX6735
VCC1
VCC1
VCC2
VCC2
RESET TO
OTHER
SYSTEM
COMPONENTS
GND
μ
P
RST
GND
10k
Ω
RESET
Figure 5. Interfacing to µPs with Bidirectional Reset I/O
MAX6730–MAX6735
Overdrive, for which reset pulses are not generated.
The graph was produced using falling VCC_ pulses,
starting above VTH and ending below the reset thresh-
old by the magnitude indicated (reset threshold over-
drive). The graph shows the maximum pulse width that
a falling VCC transient typically might have without
causing a reset pulse to be issued. As the amplitude of
the transient increases (i.e., goes further below the
reset threshold), the maximum allowable pulse width
decreases. A 0.1µF bypass capacitor mounted close to
VCC_ provides additional transient immunity.
Watchdog Software Considerations
Setting and resetting the watchdog input at different
points in the program rather than “pulsing” the watch-
dog input high-low-high or low-high-low helps the
watchdog timer closely monitor software execution.
This technique avoids a “stuck” loop, in which the
watchdog timer continues to be reset within the loop,
preventing the watchdog from timing out. Figure 6
shows an example flow diagram in which the I/O dri-
ving the watchdog input is set high at the beginning of
the program, set low at the beginning of every subrou-
tine or loop, and then set high again when the program
returns to the beginning. If the program “hangs” in any
subroutine, the I/O continually asserts low (or high),
and the watchdog timer expires, issuing a reset or
interrupt.
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
12 ______________________________________________________________________________________
START
SET WDI
HIGH
PROGRAM
CODE
RETURN
SUBROUTINE
COMPLETED
HANG IN
SUBROUTINE
SUBROUTINE OR
PROGRAM LOOP
SET WDI LOW
Figure 6. Watchdog Flow Diagram
MAX6730–
MAX6735
VREF
RESET
TIMEOUT
PERIOD
RESET
OUTPUT
DRIVER
WATCHDOG
TIMER
REF
VCC1
VREF / 2
GND
VCC1MR
VCC1VCC1
VCC1
VCC2
MR
PULLUP
VCC1
VCC2
RSTIN
RST
WDO
WDI
Functional Diagram
MAX6730–MAX6735
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
______________________________________________________________________________________ 13
Standard Versions
PART TOP MARK
MAX6730UTLD3-T ABCC
MAX6730UTSD3-T ABPB
MAX6730UTRD3-T ABPA
MAX6730UTZD3-T ABPD
MAX6730UTVD3-T ABPC
MAX6731UTLD3-T ABPE
MAX6731UTTD3-T ABCD
MAX6731UTSD3-T ABPG
MAX6731UTRD3-T ABPF
MAX6731UTZD3-T ABPI
MAX6731UTVD3-T ABPH
MAX6732UTLTD3-T ABCE
MAX6732UTSYD3-T ABPN
MAX6732UTSVD3-T ABPM
MAX6732UTRVD3-T ABPJ
MAX6732UTSHD3-T ABPL
MAX6732UTTGD3-T ABPO
MAX6732UTSDD3-T ABPK
MAX6732UTZWD3-T ABPV
MAX6732UTYHD3-T ABPT
MAX6732UTZGD3-T ABPU
MAX6732UTYDD3-T ABPS
MAX6732UTVHD3-T ABPQ
MAX6732UTWGD3-T ABPR
MAX6732UTVDD3-T ABPP
MAX6733UTLTD3-T ABPW
MAX6733UTSYD3-T ABQB
MAX6733UTSVD3-T ABQA
MAX6733UTRVD3-T ABPX
MAX6733UTSHD3-T ABPZ
MAX6733UTTGD3-T ABQC
MAX6733UTSDD3-T ABPY
MAX6733UTZWD3-T ABQJ
MAX6733UTYHD3-T ABQH
PART TOP MARK
MAX6733UTZGD3-T ABQI
MAX6733UTYDD3-T ABQG
MAX6733UTVHD3-T ABQE
MAX6733UTWGD3-T ABQF
MAX6733UTVDD3-T ABQD
MAX6734KALTD3-T AEHN
MAX6734KASYD3-T AEHS
MAX6734KASVD3-T AEHR
MAX6734KARVD3-T AEHO
MAX6734KASHD3-T AEHQ
MAX6734KATGD3-T AEHT
MAX6734KASDD3-T AEHP
MAX6734KAZWD3-T AEIA
MAX6734KAYHD3-T AEHY
MAX6734KAZGD3-T AEHZ
MAX6734KAYDD3-T AEHX
MAX6734KAVHD3-T AEHV
MAX6734KAWGD3-T AEHW
MAX6734KAVDD3-T AEHU
MAX6735KALTD3-T AEIB
MAX6735KASYD3-T AEIG
MAX6735KASVD3-T AEIF
MAX6735KARVD3-T AEIC
MAX6735KASHD3-T AEIE
MAX6735KATGD3-T AEIH
MAX6735KASDD3-T AEID
MAX6735KAZWD3-T AEIO
MAX6735KAZID3-T AAJZ
MAX6735KAYHD3-T AEIM
MAX6735KAZGD3-T AEIN
MAX6735KAYDD3-T AEIL
MAX6735KAVHD3-T AEIJ
MAX6735KAWGD3-T AEIK
MAX6735KAVDD3-T AEII
Note: Sample stock is generally held on standard versions only. Standard versions have an order increment requirement of 2500
pieces. Nonstandard versions have an order increment requirement of 10,000 pieces. Contact factory for availability of nonstandard
versions.
MAX6730–MAX6735
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
14 ______________________________________________________________________________________
___________________Chip Information
TRANSISTOR COUNT: 1073
PROCESS: BiCMOS
GND
MRWDO
16VCC1
5WDI
RST
MAX6730
MAX6731
SOT23-6
TOP VIEW
2
34
GND
VCC2WDO
16VCC1
5WDI
RST
MAX6732
MAX6733
SOT23-6 SOT23-8
2
34
VCC2
MRWDO
1
2
8
7
VCC1
RSTINGND
WDI
RST
3
4
6
5
MAX6734
MAX6735
Pin Configurations
MAX6734
MAX6735
+0.9V
VCORE +3.3V
+1.8V
MR
GND
RSTIN RST
WDI
WDO
PUSHBUTTON
SWITCH
RESET
μ
P
NMI
I/O
VCC
(I/O)
VDD
(MEMORY)
VCC1VCC2
GND
Typical Operating Circuit
Selector Guide
PART NUMBER VOLTAGE
MONITORS RST OUTPUT MANUAL RESET WATCHDOG
INPUT
WATCHDOG
OUTPUT
MAX6730 1 Open Drain √√Open Drain
MAX6731 1 Push-Pull √√Push-Pull
MAX6732 2 Open Drain Open Drain
MAX6733 2 Push-Pull Push-Pull
MAX6734 3 Open Drain √√Open Drain
MAX6735 3 Push-Pull √√Push-Pull
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
6 Pin SOT23 U6-1 21-0058
8-Pin SOT23 K85N-1 21-0078
MAX6730–MAX6735
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________
15
© 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 10/02 Initial release.
1 12/02 Released MAX6730/MAX6731. 1
2 1/03 Released MAX6733. 1
3 3/04 Updated Typical Operating Circuit. 14
4 12/05 Added lead-free notation to Ordering Information. 1
5 3/09 Updated Pin Description and added Package Table. 7, 14