International [ter| Rectifier IRFBC40LC HEXFET Power MOSFET Ultra Low Gate Charge Reduced Gate Drive Requiremen: c _ * Enhanced 30V Ves Rating - Vpss = 600V @ Reduced C'ss, Coss, Crss Rosten) = 1.2Q Extremely High Frequency Operation * Repetitive Avalanche Rated ip = 6.2A Description This new series of Low Charge HEXFETs achieve signricantly lower gate charge over conventional MOSFETs. Utilizing the naw LCDMOS technology, tne device improvements are achieved without added product cost, allowing ran for reduced gate drive requirements and total system savings. 17 addition, ne reduced switching lasses anu imoroved efficiency are achievabie in 4 vanety of high frequency applications. Frequencies of a few MHz at high current are possible us ng the new Low Charge MOSFETs. These aevice improvements combined with the croven ruggedness and reliability that are charactenstic of HEXFETs offer the designer a new standard . . sents gs TO-220AB in power transistors for switching applications. Absolute Maximum Ratings 7 | _Parameter I Nax. Units lo @ To = 25C Continuous Drain Current. Vos @ 10 V : 6.2 lo@ To = 100C . Continuous Drain Current, Ves @ 10 V 3.3 A | low Pulsed Drain Currant 25 Pp @ Tc =25C | Power Dissipation i 125 Ww Linear Darating Factor 10 wre | Ves Gate-to-Source Voltage 430 oy Eas Single Pulse Avaanche Energy @ 530 mJ laa iAvalanche Current __ 62 A | Ear Repetitive Avalanche Energy L_ 13 _ TW dvidt [Peak Diode Recovery dvidt = | __ 40 __. Wins | Ty feeiaet Junction and | -55 to -150 i Tst __ {Storage Temperature Range G | _{ Soldering Temperature, jor 10 seconds 300 (1.8mm from case) | _ Mounting Torque, 6-32 or M3 screw Within (41 Nem) | | Thermal Resistance + Parameter Min. _Typ. Max. units | Ac i Junction-to-Case _ = = 149 Recs Case-to-Sink, Flat, Greased Surface : -_ 0.50 > cw Raa leunction-to-Ambient _ - =~ ' 62 _IRFBC40LC TOR] Electrical Characteristics @ Ty = 25C (unless otherwise specified) . Parameter Min. Typ. Max. Units Test Conditions Vienoss Dranrto-Souce Breakdown Voltage 600 _ _ Vo Vas=0V, Ib= 250u4 AViprypss/ATy: Breakdown Voltage Temp. Ccetficien: |0.70 | VPC , Reference to 25C, lo= 1MA _| Rosion} Static Drain-to-Source On-Resis:ance oe = 1.2 Q | Vas=10V, lo=3.7A @ * Vestn) Gate Theshold Vo cage 2.0 _ 4.0 . V_|Vps=Vas, lo= 2504 Os Forward Transconductance 37 | S [Vos=100V, In=3.7A loss Drain-to-Source Leakage Curett = a soo pA a eoy iow T1250 a Gate. Source Forward Leakags || | 100 a Vas=20V : Gate-1o-Source Reverse Leaxage_ = = | 100, | Vas=-20V _ Qo Total Gate Charge . = ;}_39 | lp=6.24 i Qos Gate 10-Sou ce Charge = = OG Vpg=360V Qos Gate-!9- Drain : Miver') Cha-je _ 9 iVgg=10V See Fig. 6 and 13 i tdiow _ [Turm-On Delay Time = 12 = i Von=300V [te ' Rise Time [20 | ,, W=62A taot Turn-O4 Delay Time _ 27 'Re=9.122 t | Fall Time = 17_j Rp=47Q Sae Figure 10 Lo Internal Drain Inductance | 45 = Boe) Ee - nH | trom package alt 4 Ls Internal Source inductance |768 | and center of : die contact 8 en Input Capacrrarce {1100 = ;Vas=0V Coes Output Capacitance 140 oof | Vpg= 28 Coss, Reverse Transer Capacitance 15 21 OMHz See Fgura 5 Source-Drain Ratings and Characteristics Parameter Min. Typ. . Max. | Units | Tast Conditions Is | Continuous Scurce Current _ _ 62 : MOSFET symbol a : (Body Diode) : A showing the , Isa Pulsed Source Current _ _ 5 integral reverse | (Body Diode) p-n junction diode. 8 : Vsp . Diode Forward Voltage _ _ 1.5 Vi | T=25C, ts=6.24, Vas=OV | tre ' Reverse Recovery Time 440 | 660 ns _| Tu=25C, IreG.2A Qn __ [Reverse Recovery Charge : 21 | 32 | pC | di/dt=100Aus toa Forward Tum-On Time | ntrinsie tum-on time is neglegible (tum-on is dominated by Ls+Lo) Noles: D Repetitive rating: pulse width limited by max. junction temperature (See Figure 11} Vpp=50V. starting T=25C, L=25mH Re=25N, lag=6.2A (See Figure 12) @ Isp<6.2A, dvdts80A/us, VopsViBRiDss. Tus 150C Pulse width < 300 ps; duty cycie <2%[TER IREBC40LC o o Q a z g 5 6 5 a A 5 = 25 wIDTh 25u5 SE sIDTH To = a5! Fe = 28000 407 sc svt sc! sc@ Vpg, Drain-to-Source Voltage (volts) Vog, Dram-to-Source Voltage {volts) Fig 1. Typical Output Characteristics. Fiq 2. Typical Output Cnaracteristics. To=25C Tc=150C Ip, Drain Current (Amps) {Normalized} ps 7 100V 26U8 DOLSE KIDT< Rps(on). Drain-to-Source On Resistance yes 7 10V oo BC -s0 -20 6 20 4 69 BO 100 120 140 6 Vas. Gate-to-Source Voltage (volts) Ty. Junction Temperature (C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. TemperatureIREBC40LC Capacitance (pF} Isp. Reverse Drain Current (Amps) ch Vos, Drain-to-Seurce Voltage (voits) Fig 5. Typical Capacitance Vs. Drain-to-Source Voitage Vso, Source-to-Drain Voltage (volts) Fig 7. Typical Source-Drain Diode Forward Voltage Vag, Gate-to-Source Voltage (volts) ly, Drain Current (Amps) TOR| Gq. Total Gate Charge (nC) Fig6. Typical Gate Charge Vs. Gate-to-Source Voltage 5 CPEAG7 ION LN THIS AREA LIMITED ~ AS {ON} l on ns 3 541509C Pp Biagz2 5 19d? 4c* 2 vom? Fo. 2 35? Vos. Brain-to-Source Voltage (voils) Fig 8. Maximum Safe Operating Area(p. Drain Current (Amps) [rear IREBC40LC Ap Vos > D.U.T. | Fi Vo0 Puse Width s 148 Culy Facto s 0.1% Yps 90) 10 35 5 s 20 125 150 Ve Tc, Case Temperature (C} tdtony tarot te Fig 9. Maximum Drain Current Vs. Fig 106. Switching Time Waveforms Case Temperature 3 2 1 a = S a a & oc a . E.. a ro 2 | Be + ste SINGLE PULSE NOTES: fe STHERMAL RESPONSE) 3. DUTY FACTOR, Deti/t2 | 2. PEAK Ty=Ppw x Zenjc + ce * 1058 sof ac? O.4 : 1S y if ty, Rectangular Pulse Duraton (seconds) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-CaseIRFBC40LC Vary pte obtain YDS required las Fig 12a. Unclamped inductive Tast Circuit Vos. las Fig 12b. Unclamped Inductive Waveforms tov Qa * Qgs ~ Qep , ___ Ve Charge > Fig 13a. Basic Gate Charge Waveform Eas, Single Putse Energy (mJ) = 04 25 50 76 .oc 125 250 Starting Ty, Junction Temperature(C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current Gurrert f) oEEL a Current Sampling Resisios Fig 136. Gate Charge Test Circuit Appendix A: Figure 14, Peak Diode Recovery dv/dt Test Circuit Appendix B: Package Outline Mechanical Drawing Appendix C: Part Marking Information(TAR! IRFBC40LC Appendix A Peak Diode Recovery av/dt Test Circuit D.ULT, Pp <+ Circuit Layout Considerations . | ke Low Stray Inductance Fig 14. For N-Channet x Ground Plane HEXFETs t @ Low Leakage Incuctanca Current Transformer * dwt controlled by Rg ls + Driver same type as D.U.T. [= Vop + Isp controled by Duty Factsr D - * D.U.T.- Device Under Test PW Driver Gate Drive D = eriod oo Pernod W ; Vas = 10V* L__{_____ Ld 9.U.T. Isp Waveform Reverse Recavery Body Diode Forward Current Current uid fn It @ D.U.T. Vps Waveform dyads Recovery Re: Apphed Cs Voltage goay Code Forward Drop @ indygtor Current ea Ripple $ 5% Isp i * Vas SV for Log-c Love! Devices? IRFBC40LC Package Outline TO-220AB Outtine Dimensions are shown in millimeters (inches) TOR Appendix B 10.54 (415) .78 ( 149: ce] 287 (113) 10.29 ( 405) a Sea cise) 4.69 (.185) . ' 4.20(.185) 7 1.92 (.052) 2.62 ( 103 AL (103) | t CAS 4.22 (048) 6.47 (255) - s 6 10 (.240) 15 24 (600) i 14 84 (584) | I 1.18 (045) LEAD ASSIGNMENTS MIN 1-GATE 123 2-ORAIN | : 3- SOURCE | {> 4-ORAIN 14.09 ( 585) : 4 06 (.160) 13.47 (530) | , - 3.55 (140) y 0.93 (097) Le 0.55 (.022) aX -_ ox ax 1-40-0558) LL . 0.69 (027) , 0.46 (018) 7.15 (.0445) 1@ 0.36 (.014) Ow Bl Aw 2.92 (.115) | 191 D396 Cora) GLEAG ~ 92 . : 2.64104) 2.54 (100) -- - NCTES. 2x DIMENSIONING & TOLERANCING PER ANSI 145M 1982 2 CONTROLLING D MENSION INCH Part Marking Information T0-220AB 3 OUTLINE CONFORMS TO JEDEG OUTLINE TO-220-Aa 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS. Appendix C EXAMPLE. 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