AT24C01-10SI-2.5 - Atmel Corporation

Features

•Low Voltage and Standard Volt age Operation

– 5.0 (VCC = 4.5V to 5.5V)

– 2.7 (VCC = 2.7V to 5.5V)

– 2.5 (VCC = 2.5V to 5.5V)

– 1.8 (VCC = 1.8V to 5.5V)

•Internally Organized 128 x 8

•2-Wire Serial Interface

•Bidirectional Data Transfer Protocol

•100 kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) Compatibility

•4-Byte Pa ge Write Mode

•Self-Timed Write Cycle (10 ms max)

•High Reliability

– Endurance: 1 Million Write Cycles

– Data Retention: 100 Years

– ESD Protection: >3000V

•Automotive Grade and Extended Temperature Devices Available

•8-Pin PDIP, 8-Pin MSOP, 8-Pin TSSOP and 8-Pin JEDEC SOIC Packages

Description

The AT24C01 provides 1024 bits of serial electrically erasable and programmable

read only memory (EEPROM) organized as 128 words of 8 bits each. T he device is

optim ized for us e in many in dustrial and comm ercial appl icatio ns where l ow power

and low voltage operation are essential. The AT24C01 is available in space saving

8-pin PDIP, 8 -pin MS OP, 8-pin T SSOP, and 8-pin JEDEC S OIC packages and is

accessed via a 2-wire serial interface. In addition, the entire family is available in 5.0V

(4.5V to 5.5V), 2.7V (2.7V to 5.5V), 2.5V (2.5V to 5.5V) and 1.8V (1.8V to 5.5V) ver-

sions.

2-Wire Serial

EEPROM

1K (128 x 8)

AT24C01

Rev. 0134C–07/98

2-Wi re, 1K

Serial EEPROM

Pin Configurations

Pin Name Function

NC No Connect

SDA Serial Data

SCL Serial Clock Input

Test Test Input (GND or VCC)

8-Pin PDIP

GND

VCC

TEST

SCL

SDA

8-Pin SOIC

GND

VCC

TEST

SCL

SDA

8-Pin MSOP

8-Pin TSSOP

GND

VCC

TEST

SCL

SDA

AT24C01

Bloc k Diagram

Pin Description

SERIAL CLOCK (SCL): The SCL input is used to positive

edge clock data into each EEPROM device and negative

edge clock data out of each device.

SERIAL DATA (SDA): The SDA pin is bidirectional for

serial data trans fer. This pin is open-drain driven and may

be wire-ORed with any number of other open-drain or open

collector devices.

Memory Organization

AT24C01, 1K SERIAL EEPROM: Internally organi zed with

128 pages of 1 byte each. The 1K requires a 7-bit data

word address for random word addressing.

Absolute Maximum Ratings*

Operating Temperature.................................. -55°C to +125°C*NOTICE: Stresses beyond those listed under “Absolute

Maximum Ratings” may cause permanent dam-

age t o the device . This is a s tress ratin g only and

functio nal oper a tion of the device at the se or an y

other conditions beyond those indicated in the

operational sections of this specifica tion is not

implied. Exposure to absolute maximum rating

conditions for extended periods may affect

device reliabi li ty.

Storage Temperature..................................... -65°C to +150°C

Voltage on Any Pin

with Respect to Ground.....................................-1.0V to +7.0V

Maximum Operating Voltage........................................... 6.25V

DC Output Current................. ..... ............................ ...... 5.0 mA

AT24C01

Note: 1. VIL min and VIH max are reference only and are not tested.

Pin Capacitance

Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +1.8V.

Symbol Test Condition Max Units Condition

CI/O Input/Output Capacitance (SDA) 8 pF VI/O = 0V

CIN Input Capacitance (A0, A1, A2, SCL) 6 pF VIN = 0V

DC Characteristics

Applicabl e over reco mmended operating range from: T AI = -4 0°C to +8 5°C, VCC = +1.8V to +5.5V, T AC = 0°C to +70°C,

VCC = +1.8V to +5.5V (unless otherwise noted).

Symbol Parameter Test Condition Min Typ Max Units

VCC1 Supply Voltage 1.8 5.5 V

VCC2 Supply Voltage 2.5 5.5 V

VCC3 Supply Voltage 2.7 5.5 V

VCC4 Supply Voltage 4.5 5.5 V

ICC Supply Current VCC = 5.0V READ at 100 KHz 0.4 1.0 mA

ICC Supply Current VCC = 5.0V WRITE at 100 KHz 2.0 3.0 mA

ISB1 Standby Current VCC = 1.8V VIN = VCC or VSS 0.6 3.0 µA

ISB2 Standby Current VCC = 2.5V VIN = VCC or VSS 1.4 4.0 µA

ISB3 Standby Current VCC = 2.7V VIN = VCC or VSS 1.6 4.0 µA

ISB4 Standby Current VCC = 5.0V VIN = VCC or VSS 8.0 18.0 µA

ILI Input Leak age Current VIN = VCC or VSS 0.10 3.0 µA

ILO Output Leakage Current VOUT = VCC or VSS 0.05 3.0 µA

VIL Input Low Level(1) -0.6 VCC × 0.3 V

VIH Input High Level(1) VCC × 0.7 VCC + 0.5 V

VOL2 Outp ut Low Level V CC = 3.0V IOL = 2.1 mA 0.4 V

VOL1 Outp ut Low Level VCC = 1.8V IOL = 0.15 mA 0.2 V

AT24C01

Note: 1. This parameter is characterized and is not 100% tested.

Device Operation

CLOCK and DATA TRANSITIONS: The SDA pin is nor-

mally pul le d h igh wi th an ex terna l dev ic e. Dat a o n t he SDA

pin m ay c han ge o nly d uri ng SC L l ow t ime perio ds (refe r t o

Data Validity timi ng diagram). Data changes during S CL

high periods will indicate a start or stop condition as

defined below.

START CONDITION: A high-to-low transition of SDA with

SCL high is a start condition which must precede any other

command (refer to Start and Stop Definition timing dia-

gram).

STOP CONDITION: A low-to-high transition of SDA with

SCL high is a stop condition which terminates all communi-

cations. After a read sequence, the stop command will

place the EEPROM in a standby power mode (refer to Start

and Stop Definition timing diagram).

ACKNOWLEDGE: All addresses and data words are seri-

ally transmitted to and from the EE PROM in 8-bit words.

Any d evice on the system bus receiv ing data ( when com-

municating with the EEPROM) must pull the SDA bus low

to acknowledge that it has successfully received each

word. This mu st happen during the ninth cloc k cycle after

each word received and after all other system devices have

freed the SDA bus. The EEPROM will likewise acknowl-

edge by pulling SDA low after receiving each address or

data word (refer to Acknowledge Response from Receiver

timing diagram).

STANDBY MODE: The AT24C01 features a low power

standby mode which is enabled: (a) upon power-up and (b)

after the rece ipt of the STOP bi t and the completi on of any

internal operations.

MEMORY RESET: After an interruption in protocol, power

loss or system reset, any 2-wire part can be reset by follow-

ing these steps:

(a) Clock up to 9 cycles, (b) look for SDA high in each cycle

while SCL is high and then (c) create a start condition as

SDA is hig h.

AC Characteristics

Applicabl e over recomme nded operati ng range from TA = -40°C to +85°C, VCC = +1.8V to +5.5V, CL = 1 TTL Gate an d

100 pF (unless otherwise noted).

Symbol Parameter

2.7-, 2.5-, 1.8-volt 5.0-volt

UnitsMin Max Min Max

fSCL Clo ck Frequency, SCL 100 400 KHz

tLOW Clock Pulse Width Low 4.7 1.2 µs

tHIGH Clock Pulse Width High 4.0 0.6 µs

tINoise Suppression Time(1) 100 50 ns

tAA Clock Low to Data Ou t Valid 0.1 4.5 0.1 0.9 µs

tBUF Time the bus must be free before a new

transmission can start(1) 4.7 1.2 µs

tHD.STA Star t Hold Time 4.0 0.6 µs

tSU.STA Start Set-up Time 4.7 0.6 µs

tHD.DAT Data In Hold Time 0 0 µs

tSU.DAT Data In Set-up Time 200 100 ns

tRInputs Rise Time(1) 1.0 0.3 µs

tFInputs Fall Time(1) 300 300 ns

tSU.STO Stop Set-up Time 4.7 0.6 µs

tDH Data Out Hold Time 100 50 ns

tWR Write Cycle Time 10 10 ms

Endurance(1) 5.0V, 25°C, Page Mode 1M 1M Write

Cycles

AT24C01

Bus Timing

SCL: Serial C lock, SDA: Serial Data I/O

Write Cycle Timing

SCL: Serial C lock, SDA: Serial Data I/O

Note: 1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the internal clear/write

cycle.

SCL

SDA

WORD n

8th BIT ACK

STOP

CONDITION START

CONDITION

tWR(1)

AT24C01

Data Validity

Start and Stop Definition

Output Acknowledge

AT24C01

Write Operations

BYTE WR ITE: Following a start condition, a write operation

requires a 7-bit data word address and a low write bit. Upon

receip t of this a ddress, th e EEPROM will again respond

with a zero and then clock in the first 8-bit data word. Fol-

lowing rec eip t of t he 8-b it da ta wo rd , the EE PR OM wil l o ut-

put a zero and the addressing device, such as a

microcontr oller, mus t terminate th e write s equence with a

stop condition. At this time the EEPROM enters an inter-

nally-timed write cycle to the nonvolatile memory. All inputs

are disa ble d durin g thi s write cycl e , tWR, and the EE P RO M

will not respond until the write is c omplete (refer to Figure

1).

PAGE WRITE: The AT24 C01 is capable of a 4-byte pag e

write.

A page write is initiated the same as a byte write but the

microcontroller does not send a stop condition after the first

data word is clocked in. Instead, after the EEPROM

acknowledges receipt of the first data word, the microcon-

troller can transmit up to three more data words. The

EEPROM will respond with a zero after each data word

received. The microcontroller must terminate the page

write sequence with a stop condition (refer to Figure 2).

The data word address lower 2 bits are internally incre-

mented fol low ing the re ce ipt of e ac h da ta wo rd . The h ig her

five data word address bits are not incremented, retaining

the memory page row location. W hen the word address,

inter nally gene rated, rea ches the p age bounda ry, the fol-

lowing byte is p lac ed at the begi nnin g of the s ame page . If

more than four data words are transmitted to the EEPROM,

the data word add ress wil l “roll over ” and previou s data will

be overwritten.

ACKNOWLEDGE POLLING: Once the internally-timed

write cycle ha s started and the EEPROM inputs are dis-

abled, acknowl edge polling can be initia ted. This invol ves

sending a start condition followed by the devic e address

word. The rea d/write bit is repr esentative of the operation

desired. O nly if the internal write cycl e has completed will

the EEPROM respond with a zero allowing the read or

write sequence to continue.

Read Operations

Read operations are initiated the same way as write opera-

tions with the exception that the read/write select bit in the

device address word is set to one. There are two read

operations: byte read and sequential read.

BYTE READ: A byte read is initiated with a start condition

followed by a 7-bit data word address and a high read bit.

The AT24C01 will respond with an acknowledge and then

serially output 8 data bits. The microcontroller does not

respond with a zero but does generate a following stop

condition (refer to Figure 3).

SEQUENTIAL READ: Seq uential read s are initiate d the

same as a byt e rea d. Aft er th e micr ocon troll er rec eives an

8-bit data word, it responds with an acknowledge. As long

as the EEPROM re ceives an acknowledge, it will continue

to incr ement the da ta word addr ess and ser ially cl ock out

sequential d ata words. Whe n the memo ry address limi t is

reached, the data word address will “roll over” and the

sequential read will co ntinue. The sequential read opera-

tion is terminated when the microcontroller does not

respond with an input zero but does generate a following

stop condition (refer to Figure 4).

Figure 1. Byte Write

AT24C01

Figure 2. Page Write

Figure 3. Byte Read

Figure 4. Sequential Read

AT24C01

Ordering In formation

tWR (max)

(ms) ICC (max)

(µA) ISB (max)

(µA) fMAX

(kHz) Ordering Code Package Operation Range

10 3000 18 400 AT24C01-10PC

AT24C01-10SC

AT24C01-10MC

AT24C01-10TC

8P3

8S1

Commercial

(0°C to 70°C)

3000 18 400 AT24C01-10PI

AT24C01-10SI

AT24C01-10MI

AT24C01-10TI

8P3

8S1

Industrial

(-40°C to 85°C)

10 1500 4 100 AT24C01-10PC-2.7

AT24C01-10SC-2.7

AT24C01-10MC-2.7

AT24C01-10TC-2.7

8P3

8S1

Commercial

(0°C to 70°C)

1500 4 100 AT24C01-10PI-2.7

AT24C01-10SI-2.7

AT24C01-10MI-2.7

AT24C01-10TI-2.7

8P3

8S1

Industrial

(-40°C to 85°C)

10 1000 4 100 AT24C01-10PC-2.5

AT24C01-10SC-2.5

AT24C01-10MC-2.5

AT24C01-10TC-2.5

8P3

8S1

Commercial

(0°C to 70°C)

1000 4 100 AT24C01-10PI-2.5

AT24C01-10SI-2.5

AT24C01-10MI-2.5

AT24C01-10TI-2.5

8P3

8S1

Industrial

(-40°C to 85°C)

10 800 3 100 AT24C01-10PC-1.8

AT24C01-10SC-1.8

AT24C01-10MC-1.8

AT24C01-10TC-1.8

8P3

8S1

Commercial

(0°C to 70°C)

800 3 100 AT24C01-10PI-1.8

AT24C01-10SI-1.8

AT24C01-10MI-1.8

AT24C01-10TI-1.8

8P3

8S1

Industrial

(-40°C to 85°C)

Package Type

8M 8-Lead, 0.118” Wide, Miniature Small Outline Package (MSOP)

8P3 8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)

8S1 8-Lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)

8T 8-Lead, 0.170” Wide, Thin Shrink Small Outline Package (TSSOP)

Options

Blank Standard Operation (4.5V to 5.5V)

-2.7 Low-Voltage (2.7V to 5.5V)

-2.5 Low-Voltage (2.5V to 5.5V)

-1.8 Low-Voltage (1.8V to 5.5V)

AT24C01

Packaging Information

0.23 (0.009)

0.13 (0.005)

1.10 (0.043)

0.97 (0.038)

0.15 (0.006)

0.05 (0.002)

0.40 (0.016)

0.25 (0.010)

3.10 (0.122)

2.90 (0.114)

3.10 (0.122)

2.90 (0.114)

PIN 1

0.65 (0.026) TYP

4.90 (0.193)

REF

3.81

(0.150)

REF

.400 (10.16)

.355 (9.02)

.280 (7.11)

.240 (6.10)

.037 (.940)

.027 (.690)

.300 (7.62) REF

.210 (5.33) MAX

SEATING

PLANE

.100 (2.54) BSC

.015 (.380) MIN

.022 (.559)

.014 (.356)

.150 (3.81)

.115 (2.92) .070 (1.78)

.045 (1.14)

.325 (8.26)

.300 (7.62)

15 REF

.430 (10.9) MAX

.012 (.305)

.008 (.203)

.020 (.508)

.013 (.330)

PIN 1

.157 (3.99)

.150 (3.81) .244 (6.20)

.228 (5.79)

.050 (1.27) BSC

.196 (4.98)

.189 (4.80) .068 (1.73)

.053 (1.35)

.010 (.254)

.004 (.102)

8REF .010 (.254)

.007 (.203)

.050 (1.27)

.016 (.406)

*Controlling dimension: millimeters

6.50 (.256)

6.25 (.246)

0.30 (.012)

0.19 (.008)

.65 (.026) BSC

1.05 (.041)

0.80 (.033)

3.10 (.122)

4.5 (.177)

2.90 (.114)

4.3 (.169)

0.15 (.006)

0.05 (.002)

1.20 (.047) MAX

0.20 (.008)

0.75 (.030)

0.09 (.004)

0.45 (.018)

8REF

PIN 1

8M, 8-Lead, 0.118” Wide , Miniature Small Outline

Package (MSOP) 8P3, 8-Lead, 0.300” Wide, Plastic Dual Inline

Package (PDIP)

Dimensions in Inches and (Millimeters)

JEDEC STANDARD MS-001 BA

8S1, 8-Lead, 0.150” Wide, Plastic Gull Wing Small

Outline (JEDEC SOIC)

Dimensions in Inches and (Millimeters)

8T, 8-Lead 0.170” Wide, Thin Shrink Small Outline

Package (TSSOP)

Dimensions in Millimeters and (Inches)*