MCP1810 Ultra-Low Quiescent Current LDO Regulator Features Description * Ultra-Low Quiescent Current: 20 nA (typical) * Ultra-Low Shutdown Supply Current: 1 nA (typical) * 150 mA Output Current Capability for VR 3.5V * 100 mA Output Current Capability for VR 3.5V * Input Operating Voltage Range: 2.5V to 5.5V * Standard Output Voltages (VR): 1.2V, 1.5V, 1.8V, 2.0V, 2.2V, 2.5V, 2.8V, 3.0V, 3.3V, 3.5V, 4.2V * Low Dropout Voltage: 380 mV maximum at 150 mA * Stable with 1.0 F Ceramic Output Capacitor * Overcurrent Protection * Available in the following packages: - 2 x 2 mm No Lead VDFN - 3 Lead SOT-23 (VR < 4.0V) - 5 Lead SOT-23 (VR < 4.0V) The MCP1810 is a 150 mA (for VR 3.5V), 100 mA (for VR 3.5V) low dropout (LDO) linear regulator that provides high-current and low-output voltages, while maintaining an ultra-low 20 nA of quiescent current during device operation. In addition, the MCP1810 can be shut down for an even lower 1 nA (typical) supply current draw. The MCP1810 comes in 11 standard fixed output-voltage versions: 1.2V, 1.5V, 1.8V, 2.0V, 2.2V, 2.5V, 2.8V, 3.0V, 3.3V, 3.5V and 4.2V. The 150 mA output current capability, combined with the low output-voltage capability, make the MCP1810 a good choice for new ultra-long-life LDO applications that have high-current demands, but require ultra-low power consumption during sleep states. The MCP1810 is stable with ceramic output capacitors that inherently provide lower output noise and reduce the size and cost of the entire regulator solution. Only 1 F (2.2 F recommended) of output capacitance is needed to stabilize the LDO. Applications * * * * * Energy Harvesting Long-Life, Battery-Powered Applications Smart Cards Ultra-Low Consumption "Green" Products Portable Electronics The MCP1810 ultra-low quiescent and shutdown current allows it to be paired with other ultra-low current draw devices, such as Microchip's nanoWatt eXtreme Low Power (XLP) technology devices, for a complete ultra-low-power solution. Package Types MCP1810 2x2 VDFN* GND 1 VOUT 2 NC 3 NC 4 8 SHDN EP 9 7 VIN 6 FB 5 NC * Includes Exposed Thermal Pad (EP); see Table 3-1. 5 Lead-SOT23 GND NC 3 Lead-SOT23 GND 1 VOUT 2016-2018 Microchip Technology Inc. 4 5 3 2 VIN VIN 1 2 SHDN . 3 VOUT DS20005623B-page 1 MCP1810 Typical Application VOUT VIN CIN COUT LOAD + - ESR MCP1810 FB SHDN GND Functional Block Diagram VIN VOUT Overcurrent Voltage Reference + FB - SHDN SHDN GND DS20005623B-page 2 2016-2018 Microchip Technology Inc. MCP1810 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Input voltage, VIN .....................................................................................................................................................+6.0V Maximum Voltage on any pin - ......................................................................................................(GND - 0.3V) to +6.0V Output Short-Circuit Duration................................................................................................. ............................Unlimited Storage Temperature ............................................................................................................................ -65C to +150C Maximum Junction Temperature, TJ ..................................................................................................................... +150C Operating Junction Temperature, TJ ........................................................................................................ -40C to +85C ESD protection on all pins (HBM) .......................................................................................................................... 4 kV Notice: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. AC/DC CHARACTERISTICS Electrical Specifications: Unless otherwise noted, VIN = VR + 800 mV (Note 1), IOUT = 1 mA, CIN = COUT = 2.2 F ceramic (X7R), TA = +25C. Boldface type applies for junction temperatures TJ of -40C to +85C (Note 2). Parameters Sym. Min. Typ. Max. Units 2.7 -- 5.5 V 2.5 -- 5.5 V VOUT 1.2 -- 4.2 V Input Quiescent Current IQ -- 20 50 nA VIN = VR + 800 mV or 2.7V (whichever is greater) IOUT = 0 Input Quiescent Current for SHDN Mode ISHDN -- 1 -- nA SHDN = GND Input Operating Voltage VIN Output Voltage Range Ground Current IGND Maximum Continuous Output Current IOUT Current Limit Line Regulation Note 1: 2: 3: 4: VOUT VOUT/ (VOUT x VIN) VR 1.8V, IOUT < 50 mA -- 200 290 A VIN = VR + 800 mV or 2.7V (whichever is greater) IOUT = 150 mA, VR 3.5V IOUT = 100 mA, VR > 3.5V -- -- 150 mA VR 3.5V -- -- 100 mA VR 3.5V -- 350 -- mA VOUT = 0.9 x VR VR 3.5V -- 250 -- mA VOUT = 0.9 x VR VR 3.5V VR - 4% -- VR + 4% V VR < 1.8V (Note 3) VR - 2% -- VR + 2% V VR 1.8V (Note 3) -4 -- +4 %/V IOUT Output Voltage Regulation Conditions VIN = VIN(min.) to 5.5V IOUT = 50 mA (Note 1) The minimum VIN must meet two conditions: VIN VIN(MIN) and VIN VR VDROPOUT(MAX). The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the desired junction temperature. The test time is short enough such that the rise in junction temperature over the ambient temperature is not significant. VR is the nominal regulator output voltage. VR = 1.2V, 1.5V, 1.8V, 2.0V, 2.2V, 2.5V, 2.8V, 3.0V, 3.3V, 3.5V or 4.2V. Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 3% below its nominal value that was measured with an input voltage of VIN = VOUT(MAX) + VDROPOUT(MAX). 2016-2018 Microchip Technology Inc. DS20005623B-page 3 MCP1810 AC/DC CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise noted, VIN = VR + 800 mV (Note 1), IOUT = 1 mA, CIN = COUT = 2.2 F ceramic (X7R), TA = +25C. Boldface type applies for junction temperatures TJ of -40C to +85C (Note 2). Parameters Load Regulation Dropout Voltage Sym. Min. Typ. Max. Units VOUT/VOUT -3 1 +3 % -- -- 380 mV IOUT = 150 mA VR 3.5V (Note 4) -- -- 280 mV IOUT = 100 mA VR > 3.5V (Note 4) VDROPOUT Conditions VIN = (VIN(MIN) + VIN(MAX))/2 IOUT = 0.02 mA to 150 mA (Note 1) Shutdown Input Logic High Input VSHDN-HIGH 70 -- -- %VIN VIN = VR + 800 mV or 2.7V (whichever is greater) IOUT = 1 mA (Note 3) Logic Low Input VSHDN-LOW -- -- 30 %VIN VIN = VR + 800 mV or 2.7V (whichever is greater) IOUT = 1 mA (Note 3) TOR -- 20 -- ms AC Performance Output Delay from SHDN -- Output Noise Power Supply Ripple Rejection Ratio Note 1: 2: 3: 4: 0.48 -- VIN = 3.3V CIN = COUT = 2.2 F ceramic V/Hz (X7R) VR = 2.5V, IOUT = 50 mA f = 1 kHz VIN = 3.3V CIN = COUT = 2.2 F ceramic Vrms (X7R) VR = 2.5V, IOUT = 50 mA f = 100 Hz to 1 MHz eN PSRR SHDN = GND to VIN VOUT = GND to 95% VR -- 48 -- -- 40 -- dB f = 100 Hz, IOUT = 10 mA VINAC = 200 mV pk-pk CIN = 0 F The minimum VIN must meet two conditions: VIN VIN(MIN) and VIN VR VDROPOUT(MAX). The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the desired junction temperature. The test time is short enough such that the rise in junction temperature over the ambient temperature is not significant. VR is the nominal regulator output voltage. VR = 1.2V, 1.5V, 1.8V, 2.0V, 2.2V, 2.5V, 2.8V, 3.0V, 3.3V, 3.5V or 4.2V. Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 3% below its nominal value that was measured with an input voltage of VIN = VOUT(MAX) + VDROPOUT(MAX). DS20005623B-page 4 2016-2018 Microchip Technology Inc. MCP1810 TEMPERATURE SPECIFICATIONS Parameters Sym. Min. Typ. Max. Units Conditions Operating Junction Temperature Range TJ -40 -- +85 C Steady State Maximum Junction Temperature TJ -- -- +150 C Transient Storage Temperature Range TA -65 -- +150 C JA -- 73.1 -- C/W JC -- 10.7 -- C/W Temperature Ranges Thermal Package Resistances Thermal Resistance, 2 x 2 mm VDFN-8LD Thermal Resistance, SOT23-3LD Thermal Resistance, SOT23-5LD 2016-2018 Microchip Technology Inc. JA -- 256 -- C/W JC -- 81 -- C/W JA -- 256 -- C/W JC -- 81 -- C/W JEDEC(R) standard FR4 board with 1 oz. copper and thermal vias DS20005623B-page 5 MCP1810 NOTES: DS20005623B-page 6 2016-2018 Microchip Technology Inc. MCP1810 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, COUT = 2.2 F ceramic (X7R), CIN = 2.2 F ceramic (X7R), IOUT = 1 mA, TA = +25C, VIN = VR + 0.8V, SHDN = 1 M pull-up to VIN. 4.210 VR = 1.2V VR = 4.2V 1.215 4.205 Output Voltage (V) Output Voltage (V) 1.220 TJ = +25C 1.210 TJ = -40C 1.205 TJ = +85C 1.200 1.195 2.5 3.5 4.5 Input Voltage (V) 4.5 1.220 VR = 2.5V 4.9 5.1 Input Voltage (V) VIN = 2.5V 1.215 5.3 5.5 VR = 1.2V 1.210 TJ = -40C Output Voltage (V) Output Voltage (V) 4.7 FIGURE 2-4: Output Voltage vs. Input Voltage (VR = 4.2V). 2.510 2.505 TJ = +25C 2.500 2.495 TJ = +85C 1.205 TJ = +25C 1.200 TJ = -40C 1.195 1.190 TJ = +85C 1.185 1.180 1.175 1.170 2.490 2.5 3.5 4.5 Input Voltage (V) 0 5.5 FIGURE 2-2: Output Voltage vs. Input Voltage (VR = 2.5V). 25 50 75 100 Load Current (mA) 125 150 FIGURE 2-5: Output Voltage vs. Load Current (VR = 1.2V). 2.530 VR = 3.3V VIN = 3.3V VR = 2.5V 2.520 Output Voltage (V) 3.310 Output Voltage (V) TJ = +85C TJ = -40C 4.190 5.5 FIGURE 2-1: Output Voltage vs. Input Voltage (VR = 1.2V). 3.312 4.195 4.185 1.190 2.515 TJ = +25C 4.200 TJ = +85C 3.308 TJ = +25C 3.306 3.304 TJ = -40C 3.302 2.510 TJ = +25C 2.500 TJ = -40C 2.490 TJ = +85C 2.480 3.300 2.470 3.5 4.0 4.5 Input Voltage (V) 5.0 FIGURE 2-3: Output Voltage vs. Input Voltage (VR = 3.3V). 2016-2018 Microchip Technology Inc. 5.5 0 25 50 75 100 Load Current (mA) 125 150 FIGURE 2-6: Output Voltage vs. Load Current (VR = 2.5V). DS20005623B-page 7 MCP1810 Note: Unless otherwise indicated, COUT = 2.2 F ceramic (X7R), CIN = 2.2 F ceramic (X7R), IOUT = 1 mA, TA = +25C, VIN = VR + 0.8V, SHDN = 1 M pull-up to VIN. 3.370 VIN = 4.1V 0.14 VR = 3.3V 3.350 3.340 3.330 3.320 TJ = +85C TJ = +25C 3.310 3.300 3.290 TJ = -40C 3.270 TJ = +85C TJ = -40C 0.08 0.06 0.04 TJ = +25C 0.00 0 25 50 75 100 Load Current (mA) 125 150 FIGURE 2-7: Output Voltage vs. Load Current (VR = 3.3V). 4.236 VIN = 5.0V 0 0.08 VR = 4.2V Dropout Voltage (V) 4.206 TJ = +25C 4.196 4.186 TJ = -40C TJ = +85C 4.176 125 150 VR = 4.2V TJ = -40C 0.06 0.05 0.04 TJ = +85C TJ = +25C 0.03 0.02 0.01 4.166 0 0 25 50 75 Load Current (mA) 100 FIGURE 2-8: Output Voltage vs. Load Current (VR = 4.2V). 0 Output Noise V/Hz 0.20 TJ = -40C 0.15 TJ = +85C TJ = +25C 0.10 0.05 0.00 50 75 100 Load Current (mA) 125 150 FIGURE 2-9: Dropout Voltage vs. Load Current (VR = 2.5V) DS20005623B-page 8 40 60 Load Current (mA) 80 100 100 0.25 25 20 FIGURE 2-11: Dropout Voltage vs. Load Current (VR = 4.2V). VR = 2.5V 0 50 75 100 Load Current (mA) 0.07 4.216 0.30 25 FIGURE 2-10: Dropout Voltage vs. Load Current (VR = 3.3V). 4.226 Output Voltage (V) 0.10 0.02 3.280 Dropout Voltage (V) VR = 3.3V 0.12 Dropout Voltage (V) Output Voltage (V) 3.360 10 1 0.1 0.01 VR = 1.2V VIN = 2.5V, CIN = COUT = 2.2 F IOUT = 50 mA Noise (100 Hz to 1 MHz) = 53.49 Vrms 0.001 0.01 FIGURE 2-12: (VR = 1.2V). 0.1 1 10 Frequency (kHz) 100 1000 Noise vs. Frequency 2016-2018 Microchip Technology Inc. MCP1810 Note: Unless otherwise indicated, COUT = 2.2 F ceramic (X7R), CIN = 2.2 F ceramic (X7R), IOUT = 1 mA, TA = +25C, VIN = VR + 0.8V, SHDN = 1 M pull-up to VIN. 10 10 1 0.1 0.01 VR = 2.5V VIN = 3.3V, CIN= COUT = 2.2 F IOUT = 50 mA Noise (100 Hz to 1 MHz) = 47.57 Vrms 0.001 0.01 0.1 FIGURE 2-13: (VR = 2.5V). 1 10 Frequency (kHz) -20 -30 100 -60 0.01 1000 Noise vs. Frequency 1 10 Frequency (kHz) 100 1000 FIGURE 2-16: Power Supply Ripple Rejection vs. Frequency (VR = 1.2V). 1 VR = 2.5V CIN = 0, COUT = 2.2 F VIN = 3.5V + 0.2 Vpk-pk IOUT = 50 mA -10 PSRR (dB) Output Noise V/Hz 0.1 10 0.1 0.1 FIGURE 2-14: (VR = 3.3V). 1 10 Frequency (kHz) -20 -30 -40 VR = 3.3V VIN = 4.1V, CIN = COUT = 2.2 F IOUT = 50 mA Noise (100 Hz to 1 MHz) = 43.01 Vrms 0.001 0.01 IOUT = 10 mA -50 100 -60 0.01 1000 Noise vs. Frequency 0.1 1 10 Frequency (kHz) 100 1000 FIGURE 2-17: Power Supply Ripple Rejection vs. Frequency (VR = 2.5V). 10 10 0 1 VR = 3.3V CIN = 0, COUT = 2.2 F VIN = 4.3V + 0.2 Vpk-pk IOUT = 50 mA -10 PSRR (dB) Output Noise V/Hz IOUT = 10 mA -40 0 0.1 0.01 IOUT = 50 mA -50 10 0.01 VR = 1.2V CIN = 0, COUT = 2.2 F VIN = 2.7V + 0.2 Vpk-pk -10 PSRR (dB) Output Noise V/Hz 0 FIGURE 2-15: (VR = 4.2V). 0.1 1 10 Frequency (kHz) IOUT = 10 mA -50 100 Noise vs. Frequency 2016-2018 Microchip Technology Inc. -30 -40 VR = 4.2V VIN = 5.0V, CIN = COUT = 2.2 F IOUT = 50 mA Noise (100 Hz to 1 MHz) = 38.70 Vrms 0.001 0.01 -20 1000 -60 0.01 0.1 1 10 Frequency (kHz) 100 1000 FIGURE 2-18: Power Supply Ripple Rejection vs. Frequency (VR = 3.3V). DS20005623B-page 9 MCP1810 Note: Unless otherwise indicated, COUT = 2.2 F ceramic (X7R), CIN = 2.2 F ceramic (X7R), IOUT = 1 mA, TA = +25C, VIN = VR + 0.8V, SHDN = 1 M pull-up to VIN. 10 0 VR = 4.2V CIN = 0, COUT = 2.2 F VIN = 5.2V + 0.2 Vpk-pk VR = 3.3V, VIN = 4.1V, IOUT = 100 A to 10 mA IOUT = 50 mA PSRR (dB) -10 VOUT -20 VOUT (AC Coupled, 100 mV/Div) -30 10 mA IOUT = 10 mA -40 -50 IOUT -60 0.01 0.1 1 10 Frequency (kHz) 100 1000 FIGURE 2-19: Power Supply Ripple Rejection vs. Frequency (VR = 4.2V). 100 A IOUT (DC Coupled, 5 mA/Div) Time = 80 s/Div FIGURE 2-22: (VR = 3.3V). Dynamic Load Step VR = 4.2V, VIN = 5.0V, IOUT = 100 A to 10 mA VR = 1.2V, VIN = 2.7V, IOUT = 100 A to 10 mA VOUT VOUT VOUT (AC Coupled, 100 mV/Div) VOUT (AC Coupled, 100 mV/Div) 10 mA 10 mA IOUT 100 A IOUT 100 A IOUT (DC Coupled, 5 mA/Div) IOUT (DC Coupled, 5 mA/Div) Time = 80 s/Div FIGURE 2-20: (VR = 1.2V). Dynamic Load Step Time = 80 s/Div FIGURE 2-23: (VR = 4.2V). Dynamic Load Step VR = 1.2V, VIN = 2.5V to 3.5V, IOUT = 10 mA VR = 2.5V, VIN = 3.3V, IOUT = 100 A to 10 mA 3.5V VOUT 2.5V VOUT (AC Coupled, 100 mV/Div) 10 mA VIN VIN (DC Coupled, 1V/Div) VOUT IOUT 100 A VOUT (AC Coupled, 200 mV/Div) IOUT (DC Coupled, 5 mA/Div) Time = 80 s/Div Time = 80 s/Div FIGURE 2-21: (VR = 2.5V). DS20005623B-page 10 Dynamic Load Step FIGURE 2-24: (VR = 1.2V). Dynamic Line Step 2016-2018 Microchip Technology Inc. MCP1810 Note: Unless otherwise indicated, COUT = 2.2 F ceramic (X7R), CIN = 2.2 F ceramic (X7R), IOUT = 1 mA, TA = +25C, VIN = VR + 0.8V, SHDN = 1 M pull-up to VIN. VR = 2.5V, VIN = 3.5V to 4.5V, IOUT = 10 mA VR = 1.2V, VIN = 0V to 2.7V, IOUT = 100 A 4.5V 2.7V 3.5V VIN VIN (DC Coupled, 1V/Div) 0V VIN (DC Coupled, 2V/Div) VIN VOUT VOUT VOUT (DC Coupled, 2V/Div) VOUT (AC Coupled, 200 mV/Div) Time = 10 ms/Div Time = 80 s/Div FIGURE 2-25: (VR = 2.5V). Dynamic Line Step VR = 3.3V, VIN = 4.3V to 5.3V, IOUT = 10 mA FIGURE 2-28: (VR = 1.2V). Start-up from VIN VR = 2.5V, VIN = 0V to 3.5V, IOUT = 100 A 5.3V 3.5V 4.3V 0V VIN VIN (DC Coupled, 1V/Div) VIN (DC Coupled, 2V/Div) VOUT VOUT VIN VOUT (AC Coupled, 200 mV/Div) VOUT (DC Coupled, 2V/Div) Time = 10 ms/Div Time = 80 s/Div FIGURE 2-26: (VR = 3.3V). Dynamic Line Step FIGURE 2-29: (VR = 2.5V). Start-up from VIN VR = 3.3V, VIN = 0V to 4.3V, IOUT = 100 A VR = 4.2V, VIN = 4.5V to 5.5V, IOUT = 10 mA 5.5V 4.3V 4.5V VIN VIN (DC Coupled, 1V/Div) 0V VIN (DC Coupled, 2V/Div) VOUT VIN VOUT VOUT (AC Coupled, 200 mV/Div) VOUT (DC Coupled, 2V/Div) Time = 80 s/Div FIGURE 2-27: (VR = 4.2V). Dynamic Line Step 2016-2018 Microchip Technology Inc. Time = 10 ms/Div FIGURE 2-30: (VR = 3.3V). Start-up from VIN DS20005623B-page 11 MCP1810 Note: Unless otherwise indicated, COUT = 2.2 F ceramic (X7R), CIN = 2.2 F ceramic (X7R), IOUT = 1 mA, TA = +25C, VIN = VR + 0.8V, SHDN = 1 M pull-up to VIN. VR = 4.2V, VIN = 0V to 5.2V, IOUT = 100 A VR = 3.3V, VIN = 4.1V, IOUT = 10 mA 4.1V 5.2V 0V 0V VIN ~SHDN VIN (DC Coupled, 2V/Div) SHDN (DC Coupled, 2V/Div) VOUT VOUT VOUT (DC Coupled, 2V/Div) VOUT (DC Coupled, 2V/Div) Time = 10 ms/Div Time = 10 ms/Div FIGURE 2-31: (VR = 4.2V). Start-up from VIN FIGURE 2-34: (VR = 3.3V). Start-up from SHDN VR = 4.2V, VIN = 5.0V, IOUT = 10 mA VR = 1.2V, VIN = 2.7V, IOUT = 10 mA 5.0V 2.7V 0V 0V ~SHDN ~SHDN SHDN (DC Coupled, 2V/Div) SHDN (DC Coupled, 2V/Div) VOUT VOUT VOUT (DC Coupled, 2V/Div) VOUT (DC Coupled, 2V/Div) Time = 10 ms/Div Time = 10 ms/Div FIGURE 2-32: (VR = 1.2V). Start-up from SHDN FIGURE 2-35: (VR = 4.2V). Start-up from SHDN 1.4 VR = 1.2V 1.2 Load Regulation (%) VR = 2.5V, VIN = 3.3V, IOUT = 10 mA 3.3V 0V ~SHDN SHDN (DC Coupled, 2V/Div) 1.0 VIN = 2.5V IOUT = 0 mA to 100 mA 0.8 0.6 VIN = 3.0V 0.4 0.2 VIN = 4.0V 0.0 -0.2 VOUT -40 VOUT (DC Coupled, 2V/Div) Time = 10 ms/Div FIGURE 2-33: (VR = 2.5V). DS20005623B-page 12 VIN = 5.5V Start-up from SHDN -15 10 35 60 85 Junction Temperature (C) FIGURE 2-36: Load Regulation vs. Junction Temperature (VR = 1.2V). 2016-2018 Microchip Technology Inc. MCP1810 Note: Unless otherwise indicated, COUT = 2.2 F ceramic (X7R), CIN = 2.2 F ceramic (X7R), IOUT = 1 mA, TA = +25C, VIN = VR + 0.8V, SHDN = 1 M pull-up to VIN. 0.25 0.20 0.8 IOUT = 0 mA to 100 mA VIN = 3.0V Line Regulation (%/V) Load Regulation (%) 0.9 VR = 2.5V 0.15 0.10 VIN = 4.0V 0.05 VIN = 5.5V 0.00 -0.05 VIN = 5.0V -0.10 -40 -15 10 35 60 Junction Temperature (C) 85 0.4 VIN = 4.1V VIN = 4.5V VIN = 5.5V -0.02 -40 85 FIGURE 2-38: Load Regulation vs. Junction Temperature (VR = 3.3V). 0.24 IOUT = 125 mA 0.22 IOUT = 50 mA 0.21 IOUT = 10 mA 0.20 0.19 VR = 2.5V IOUT = 1 mA VIN = 3.3V to 5.5V -15 10 35 60 Junction Temperature (C) 0.200 0.195 Line Regulation (%/V) IOUT = 0 mA to 100 mA 0.020 IOUT = 100 mA 85 FIGURE 2-41: Line Regulation vs. Junction Temperature (VR = 2.5V). VR = 4.2V VIN = 5.5V 85 0.23 -40 0.025 Load Regulation (%) -15 10 35 60 Junction Temperature (C) 0.25 0.17 -15 10 35 60 Junction Temperature (C) IOUT = 1 mA IOUT = 150 mA 0.18 VIN = 5.0V -0.04 IOUT = 50 mA VR = 1.2V VIN = 2.5V to 5.5V 0.26 Line Regulation (%/V) Load Regulation (%) 0.5 0.27 0.04 0.00 IOUT = 10 mA FIGURE 2-40: Line Regulation vs. Junction Temperature (VR = 1.2V). VIN = 3.5V 0.02 IOUT = 100 mA 0.6 -40 VR = 3.3V IOUT = 0 mA to 100 mA 0.06 IOUT = 125 mA 0.7 0.3 FIGURE 2-37: Load Regulation vs. Junction Temperature (VR = 2.5V). 0.08 IOUT = 150 mA VIN = 4.6V 0.015 0.010 VIN = 5.0V 0.005 0.190 VR = 3.3V VIN = 4.1V to 5.5V IOUT = 125 mA 0.185 0.180 IOUT = 100 mA IOUT = 50 mA 0.175 0.170 0.165 IOUT = 1 mA 0.160 0.155 0.000 IOUT = 150 mA IOUT = 10 mA 0.150 -40 -15 10 35 60 Junction Temperature (C) FIGURE 2-39: Load Regulation vs. Junction Temperature (VR = 4.2V). 2016-2018 Microchip Technology Inc. 85 -40 -15 10 35 60 Junction Temperature (C) 85 FIGURE 2-42: Line Regulation vs. Junction Temperature (VR = 3.3V). DS20005623B-page 13 MCP1810 Note: Unless otherwise indicated, COUT = 2.2 F ceramic (X7R), CIN = 2.2 F ceramic (X7R), IOUT = 1 mA, TA = +25C, VIN = VR + 0.8V, SHDN = 1 M pull-up to VIN. 0.20 VIN = 5.0V to 5.5V 0.19 Quiescent Current (nA) Line Regulation (%/V) 20 VR = 4.2V IOUT = 1 mA 0.18 IOUT = 125 mA 0.17 IOUT = 150 mA IOUT = 100 mA 0.16 0.15 IOUT = 50 mA IOUT = 10 mA 0.14 TJ = -40C 16 TJ = 85C 14 12 10 8 TJ = 25C 6 4 -40 -15 10 35 60 Junction Temperature (C) 85 FIGURE 2-43: Line Regulation vs. Junction Temperature (VR = 4.2V). 3.5 20 VR = 2.5V 18 Quiescent Current (nA) TJ = 85C 16 14 12 TJ = 25C 10 TJ = -40C 8 4.0 4.5 5.0 Input Voltage (V) 5.5 FIGURE 2-46: Quiescent Current vs. Input Voltage (VR = 3.3V). 20 Quiescent Current (nA) VR = 3.3V 18 6 VR = 4.2V 18 TJ = 85C 16 TJ = 25C 14 12 10 TJ = -40C 8 6 4 4 2.5 3.0 3.5 4.0 4.5 Input Voltage (V) 5.0 5.5 FIGURE 2-44: Quiescent Current vs. Input Voltage (VR = 1.2V). 4.5 3.95 VR = 2.5V Ground Current (A) TJ = 85C 16 14 12 TJ = 25C 10 TJ = -40C 8 4.9 5.1 Input Voltage (V) 5.3 5.5 FIGURE 2-47: Quiescent Current vs. Input Voltage (VR = 4.2V). 20 18 4.7 IOUT = 1 mA VR = 1.2V VIN = 2.7V 3.90 3.85 3.80 3.75 6 4 3.70 2.5 3.0 3.5 4.0 4.5 Input Voltage (V) 5.0 5.5 FIGURE 2-45: Quiescent Current vs. Input Voltage (VR = 2.5V). DS20005623B-page 14 -40 -15 10 35 60 Junction Temperature (C) 85 FIGURE 2-48: Ground Current vs. Junction Temperature (VR = 1.2V). 2016-2018 Microchip Technology Inc. MCP1810 Note: Unless otherwise indicated, COUT = 2.2 F ceramic (X7R), CIN = 2.2 F ceramic (X7R), IOUT = 1 mA, TA = +25C, VIN = VR + 0.8V, SHDN = 1 M pull-up to VIN. 4.90 200 VR = 2.5V IOUT = 1 mA Ground Current (A) Ground Current (A) 4.80 4.75 4.70 4.65 4.60 -15 10 35 60 Junction Temperature (C) 120 TJ = 25C TJ = 85C 100 80 60 40 4.8 IOUT = 1 mA 0 85 FIGURE 2-49: Ground Current vs. Junction Temperature (VR = 2.5V). VR = 3.3V Ground Current (A) 4.76 4.74 4.72 4.7 4.68 4.66 4.64 -40 -15 10 35 60 Junction Temperature (C) IOUT = 1 mA 240 220 200 180 160 140 120 100 80 60 40 20 0 TJ = 25C Ground Current (A) 4.90 4.70 TJ = -40C TJ = 85C 25 VR = 3.3V 225 4.75 150 VR = 2.5V 250 4.80 125 50 75 100 Load Current (mA) 125 150 FIGURE 2-53: Ground Current vs. Load Current (VR = 2.5V). VR = 4.2V 4.85 50 75 100 Load Current (mA) VIN = 3.3V 0 85 FIGURE 2-50: Ground Current vs. Junction Temperature (VR = 3.3V). 25 FIGURE 2-52: Ground Current vs. Load Current (VR = 1.2V). 4.78 Ground Current (A) TJ = -40C 140 0 -40 Ground Current (A) 160 20 4.55 4.95 VR = 1.2V VIN = 2.7V 180 4.85 VIN = 4.1V 200 TJ = -40C 175 150 TJ = 85C 125 TJ = 25C 100 75 50 25 4.65 0 -40 -15 10 35 60 Junction Temperature (C) 85 FIGURE 2-51: Ground Current vs. Junction Temperature (VR = 4.2V). 2016-2018 Microchip Technology Inc. 0 25 50 75 100 Load Current (mA) 125 150 FIGURE 2-54: Ground Current vs. Load Current (VR = 3.3V). DS20005623B-page 15 MCP1810 Note: Unless otherwise indicated, COUT = 2.2 F ceramic (X7R), CIN = 2.2 F ceramic (X7R), IOUT = 1 mA, TA = +25C, VIN = VR + 0.8V, SHDN = 1 M pull-up to VIN. 200 160 TJ = 25C 140 120 TJ = -40C TJ = 85C 100 80 60 40 3.5 3.0 TJ = 25C 2.5 2.0 1.5 TJ = 85C 1.0 TJ = -40C 0.0 0 0 20 40 60 Load Current (mA) 80 1 100 FIGURE 2-55: Ground Current vs. Load Current (VR = 4.2V). 10 100 Load Current (A) 1000 FIGURE 2-58: Ground Current vs. Very Low Load Current (VR = 3.3V). 5.0 5.0 VR = 1.2V VIN = 2.7V 4.0 VR = 4.2V VIN = 5.0V 4.5 Ground Current (A) 4.5 Ground Current (A) 4.0 0.5 20 3.5 3.0 TJ = 25C 2.5 2.0 TJ = 85C 1.5 1.0 0.5 4.0 TJ = 25C 3.5 3.0 TJ = 85C 2.5 2.0 1.5 1.0 0.5 TJ = -40C 0.0 TJ = -40C 0.0 1 10 100 Load Current (A) 1000 FIGURE 2-56: Ground Current vs. Very Low Load Current (VR = 1.2V). Ground Current (A) VR = 3.3V VIN = 4.1V 4.5 Ground Current (A) Ground Current (A) 5.0 VR = 4.2V VIN = 5V 180 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 1 10 100 Load Current (A) 1000 FIGURE 2-59: Ground Current vs. Very Low Load Current (VR = 4.2V). VR = 2.5V VIN = 3.3V TJ = 25C TJ = 85C TJ = -40C 1 10 100 Load Current (A) 1000 FIGURE 2-57: Ground Current vs. Very Low Load Current (VR = 2.5V). DS20005623B-page 16 2016-2018 Microchip Technology Inc. MCP1810 3.0 PIN DESCRIPTION The descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE MCP1810 2 x 2 VDFN MCP1810 3Ld-SOT23 MCP1810 5Ld-SOT23 Symbol 1 3 5 GND 3.1 Description Ground 2 1 3 VOUT 3, 4, 5 - 4 NC Not connected pins (should either be left floated or connected to ground) 6 - - FB Output Voltage Feedback Input 7 2 1 VIN Input Voltage Supply 8 - 2 SHDN 9 - - EP Ground Pin (GND) Regulated Output Voltage Shutdown Control Input (active-low) Exposed Thermal Pad, connected to GND 3.4 Input Voltage Supply Pin (VIN) For optimal noise and power supply rejection ratio (PSRR) performance, the GND pin of the LDO should be tied to an electrically quiet circuit ground. This will help the LDO power supply rejection ratio and noise performance. The GND pin of the LDO conducts only ground current, so a heavy trace is not required. For applications that have switching or noisy inputs, tie the GND pin to the return of the output capacitor. Ground planes help lower the inductance and voltage spikes caused by fast transient load currents. Connect the unregulated or regulated input voltage source to VIN. If the input voltage source is located several inches away from the LDO, or the input source is a battery, it is recommended that an input capacitor be used. A typical input capacitance value of 1 F to 10 F should be sufficient for most applications (2.2 F, typical). The type of capacitor used can be ceramic, tantalum, or aluminum-electrolytic. However, the low ESR characteristics of the ceramic capacitor will yield better noise and PSRR performance at high frequency. 3.2 3.5 Regulated Output Voltage Pin (VOUT) The VOUT pin is the regulated output voltage of the LDO. A minimum output capacitance of 1.0 F is required for LDO stability. The MCP1810 is stable with ceramic, tantalum and aluminum-electrolytic capacitors. See Section 4.2 "Output Capacitor" for output capacitor selection guidance. 3.3 Feedback Pin (FB) The output voltage is connected to the FB input. This sets the output voltage regulation value. 2016-2018 Microchip Technology Inc. Shutdown Control Input (SHDN) The SHDN input is used to turn the LDO output voltage on and off. When the SHDN input is at a logic-high level, the LDO output voltage is enabled. When the SHDN input is pulled to a logic-low level, the LDO output voltage is disabled. When the SHDN input is pulled low, the LDO enters a low-quiescent current shutdown state, where the typical quiescent current is 1 nA. 3.6 Exposed Thermal Pad (EP) The 2 x 2 VDFN 8-Lead package has an exposed thermal pad on the bottom of the package. The exposed thermal pad gives the device better thermal characteristics by providing a good thermal path to either the printed circuit board (PCB) or heat sink, to remove heat from the device. The exposed pad of the package is at ground potential. DS20005623B-page 17 MCP1810 NOTES: DS20005623B-page 18 2016-2018 Microchip Technology Inc. MCP1810 4.0 DEVICE OVERVIEW The MCP1810 is a 150 mA/100 mA output current, low dropout (LDO) voltage regulator. The low dropout voltage of 380 mV maximum at 150 mA of current makes it ideal for battery-powered applications. The input voltage ranges from 2.5V to 5.5V. The MCP1810 adds a shutdown-control input pin and is available in eleven standard fixed-output voltage options: 1.2V, 1.5V, 1.8V, 2.0V, 2.2V, 2.5V, 2.8V, 3.0V, 3.3V, 3.5V and 4.2V. It uses a proprietary voltage reference and sensing scheme to maintain the ultra-low 20 nA quiescent current. 4.1 Output Current and Current Limiting The MCP1810 LDO is tested and ensured to supply a minimum of 150 mA of output current for the 1.2V-to-3.5V output range, and 100 mA of output current for the 3.5V-to-4.2V output range. The device has no minimum output load, so the output load current can go to 0 mA and the LDO will continue regulating the output voltage within the specified tolerance. The MCP1810 also incorporates an output current limit. The current limit is set to 350 mA typical for the 1.2V VR 3.5V range, and to 250 mA typical for the 3.5V VR 5.5V range. 4.2 Output Capacitor The MCP1810 requires a minimum output capacitance of 1 F for output voltage stability. Ceramic capacitors are recommended because of their size, cost and robust environmental qualities. Aluminum-electrolytic and tantalum capacitors can be used on the LDO output as well. The output capacitor should be located as close to the LDO output as is practical. Ceramic materials X7R and X5R have low temperature coefficients and are well within the acceptable ESR range required. A typical 1 F X7R 0805 capacitor has an ESR of 50 m. For extreme output currents -- below 100 A or close to 150 mA/100 mA -- an output capacitor with higher ESR (tantalum, aluminum-electrolytic) is recommended. Ceramic output capacitor may be used if a 0.5 to 1 resistor is placed in series with the capacitor. 4.3 Input Capacitor For applications that have output step load requirements, the input capacitance of the LDO is very important. The input capacitance provides a low-impedance source of current for the LDO to use for dynamic load changes. This allows the LDO to respond quickly to the output load step. For good step-response performance, the input capacitor should be equivalent or higher value than the output capacitor. The capacitor should be placed as close to the input of the LDO as is practical. Larger input capacitors will also help reduce any high-frequency noise on the input and output of the LDO, as well as the effects of any inductance that exists between the input source voltage and the input capacitance of the LDO. 4.4 Shutdown Input (SHDN) The SHDN input is an active-low input signal that turns the LDO on and off. The SHDN threshold is a percentage of the input voltage. The maximum input-low logic level is 30% of VIN and the minimum high logic level is 70% of VIN. On the rising edge of the SHDN input, the shutdown circuitry has a 20 ms (typical) delay before allowing the LDO output to turn on. This delay helps to reject any false turn-on signal or noise on the SHDN input signal. After the 20 ms delay, the LDO output enters its current-limited soft-start period as it rises from 0V to its final regulation value. If the SHDN input signal is pulled low during the 20 ms delay period, the timer will be reset and the delay time will start over again on the next rising edge of the SHDN input. The total time from the SHDN input going high (turn-on) to the LDO output being in regulation is typically 20 ms. Figure 4-1 shows a timing diagram of the SHDN input. TOR 20 ns (typical) 20 ms 10 s SHDN VOUT FIGURE 4-1: Diagram. Shutdown Input Timing Low input-source impedance is necessary for the LDO output to operate properly. When operating from batteries, or in applications with long lead length (> 10 inches) between the input source and the LDO, some input capacitance is recommended. A minimum of 1.0 F to 4.7 F of capacitance is recommended for most applications. 2016-2018 Microchip Technology Inc. DS20005623B-page 19 MCP1810 4.5 Dropout Voltage Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 3% below the nominal value that was measured with a VR + 0.8V differential applied. The MCP1810 LDO has a low-dropout voltage specification of 230 mV (typical) for VR = 2.5V, 120 mV for VR = 3.3V at 150 mA out, and 70 mV (typical) for VR 4.2V at 100 mA out. See Section 1.0 "Electrical Characteristics" for maximum dropout voltage specifications. DS20005623B-page 20 2016-2018 Microchip Technology Inc. MCP1810 5.0 APPLICATION CIRCUITS AND ISSUES 5.1 Typical Application The MCP1810 is used for applications that require ultra-low quiescent current draw. VOUT VIN COUT LOAD + - ESR MCP1810 CIN FB SHDN GND The total power dissipated within the MCP1810 is the sum of the power dissipated in the LDO pass device and the P(IGND) term. Because of the CMOS construction, the typical IGND for the MCP1810 is maximum 290 A at full load. Operating at a maximum VIN of 5.5V results in a power dissipation of 1.6 mW. For most applications, this is small compared to the LDO pass device power dissipation, and can be neglected. The maximum continuous operating junction temperature specified for the MCP1810 is +85C. To estimate the internal junction temperature of the MCP1810, the total internal power dissipation is multiplied by the thermal resistance from junction-to-ambient (RJA) of the device. The thermal resistance from junction to ambient for the 2x2 VDFN 8-Lead package is estimated at 73.1C/W. EQUATION 5-3: FIGURE 5-1: 5.2 Typical Application Circuit. Power Calculations 5.2.1 POWER DISSIPATION The internal power dissipation within the MCP1810 is a function of input voltage, output voltage, output current and quiescent current. Equation 5-1 can be used to calculate the internal power dissipation for the LDO. EQUATION 5-1: P LDO = V IN MAX - V OUT MIN I OUT MAX Where: PLDO = Internal power dissipation of the LDO pass device VIN(MAX) = Maximum input voltage VOUT(MIN) = LDO minimum output voltage T J MAX = P TOTAL R JA + T A MAX Where: TJ(MAX) = Maximum continuous junction temperature PTOTAL = Total power dissipation of the device RJA = Thermal resistance from junction to ambient TA(MAX) = Maximum ambient temperature The maximum power dissipation capability for a package can be calculated given the junction-to-ambient thermal resistance and the maximum ambient temperature for the application. Equation 5-4 can be used to determine the package maximum internal power dissipation. EQUATION 5-4: IOUT(MAX) = Maximum output current In addition to the LDO pass element power dissipation, there is power dissipation within the MCP1810 as a result of quiescent or ground current. The power dissipation as a result of the ground current can be calculated by applying Equation 5-2: EQUATION 5-2: P I GND = V IN MAX I GND Where: T J MAX - T A MAX P D MAX = --------------------------------------------------R JA Where: PD(MAX) = Maximum power dissipation of the device TJ(MAX) = Maximum continuous junction temperature TA(MAX) = Maximum ambient temperature RJA = Thermal resistance from junction to ambient PI(GND) = Power dissipation due to the quiescent current of the LDO VIN(MAX) = Maximum input voltage IGND = Current flowing into the GND pin 2016-2018 Microchip Technology Inc. DS20005623B-page 21 MCP1810 EQUATION 5-5: T J RISE = P D MAX R JA Where: TJ(RISE) = Rise in the device junction temperature over the ambient temperature PD(MAX) = Maximum power dissipation of the device RJA = Thermal resistance from junction to ambient EQUATION 5-6: T J = T J RISE + T A Where: TJ = Junction temperature TJ(RISE) = Rise in the device junction temperature over the ambient temperature TA = Ambient temperature 5.3 Typical Application Examples Internal power dissipation, junction temperature rise, junction temperature and maximum power dissipation are calculated in the following example. The power dissipation as a result of ground current is small enough to be neglected. 5.3.1 5.3.1.1 Device Junction Temperature Rise The internal junction temperature rise is a function of internal power dissipation and of the thermal resistance from junction to ambient for the application. The thermal resistance from junction to ambient (RJA) is derived from EIA/JEDEC standards for measuring thermal resistance. The EIA/JEDEC specification is JESD51. The standard describes the test method and board specifications for measuring the thermal resistance from junction to ambient. The actual thermal resistance for a particular application can vary depending on many factors such as copper area and thickness. Refer to Application Note AN792, "A Method to Determine How Much Power a SOT23 Can Dissipate in an Application" (DS00792), for more information regarding this subject. EXAMPLE 5-2: TJ(RISE) = PTOTAL x RJA TJ(RISE) = 0.154W x 73.1C/W TJ(RISE) = 11.3C 5.3.1.2 Junction Temperature Estimate To estimate the internal junction temperature, the calculated temperature rise is added to the ambient or offset temperature. For this example, the worst-case junction temperature is estimated below: EXAMPLE 5-3: TJ = TJ(RISE) + TA(MAX) TJ = 11.3C + 60.0C POWER DISSIPATION EXAMPLE TJ = 71.3C EXAMPLE 5-1: Package Package Type = 2 x 2 VDFN 8-Lead 5.3.1.3 Maximum Package Power Dissipation at +60C Ambient Temperature Input Voltage VIN = 3.3V 5% LDO Output Voltage and Current VOUT = 2.5V IOUT = 150 mA EXAMPLE 5-4: 2x2 VDFN 8-Lead (73.1C/W RJA): PD(MAX) = (85C - 60C)/73.1C/W PD(MAX) = 0.342W Maximum Ambient Temperature TA(MAX) = +60C Internal Power Dissipation PLDO(MAX) = (VIN(MAX) - VOUT(MIN)) x IOUT(MAX) PLDO = ((3.3V x 1.05) - (2.5V x 0.975)) x 150 mA PLDO = 0.154 Watts DS20005623B-page 22 2016-2018 Microchip Technology Inc. MCP1810 6.0 PACKAGING INFORMATION 6.1 Package Marking Information Example 8-Lead VDFN (2 x 2 mm) Part Number Code MCP1810T-12I/J8A A12 MCP1810T-18I/J8A A18 MCP1810T-25I/J8A A25 MCP1810T-30I/J8A A30 MCP1810T-33I/J8A A33 MCP1810T-42I/J8A A42 A12 256 Example 3-Lead SOT23 XXXNNN 12T256 5-Lead SOT23 Example 12OT7 42256 Legend: XX...X Y YY WW NNN e3 * Note: Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC(R) designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 2016-2018 Microchip Technology Inc. DS20005623B-page 23 MCP1810 8-Lead Very Thin Plastic Dual Flat, No Lead Package (J8A) - 2x2 mm Body [VDFN] With 1.7x0.9 mm Exposed Pad Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2.00 A B N (DATUM A) (DATUM B) 2.00 NOTE 1 2X 0.05 C 1 2X 2 TOP VIEW 0.05 C 0.10 C C A A1 SEATING PLANE 8X (A3) 0.10 0.08 C SIDE VIEW C A B D2 e 2 1 2 0.10 C A B E2 (K) N L 8X b e BOTTOM VIEW 0.10 0.05 C A B C Microchip Technology Drawing C04-1207A Sheet 1 of 2 DS20005623B-page 24 2016-2018 Microchip Technology Inc. MCP1810 8-Lead Very Thin Plastic Dual Flat, No Lead Package (J8A) - 2x2 mm Body [VDFN] With 1.7x0.9 mm Exposed Pad Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units Dimension Limits Number of Terminals N e Pitch A Overall Height Standoff A1 Terminal Thickness A3 Overall Length D Exposed Pad Length D2 Overall Width E Exposed Pad Width E2 b Terminal Width Terminal Length L Terminal-to-Exposed-Pad K MIN 0.80 0.00 1.65 0.85 0.20 0.25 MILLIMETERS NOM 8 0.50 BSC 0.85 0.02 0.20 REF 2.00 BSC 1.70 2.00 BSC 0.90 0.25 0.30 0.25 REF MAX 0.90 0.05 1.75 0.95 0.30 0.35 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package is saw singulated 3. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-1207A Sheet 2 of 2 2016-2018 Microchip Technology Inc. DS20005623B-page 25 MCP1810 8-Lead Very Thin Plastic Dual Flat, No Lead Package (J8A) - 2x2 mm Body [VDFN] With 1.7x0.9 mm Exposed Pad Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Y2 EV 20 OV C X2 G2 CH Y1 1 2 X1 SILK SCREEN G1 E RECOMMENDED LAND PATTERN Units Dimension Limits E Contact Pitch Optional Center Pad Width X2 Optional Center Pad Length Y2 Contact Pad Spacing C Contact Pad Width (X8) X1 Contact Pad Length (X8) Y1 Contact Pad to Pad (X6) G1 Contact Pad to Center Pad (X8) G2 Thermal Via Diameter V Thermal Via Pitch EV MIN MILLIMETERS NOM 0.50 BSC MAX 0.95 1.95 2.10 0.30 0.70 0.20 0.23 0.30 1.00 Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. 2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during reflow process Microchip Technology Drawing C04-3207A DS20005623B-page 26 2016-2018 Microchip Technology Inc. MCP1810 )RUWKHPRVWFXUUHQWSDFNDJHGUDZLQJVSOHDVHVHHWKH0LFURFKLS3DFNDJLQJ6SHFLILFDWLRQORFDWHGDW KWWSZZZPLFURFKLSFRPSDFNDJLQJ b N E E1 2 1 e e1 D c A A2 A1 L 8QLWV 'LPHQVLRQ/LPLWV 1XPEHURI3LQV 0,//,0(7(56 0,1 120 0$; 1 /HDG3LWFK H %6& 2XWVLGH/HDG3LWFK H 2YHUDOO+HLJKW $ 0ROGHG3DFNDJH7KLFNQHVV $ 6WDQGRII $ %6& 2YHUDOO:LGWK ( 0ROGHG3DFNDJH:LGWK ( 2YHUDOO/HQJWK ' )RRW/HQJWK / )RRW$QJOH /HDG7KLFNQHVV F /HDG:LGWK E 'LPHQVLRQV'DQG(GRQRWLQFOXGHPROGIODVKRUSURWUXVLRQV0ROGIODVKRUSURWUXVLRQVVKDOOQRWH[FHHGPPSHUVLGH 'LPHQVLRQLQJDQGWROHUDQFLQJSHU$60(<0 %6& %DVLF'LPHQVLRQ7KHRUHWLFDOO\H[DFWYDOXHVKRZQZLWKRXWWROHUDQFHV 0LFURFKLS 7HFKQRORJ\ 'UDZLQJ &% 2016-2018 Microchip Technology Inc. DS20005623B-page 27 MCP1810 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20005623B-page 28 2016-2018 Microchip Technology Inc. MCP1810 5-Lead Plastic Small Outline Transistor (OT) [SOT23] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 0.20 C 2X D e1 A D N E/2 E1/2 E1 E (DATUM D) (DATUM A-B) 0.15 C D 2X NOTE 1 1 2 e B NX b 0.20 C A-B D TOP VIEW A A A2 0.20 C SEATING PLANE A SEE SHEET 2 C A1 SIDE VIEW Microchip Technology Drawing C04-028D [OT] Sheet 1 of 2016-2018 Microchip Technology Inc. DS20005623B-page 29 MCP1810 5-Lead Plastic Small Outline Transistor (OT) [SOT23] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging c T L L1 VIEW A-A SHEET 1 Units Dimension Limits Number of Pins N e Pitch e1 Outside lead pitch Overall Height A Molded Package Thickness A2 Standoff A1 E Overall Width E1 Molded Package Width D Overall Length L Foot Length Footprint L1 I Foot Angle c Lead Thickness b Lead Width MIN 0.90 0.89 - 0.30 0 0.08 0.20 MILLIMETERS NOM 6 0.95 BSC 1.90 BSC 2.80 BSC 1.60 BSC 2.90 BSC 0.60 REF - MAX 1.45 1.30 0.15 0.60 10 0.26 0.51 Notes: 1. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.25mm per side. 2. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-091D [OT] Sheet 2 of DS20005623B-page 30 2016-2018 Microchip Technology Inc. MCP1810 5-Lead Plastic Small Outline Transistor (OT) [SOT23] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging X SILK SCREEN 5 Y Z C G 1 2 E GX RECOMMENDED LAND PATTERN Units Dimension Limits E Contact Pitch C Contact Pad Spacing X Contact Pad Width (X5) Contact Pad Length (X5) Y Distance Between Pads G Distance Between Pads GX Overall Width Z MIN MILLIMETERS NOM 0.95 BSC 2.80 MAX 0.60 1.10 1.70 0.35 3.90 Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing No. C04-2091A [OT] 2016-2018 Microchip Technology Inc. DS20005623B-page 31 MCP1810 NOTES: DS20005623B-page 32 2016-2018 Microchip Technology Inc. MCP1810 APPENDIX A: REVISION HISTORY Revision B (January 2018) The following is the list of modifications: 1. 2. 3. 4. 5. 6. 7. Added more Standard Output Voltages in the Features, Description, AC/DC Characteristics, Device Overview sections. Updated the Package Types section by adding the 3 Lead-SOT23 and 5 Lead-SOT23 packages. Added two new parameters in the Temperature Specifications section, under Thermal Package Resistances. Included the 3Ld-SOT23 and 5Ld-SOT23 packages in the Table 3-1. Updated the Packaging Information section with two new packages: 3-Lead SOT23 and 5-Lead SOT23. Updated the Product Identification System. Minor typographical edits. Revision A (September 2016) * Original Release of this Document. 2016-2018 Microchip Technology Inc. DS20005623B-page 33 MCP1810 NOTES: DS20005623B-page 34 2016-2018 Microchip Technology Inc. MCP1810 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. -XX Device Output Voltage Device: Standard Output Voltages*: XXX X/ Examples: a) MCP1810T-12I/J8A: Temp. Package MCP1810T: Ultra-Low Quiescent Current LDO Regulator, Tape and Reel 12 15 18 20 22 25 28 30 33 35 42 = = = = = = = = = = = 1.2V 1.5V 1.8V 2.0V 2.2V 2.5V 2.8V 3.0V 3.3V 3.5V 4.2V *Contact factory for other output voltage options Temperature: I Package Type: J8A = 8-Lead Very Thin Plastic Dual Flat, No Lead Package, VDFN, 8-Lead, with 1.7 x 0.9 mm Exposed Pad TT b) MCP1810T-18I/J8A: c) MCP1810T-42I/J8A: d) MCP1810T-15I/TT: e) MCP1810T-20I/TT: f) MCP1810T-25I/TT: g) MCP1810T-33I/TT: h) MCP1810T-22I/OT: i) MCP1810T-28I/OT: j) MCP1810T-30I/OT: k) MCP1810T-35I/OT: = -40C to +85C (Industrial) = 3-Lead Plastic Small Outline Transistor, SOT-23 OT = 5-Lead Plastic Small Outline Transistor, SOT-23 2016-2018 Microchip Technology Inc. Tape and reel, 1.2V output voltage, Industrial temperature 8-LD VDFN package Tape and reel, 1.8V output voltage, Industrial temperature, 8-LD VDFN package Tape and reel, 4.2V output voltage, Industrial temperature, 8-LD VDFN package Tape and reel, 1.5V output voltage, Industrial temperature, 3-LD SOT-23 package Tape and reel, 2.0V output voltage, Industrial temperature, 3-LD SOT-23 package Tape and reel, 2.5V output voltage, Industrial temperature, 3-LD SOT-23 package Tape and reel, 3.3V output voltage, Industrial temperature, 3-LD SOT-23 package Tape and reel, 2.2V output voltage, Industrial temperature, 5-LD SOT-23 package Tape and reel, 2.8V output voltage, Industrial temperature, 5-LD SOT-23 package Tape and reel, 3.0V output voltage, Industrial temperature, 5-LD SOT-23 package Tape and reel, 3.5V output voltage, Industrial temperature, 5-LD SOT-23 package DS20005623B-page 35 MCP1810 NOTES: DS20005623B-page 36 2016-2018 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * Microchip products meet the specification contained in their particular Microchip Data Sheet. * Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. * There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. * Microchip is willing to work with the customer who is concerned about the integrity of their code. * Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, AnyRate, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, KeeLoq logo, Kleer, LANCheck, LINK MD, MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, ETHERSYNCH, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker, Serial Quad I/O, SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified. QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 == 2016-2018 Microchip Technology Inc. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. (c) 2016-2018, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. 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