6522AS–SMIC–05 Sep 05
Features
General
High-performance, Low-power secureAVRTM Enhanced RISC Arch itecture
135 Powerful Instructions (Most Executed in a Single Clock Cycle)
Low Power Idle and Power - down Modes
Bond Pad Locations Conforming to ISO 7816-2
ESD Protection to ± 6000V
Operating Range: 1.62V to 5.5V
Compliant with GSM, 3GPP and EMV 2000 Specifications; PC Industry Compatible
Available in Wafers, Modules and Industry-standard Pack ages
Memory
256K Bytes of ROM User Program Memory
32K Bytes of ROM Dedicated to Atmel’s Crypto-library
72K Bytes of EEPROM, Incl uding 128 OTP Bytes and 384-b yte Bit-addressable Area
1 to 128-byte Program/Erase
1.25 ms Program / 1.25 ms Erase
Typically More than 500,000 Write/Erase Cycles at a Temperature of 25°C
10 Years Data Retention
EEPROM Erase Only Mode
Write EEPROM With or Without Autoerase
8K Bytes of RAM
Peripherals
ISO 7816 Controller
Up to 625 kbps at 5 MHz
Compliant wi th T = 0 and T = 1 Protocols
One I/O Port
Optional USB 2.0 Full Speed interface with 5 endpoints and DMA controller
Programmable Internal Oscillator (Up to 40 MHz for CPU and Crypto Accelerator)
Two 16-bit Timers
Random Number Generator (RNG)
2-level, 9-vector Interrupt Controller
Hard ware DES and Triple DES DPA/DEMA Resistant
Checksum Accelerator
CRC 16 & 32 Engine (Compliant with ISO/IEC 3309)
32-bit AdvX™ Cryptographic Accelerator for Public Key Op eratio ns with GF(2n)
Multiplier and Firmware (RSA, ECC, Key Generation)
Security
Dedicated Hardware for Protection Against SPA/DPA/SEMA/DEMA Attacks
Advanced Protection Against Physical Attack, Including Active Shield
Environmental Protection Systems
Voltage Monitor
Frequency Monitor
Light Protection
Temperature Monitor
Secure Memory Management/Access Protection (Supervisor Mode)
Development Tools
Voyager Emulation Platf o rm (ATV4 Advanced) to Support Software Development
IAR Systems EWAVR® V3.10 Debugger or Atmel’s AVR Studio® Version 4.07 or Above
Software Libraries and Application Notes
Secure
Microcontroller
for Smart Cards
AT90SC
25672RCT
(-USB)
Preliminary
Summary
Note: This is a summary document. A complete document will be
available under NDA. For more information, please contact your
local Atmel sales office.
2AT90SC25672RCT (-USB) 6522AS–SMIC–05 Sep 05
Description
The AT90SC25672RCT(-USB) is a low-power, high-perfor mance, 8/16-bit microcontroller with ROM program memory,
EEPROM data memory, cr yptographic accelerator based on the secureAVR enhanced RISC architecture. By executing
powerful instructions in a single clock cycle, the AT90SC25672RCT(-USB) achieves throughputs close to 1 MIPS per MHz.
Its Harvard archite cture includ es 32 ge ner alpurpose working registers directly co nnect ed to th e ALU, allowing t wo indepen-
dent registers to be accessed in one single instruction executed in one clock cycle.
The AT90SC25672RCT(-USB) uses a new AVR® architecture, the secureAVR that allows the linear addressing of up to 8M
bytes of code and up to 16M b ytes of data as well as a number of new functional and security features.
The cryptog raphic acce lerato r featured in this product is the AdvX, a 32 -bit acceler ator de dicated to pe rf orming f ast encryp-
tion and authentication functions. It is combined with a 32K byte-ROM for a high-performance and secure crypto firmware.
The ability to map the EEPROM in the code space allows parts of the program memor y to be reprogrammed in-system.
This technology combined with the versatile 8/16-bit CPU on a monolithic chip provides a highly flexible and cost-effective
solution to many smart card applications.
Additional security features include power and frequency protection logic, logical scrambling on program data and
addresses, Power Analysis countermeasures and memor y accesses controlled by a supervisor mode. A block diagram of
the AT90SC25672RCT(-USB) is shown in Figure 1 hereafter.
Optional USB Controller Description
The AT90SC25672RCT(-USB) optionally features an USB V2.0 Full Speed co ntroller which requires a 48 MHz exter nal
cr ystal for the data transfer. The USB interface consists of a Serial Interface Engine (SIE) and a Universal Function Inter-
face (UFI). The SIE perfor ms clock/data separation, NRZI encoding and decoding, bit stuffing, CRC generation and
checking and serial-parallel data conversion.
The UFI connects the USB interface to the AVR. It consists of a pr otocol engine a nd pro vides five configurab le data transfer
endpoints, each with it’s own DPRAM in the memor y area. The data transfer type for each endpoint is configured by soft-
ware. The table below indicates the characteristics of each endpoin t:
A DMA controller allows a fast communication rate between the RAM of the CPU and the DPRAM.
The USB controller provides a dynam ic pull- up att achme nt an d d etachme nt an d a host dete ctio n me chan ism . In add ition, it
offers an automatic interface detection between the USB 2.0 and the ISO7816 port.
Table 1: Characteristics of each endpoint.
Endpoint
number Size (bytes) Available data transfer modes
EP0 64 BULK, ISOCHRONOUS, INTERRUPT, CONTROL
EP1 2 * 64 BULK, ISOCHRONOUS, INTERRUPT
EP2 2 * 64 BULK, ISOCHRONOUS, INTERRUPT
EP3 64 BULK, ISOCHRONOUS, INTERRUPT, CONTROL
EP4 64 BULK, ISOCHRONOUS, INTERRUPT, CONTROL
3
AT90SC25672RCT (-USB)
6522AS–SMIC–05 Sep 05
Figure 1. AT90SC25672RCT(-USB) secureAVR Enhanced RISC Architecture.
EEPROM
User Memory
Program
Memory
PC
16
Instruction
Register
Instruction
Decoder
16
Control
Lines
16
Access
Control
General
Purpose
Registers
X
ALU
8
Y
Z
Data Bus
8-bit
88
Status
Register
Access
Control
RNG
CRC and
Checksum
Accelerator
DES/Triple DES
Timers
RST
Reset
Circuit
ISO 7816
I/O Port 0
ISO 7816
Controller
IN/OUT0
Interrupt
Unit
RAM
Data Memory
OTP
Crypto
ROM
ROM
On-Chip
Security
(Optional USB
controller)
(USB D+)
(USB D-)
Advx
Crypto
Accel.
Secure
Control VCC / Vbus
CLK
GND
(USB-Xin)
(USB-Xout)
Printed on recycled paper.
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6522AS–SMIC–05 Sep 05
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