2AT90SC25672RCT (-USB) 6522AS–SMIC–05 Sep 05
Description
The AT90SC25672RCT(-USB) is a low-power, high-perfor mance, 8/16-bit microcontroller with ROM program memory,
EEPROM data memory, cr yptographic accelerator based on the secureAVR enhanced RISC architecture. By executing
powerful instructions in a single clock cycle, the AT90SC25672RCT(-USB) achieves throughputs close to 1 MIPS per MHz.
Its Harvard archite cture includ es 32 ge ner alpurpose working registers directly co nnect ed to th e ALU, allowing t wo indepen-
dent registers to be accessed in one single instruction executed in one clock cycle.
The AT90SC25672RCT(-USB) uses a new AVR® architecture, the secureAVR that allows the linear addressing of up to 8M
bytes of code and up to 16M b ytes of data as well as a number of new functional and security features.
The cryptog raphic acce lerato r featured in this product is the AdvX, a 32 -bit acceler ator de dicated to pe rf orming f ast encryp-
tion and authentication functions. It is combined with a 32K byte-ROM for a high-performance and secure crypto firmware.
The ability to map the EEPROM in the code space allows parts of the program memor y to be reprogrammed in-system.
This technology combined with the versatile 8/16-bit CPU on a monolithic chip provides a highly flexible and cost-effective
solution to many smart card applications.
Additional security features include power and frequency protection logic, logical scrambling on program data and
addresses, Power Analysis countermeasures and memor y accesses controlled by a supervisor mode. A block diagram of
the AT90SC25672RCT(-USB) is shown in Figure 1 hereafter.
Optional USB Controller Description
The AT90SC25672RCT(-USB) optionally features an USB V2.0 Full Speed co ntroller which requires a 48 MHz exter nal
cr ystal for the data transfer. The USB interface consists of a Serial Interface Engine (SIE) and a Universal Function Inter-
face (UFI). The SIE perfor ms clock/data separation, NRZI encoding and decoding, bit stuffing, CRC generation and
checking and serial-parallel data conversion.
The UFI connects the USB interface to the AVR. It consists of a pr otocol engine a nd pro vides five configurab le data transfer
endpoints, each with it’s own DPRAM in the memor y area. The data transfer type for each endpoint is configured by soft-
ware. The table below indicates the characteristics of each endpoin t:
A DMA controller allows a fast communication rate between the RAM of the CPU and the DPRAM.
The USB controller provides a dynam ic pull- up att achme nt an d d etachme nt an d a host dete ctio n me chan ism . In add ition, it
offers an automatic interface detection between the USB 2.0 and the ISO7816 port.
Table 1: Characteristics of each endpoint.
Endpoint
number Size (bytes) Available data transfer modes
EP0 64 BULK, ISOCHRONOUS, INTERRUPT, CONTROL
EP1 2 * 64 BULK, ISOCHRONOUS, INTERRUPT
EP2 2 * 64 BULK, ISOCHRONOUS, INTERRUPT
EP3 64 BULK, ISOCHRONOUS, INTERRUPT, CONTROL
EP4 64 BULK, ISOCHRONOUS, INTERRUPT, CONTROL