FQV04L35JI - AMIC Technology, Corp.

FQV01 · FQV02 · FQV03 · FQV04 · FQV05

MAY 200

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3.3 Volt Asynchronous x9 First-In/First-Out Queue

Memory Configuration Device

8,192 x 9 FQV05

4,096 x 9 FQV04

2,048 x 9 FQV03

1,024 x 9 FQV02

512 x 9 FQV01

Key Features:

• Industry leading First-In/First-Out Queues (up to 50MHz)

• Independent Write and Read cycle time

• Asynchronous and simultaneous read and write

• 3.3V power supply

• Fully expandable in both word depth and width

• Retransmit capability

• Full, Empty, and Half Full flag indicators

• Available packages: 32-pin Plastic Lead Chip Carrier (PLCC)

• (0°C to 70°C) Commercial operating temperature available for access time of 15ns and above

• (-40°C to 85°C) Industrial operating temperature available for access time of 15ns and above

• Pin-to-pin compatible with IDT (72V01, 72V02, 72V03, 72V04, 72V05)

Product Description:

HBA’s FlexQ™ Async FIFO offers industry leading 0.25um process technology and memory densities from 512 x 9 to 8,192 x

9. System designer has full flexibility of implementing deeper and wider queues using the depth and width expansion features.

Full and Empty indicators allow easy handshaking between transmitters and receivers.

Independent Write and Read controls provide rate-matching capability. System designer can re-read data from the starting

position by using Retransmit (RET

________

). Retransmit allows reset of the read pointer to its initial position. Half Full flag (HALF

__________

) is

available in the single device mode and width expansion mode, but not in depth expansion mode.

These FlexQ™ Async devices have low power consumption, hence minimizing system power requirements. In addition,

industry standard 32 - pin PLCC are offered to save system board space.

These queues are ideal for applications such as data communication, telecommunication, graphics, multiprocessing, test

equipment, medical systems, network switching, etc.

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FQV01

FQV02

FQV03

FQV04

FQV05

EXPANSION OUT / HALF ( )

WRITE ( ) READ ( )

DATA IN (D8 - 0)

FULL ( )

FULL

DATA OUT (Q 8 - 0)

EMPTY ( )

EMPTY

RETRANSMIT ( )

RET

RESET ( )

RST

FIRST

FIRST LOAD ( )

EXPANSION IN ( )

XI

HALF

XO/

W

R

Figure 1. Device Configuration Signal Flow Diagram

Write Control

Logic

Write Pointer

SRAM

Input Register Output Register Output

Buffer

D8-0

Read Pointer

Read Control

Logic

Expansion

Logic

Flag

Logic

HALF

XO

XI

R

W

EMPTY

FULL

Q8-0

FIRST

RET

Block Diagram of Single Aynchronous Queue

8,192 x 9 / 4,096 x 9 / 2,048 x 9 / 1,024 x 9 / 512 x 9

Reset Logic

RST

Figure 2. Device Architecture

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NC

D7

Q7

Index

FULL

Q0

Q1

Q2

Q3

D2

D1

NC

D3

D8

NC

Vcc

D4

D5

Q6

1323130234

17 18 19 20161514

13

12

11

10

9

8

7

6

5

21

22

23

24

25

26

27

28

29

XI

RST

PLCC - 32 (Drw No: J-01A; Order code: J)

Top View

D0

Q8

GND

NC

Q4

Q5

/XO HALF

EMPTY

/FIRST RET

D6

R

W

Figure 3. Device Pin-Out

FQV01 · FQV02 · FQV03 · FQV04 · FQV05

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Pin # Symbol Name Input/

Output Description

25 RST Reset Input

Reset is required to initialize Write and Read pointers to the

first position of the queue by setting RST low. FULL will go

high; EMPTY will go low.

2 W

____

Write Input

Writes data into queue during low to high transitions of W

____

if

queue is not full yet.

3, 4, 5, 6,

7, 28, 29,

30, 31

D8 - 0 Data Inputs Input 9 - bit wide input data bus.

18 R

___

Read Input

Reads data from queue during high to low transitions of R

___

if

queue is not empty.

10, 11, 13,

14, 15, 19,

20, 21, 22

Q8 - 0 Data Output Output 9 - bit wide output data bus.

26 FIRST

___________

/

RET

________

First Load/

Retransmit Input

FIRST

___________

/ RET

________

is used differently depending on mode. In

Depth Expansion Mode, the pin is grounded to indicate first

load. In Single Device Mode, the pin acts as retransmit.

8 XI

____

Expansion In Input

XI

____

is used to indicate operations in different modes. When the

pin is grounded, it indicates an operation in the Single Device

Mode. When it is tied to Vcc, it indicates an operation in

Depth Expansion Mode.

9 FULL Full Flag Output

Queue is full when FULL goes low. This prohibits further

writes into the queue. The assertion of FULL is synchronous

to the falling edge of W

____

and the deassertion is synchronous to

the rising edge of R

___

.

24 EMPTY Empty Flag Output

Queue is empty when EMPTY goes low. This prohibits

further reads from the queue. The assertion of EMPTY is

synchronous to the falling edge of R

___

and the deassertion is

synchronous to the rising edge of W

____

.

23 XO

______

/

HALF

__________

Expansion Out /

Half Full Flag Output

XO

______

/ HALF

__________

is used differently depending on mode. In Depth

Expansion Mode, XI

____

is connected to the previous device’s XO

______

pin. When the previous device has reached the last location of

memory, this pin will send pulses to the next device in the

Daisy Chain. In Single Device Mode, when XI

____

is grounded,

this pin indicates queue is half-full.

32 Vcc Power N/A 3.3V power supply.

16 GND Ground N/A 0V Ground.

1, 12, 17,

27 NC No Connection N/A No connection.

Table 1. Pin Descriptions

FQV01 · FQV02 · FQV03 · FQV04 · FQV05

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Symbol Rating Com’l & Ind’l Unit

VTERM Terminal Voltage with

respect to GND -0.5 to + 7 V

TSTG Storage Temperature -55 to +125 °C

IOUT DC Output Current -50 to +50 mA

NOTES:

Absolute Max Ratings are for reference only. Permanent damage to the device may

occur if extended period of operation is outside this range. Standard operation should

fall within the Recommended Operating Conditions.

Table 2. Absolute Maximum Ratings

FQV05, FQV04, FQV03, FQV02, FQV01

Commercial tA = 15ns, 25ns,

35ns, 50ns

Industrial tA = 15ns, 25ns,

35ns, 50ns

Symbol Parameter Min. Typ. Max. Min. Typ. Max. Unit

Recommended Operating Conditions

VCC Supply Voltage Com’l/Ind’l 3.0 3.3 3.6 3.0 3.3 3.6 V

GND Supply Voltage 0 0 0 0 0 0 V

VIH Input High Voltage

Com’l/Ind’l 2.0 - - 2.0 - - V

VIL Input Low Voltage

Com’l/Ind’l - - 0.8 - - 0.8 V

TA Operating Temperature

Commercial 0 - 70 0 - 70

°C

TA Operating Temperature

Industrial -40 - 85 -40 - 85 °C

DC Electrical Characteristics

ILI(1) Input Leakage Current (any

input) -10 - 10 -10 - 10 µA

ILO Output Leakage Current -10 - 10 -10 - 10 µA

VOH Output Logic “1” Voltage,

IOH=-2mA 2.4 - - 2.4 - - V

VOL Output Logic “0” Voltage,

IOL = 8mA - - 0.4 - - 0.4 V

Power Consumption

ICC1(2,3,4) Active Power Supply

Current - - 50 - - 50 mA

ICC2(2,5) Standby Current - - 5 - - 5 mA

Capacitance at 1.0MHz Ambient Temperature (25°C)

Symbol Parameter Conditions Max. Unit

CIN(6) Input Capacitance VIN= 0V 8 pF

COUT(6) Output Capacitance VOUT= 0V 8 pF

NOTES:

1. Measurement with 0.4<=VIN<=Vcc

2. Tested with outputs open (IOUT=0)

3. Tested at f=20MHz

4. Typical Icc1=15+2*fs+0.02*CL*fc (in mA) with Vcc=3.3V, tA=25°C, fs=WCLK frequency=RCLK frequency (in MHz, using TTL levels), data

switching at fs/2, CL=Capacitive load (in PF)

5. All inputs = Vcc-0.2V or GND+0.2V and (R

___

=W

____

=RST

_______

=FIRST

___________

/RET

________

=VIH)

6. Design simulated, not tested.

Table 3. DC Specifications

FQV01 · FQV02 · FQV03 · FQV04 · FQV05

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Commercial & Industrial

FQV04-15

FQV03-15

FQV02-15

FQV01-15

FQV05-15

FQV05-25

FQV04-25

FQV03-25

FQV02-25

FQV01-25

FQV05-35

FQV04-35

FQV03-35

FQV02-35

FQV01-35

FQV05-50

FQV04-50

FQV03-50

FQV02-50

FQV01-50

S

y

mbol Parameter Min. Max Min. Max Min. Max Min. Max Unit

fS Shift Fre

q

uenc

y

- 40 - 28.5 - 22.2 - 15 MHz

tRC Read C

y

cle Time 25 - 35 - 45 - 65 - ns

tA Access Time - 15 - 25 - 35 - 50 ns

tRR Read Recover

y

Time 10 - 10 - 10 - 15 - ns

tRPW Read Pulse Width 15 - 25 - 35 - 50 - ns

tRLZ Read Pulse Low to Data Bus at Low Z (1) 3-3-3- 3 -ns

tWLZ Write Pulse Hi

g

h to Da

t

a Bus at Low Z (1,2) 5-5-5- 5 -ns

tDV Data Valid from Read Pulse Hi

g

h 5-5-5- 5 -ns

tRHZ Read Pulse Hi

g

h to Data Bus at Hi

g

h Z (1) - 15 - 18 - 20 - 30 ns

tWC Write C

y

cle Time 25 - 35 - 45 - 65 - ns

tWPW Write Pulse Width 15 - 25 - 35 - 50 - ns

tWR Write Recover

y

Time 10 - 10 - 10 - 15 - ns

tDS Data Se

t

-u

p

Time 11 - 15 - 18 - 30 - ns

tDH Data Hold Time 0 - 0 - 0 - 5 - ns

tRSTC Reset C

y

cle Time 25 - 35 - 45 - 65 - ns

tRST Reset Pulse Width 15 - 25 - 35 - 50 - ns

tRSTS Reset Se

t

-u

p

Time (1) 15 - 25 - 35 - 50 - ns

tRSTR Reset Recover

y

Time 10 - 10 - 10 - 15 - ns

tRETC Retransmit C

y

cle Time 25 - 35 - 45 - 65 - ns

tRET Retransmit Pulse Width 15 - 25 - 35 - 50 - ns

tRETS Retransmit Se

t

-u

p

Time (1) 15 - 25 - 35 - 50 - ns

tRETR Retransmit Recover

y

Time 10 - 10 - 10 - 15 - ns

tEFL Reset to Em

p

t

y

Fla

g

Low - 25 - 35 - 45 - 65 ns

tHFH

,

tFFH Reset to Half-Full and Full Fla

g

Hi

g

h - 25 - 35 - 45 - 65 ns

tRETF Retransmit Low to Fla

g

s Valid - 25 - 35 - 45 - 65 ns

tREMPTY Read Low to Em

p

t

y

Fla

g

Low - 15 - 25 - 30 - 45 ns

tRFULL Read Hi

g

h to Full Fla

g

Hi

g

h - 15 - 25 - 30 - 45 ns

tRPE Read Pulse Width after Em

p

t

y

Fla

g

Hi

g

h 15 - 25 - 35 - 50 - ns

tWEMPTY Write Hi

g

h to Em

p

t

y

Fla

g

Hi

g

h - 15 - 25 - 30 - 45 ns

tWFULL Write Low to Full Fla

g

Low - 15 - 25 - 30 - 45 ns

tWHALF Write Low to Half-Full Fla

g

Low - 25 - 35 - 45 - 65 ns

tRHALF Read Hi

g

h to Half-Full Fla

g

Hi

g

h - 25 - 35 - 45 - 65 ns

tWPF Write Pulse Width after Full Fla

g

Hi

g

h 15 - 25 - 35 - 50 - ns

tXOL Read/Write to XO

_____ Low - 15 - 25 - 35 - 50 ns

tXOH Read/Write to XO

_____ Hi

g

h - 15 - 25 - 35 - 50 ns

tXI XI

_____ Pulse Width 15 - 25 - 35 - 50 - ns

tXIR XI

_____ Recover

y

Time 10 - 10 - 10 - 10 - ns

tXIS XI

_____ Se

t

-u

p

Time 10 - 10 - 10 - 15 - ns

NOTES:

1. Design simulated, not tested.

2. Only applies to read data flow-through mode.

Table 4. AC Electrical Characteristics

NOTES:

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Input Pulse Levels GND to 3.0V

Input Rise/Fall Times 5ns

Input Timing Reference Levels 1.5V

Output Reference Levels 1.5V

Output Load Refer to Figure 4

Table 5. AC Test Condition

D.U.T.

680

30pF*

1.1k

3.3V

Ω

*Includes jig and scope capacitances.

Figure 4. Output Load

FQV01 · FQV02 · FQV03 · FQV04 · FQV05

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Timing Diagrams

tRST

tRSTS tRSTR

tRSTS

tEFL

tHFH, tFFH

RST

W

tRSTC

R

EMPTY

HALF, FULL

NOTES:

1. EMPTY

______________

, FULL

__________

, and HALF

___________

may change status during Reset, but are valid at tRSTC.

2. W

____

and R

___

= VIH near rising edge of RST

_______

.

Diagram 1. Reset Timing

Data Out Valid Data Out Valid

Data In Valid Data In Valid

R

tRC tRPW

tAtRR tA

tRLZ

tDV tRHZ

tWC

tWPW tWR

tDS tDH

Q8 - Q0

D8 - D0

W

Diagram 2. Asynchronous Write and Read Operation

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Last Write Ignored Write First Read Additional

Reads

First Write

W

R

FULL

tWFULL

tRFULL

Diagram 3. Full Flag From Last Write to First Read

Last Read Ignored Read First Write Additional

Writes

First Read

Valid Valid

W

R

EMPTY

tREMPTY

Q8-0

tWEMPTY

tA

Diagram 4. Empty Flag From Last Read to First Write

tRET

tRETS tRETR

tRETF

,HALF

tRETC

Flag Valid

RET

RW,

,EMPTY FULL

Diagram 5. Retransmit

tWEMPTY

W

tRPE

EMPTY

R

Diagram 6. Minimum Timing for an Empty Flag Coincident Read Pulse

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tRFULL

W

FULL

R

tWPF

Diagram 7. Minimum Timing for a Full Flag Coincident Write Pulse

Half-Full or Less More Than Half-Full Half-Full or Less

W

HALF

R

tWHF

tRHF

Diagram 8. Half-Full Flag Timing

Write to Last

Physical Location

Read from Last

Physical Location

W

XO

R

tXOL tXOH

Diagram 9. Expansion Out

Write to First

Physical Location

Read from First

Physical Location

W

XI

R

tXI tXIR

tXIS

Diagram 10. Expansion In

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Operating Modes

Single Device Mode: When application requirements are for 256/512/1,024/2,048/4,096/8,192 words or less, a single device

may be used. These devices are in Single Device Mode when Expansion In (XI

____

) is grounded.

FQV01

FQV02

FQV03

FQV04

FQV05

EXPANSION OUT / HALF ( )

WRITE ( ) READ ( )

DATA IN (D8 - 0)

FULL ( )FULL

DATA OUT (Q 8 - 0)

EMPTY ( )

EMPTY

RETRANSMIT ( )

RET

RESET ( )

RST

EXPANSION IN ( )

XI

HALF

XO/

W

R

Figure 5. Single Device Mode

Depth Expansion Mode: When application requirements are greater than 256/512/1,024/2,048/4,096/8,192 words, multiple

devices may be used for Depth Expansion. These devices are in Depth Expansion Mode when the following conditions are met:

1. The first device’s First Load (FIRST

___________

) pin must be grounded.

2. All other devices’ First Load (FIRST

___________

) pin must be tied to HIGH

3. All devices’ Expansion Out (XO

______

) pin must be tied to the next devices’ Expansion In (XI

____

) pin.

4. Retransmit (RET

_______

) and Half-Full Flag (HALF

__________

) are non-functional in Depth Expansion Mode.

5. An external logic is required to generate a composite Full Flag (FULL

__________

) and Empty Flag (EMPTY

_____________

). This requires the

ORing of all Empty and Full Flags.

DATA IN

(D8 - 0)

DATA OUT

(Q 8 - 0)

EMPTY

FIRST

XI

XO

R

W

RST

FULL

FQV01 FQV02

FQV03 FQV04

FQV05

FQV01 FQV02

FQV03 FQV04

FQV05

XI

XO

FIRST

FULL

EMPTY

99

Vcc

FQV01 FQV02

FQV03 FQV04

FQV05

9

Figure 6. Depth Expansion Mode

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Usage Modes

Width Expansion Mode: When applications require increased word width, multiple devices may be used for Width Expansion

Mode. These devices are in Width Expansion Mode when the same signals from multiple devices are connected. Any word

width may be achieved by connecting additional devices. Status flags are functional for any one device.

FQV01

FQV02

FQV03

FQV04

FQV05

FQV01

FQV02

FQV03

FQV04

FQV05

DATA IN (D17 - 0)

DATA OUT (Q17 - 0)

EMPTY

RET

R

W

RST

FULL

XIXI

18 99

99

18

HALF HALF

Figure 7. Width Expansion Mode

Bidirectional Mode: When applications require data buffering between two systems that are capable of Read and Write

operations, a pair of devices may be used for Bidirectional Mode. Both Depth Expansion and Width Expansion may be used in

this mode.

D 8 - 0

EMPTY

R

W

FULL HALF

FQV01 FQV02

FQV03 FQV04

FQV05

FQV01 FQV02

FQV03 FQV04

FQV05

EMPTY

R

HALF

W

FULL

Q 8 - 0

System X System Y

X

Y

D 8 - 0

Q 8 - 0

Y

X

Figure 8. Bidirectional Mode

Data Flow-Through Mode: There are two types of flow-through modes, read flow-through and write flow-through. In the read

flow-through mode, the device allows a single word to be read after one word of data has been written into an empty FIFO. The

data is enabled on the bus after the rising edge of W

____

, and remains on the bus until R

___

goes from Low to High. Then the bus goes

into a three-state mode. EMPTY

_____________

will have a pulse showing temporary deassertion and then would be asserted. In the write flow-

through mode, the device allows a single word to be written after one word of data has been read from a full FIFO. R

___

causes

FULL

__________

to be deasserted but a Low W

____

causes it to be asserted again for the new data word. The new word goes into the FIFO on

the rising edge of W

____

. W

____

must be toggled when FULL

__________

is not asserted to write new data into the FIFO and to increment the write

pointer.

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Data Out Valid

W

EMPTY

R

tWEMPTY

tWLZ

Data In

Data Out

tRPE

tREMPTY

tA

Diagram 11. Read Data Flow-Through Mode

Data Out Valid

Data In Valid

W

FULL

R

tA

Data In

Data Out

tRFULL

tWPF

tWFULL tDH

tDS

Diagram 12. Write Data Flow-Through Mode

Compound Expansion Mode: Compound Expansion Mode is a combination of Depth and Width Expansion Modes to achieve

large FIFO arrays.

DATA IN (Dn - 0)

DATA OUT (Q n - 0)

RWRST

FQV01 FQV02

FQV03 FQV04

FQV05

Depth Expansion

Block

FQV01 FQV02

FQV03 FQV04

FQV05

Depth Expansion

Block

FQV01 FQV02

FQV03 FQV04

FQV05

Depth Expansion

Block

Figure 9. Compound Expansion Mode

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Order Information:

*Speed – Slower speeds available upon request.

**Package – 32 - pin Plastic Lead Chip Carrier (PLCC)

Example:

FQV05L15J (8k x 9, 15ns, PLCC, Commercial temp)

FQV01L25PFI (512 x 9, 25ns, PLCC, Industrial temp)

USA

Taiwan

2107 North First Street, Suite 415

San Jose, CA 95131, USA

www.hba.com

Tel: 408.453.8885

Fax: 408.453.8886

No. 81, Suite 8F-9, Shui-Lee Rd.

Hsinchu, Taiwan, R.O.C.

www.hba.com

Tel: 886.3.516.9118

Fax: 886.3.516.9181

HBA

Device Family

Device Type

Power

Speed (ns)*

Package**

Temperature Range

XX XX X XX X X

FQV 05 (8,192 x 9) Low 15 – 40 MHz J Blank – Commercial (0°C to 70°C)

04 (4,096 x 9) 25 – 29 MHz I – Industrial (-40° to 85°C)

03 (2,048 x 9) 35 – 22 MHz

02 (1,024 x 9) 50 – 15 MHz

01 (512 x 9)