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MAX660

MAX660 Switched Capacitor Voltage Converter

Literature Number: SNOS405

MAX660

Switched Capacitor Voltage Converter

General Description

The MAX660 CMOS charge-pump voltage converter inverts

a positive voltage in the range of 1.5V to 5.5V to the corre-

sponding negative voltage. The MAX660 uses two low cost

capacitors to provide 100 mA of output current without the

cost, size, and EMI related to inductor based converters.

With an operating current of only 120 µA and operating effi-

ciency greater than 90%at most loads, the MAX660 pro-

vides ideal performance for battery powered systems. The

MAX660 may also be used as a positive voltage doubler.

The oscillator frequency can be lowered by adding an exter-

nal capacitor to the OSC pin.Also, the OSC pin may be used

to drive the MAX660 with an external clock.Afrequency con-

trol (FC) pin selects the oscillator frequency of 10 kHz or 80

kHz.

Features

nInverts or doubles input supply voltage

nNarrow SO-8 Package

n6.5Ωtypical output resistance

n88%typical conversion efficiency at 100 mA

nSelectable oscillator frequency: 10 kHz/80 kHz

Applications

nLaptop computers

nCellular phones

nMedical instruments

nOperational amplifier power supplies

nInterface power supplies

nHandheld instruments

Typical Application Circuits

Connection Diagram

Ordering Information

Order Number Top Mark Package Supplied as

MAX660M Date Code

MAX660M M08A Rail (95 units/rail)

MAX660MX Date Code

MAX660M M08A Tape and Reel (2500 units/rail)

Voltage Inverter

DS100898-1

Positive Voltage Doubler

DS100898-2

8-Lead SO

DS100898-5

Top View

November 1999

MAX660 Switched Capacitor Voltage Converter

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

Supply Voltage (V+ to GND, or GND to OUT) 6V

LV (OUT − 0.3V) to (GND + 3V)

FC, OSC The least negative of (OUT − 0.3V)

or (V+ − 6V) to (V+ + 0.3V)

V+ and OUT Continuous Output Current 120 mA

Output Short-Circuit Duration to GND (Note 2) 1 sec.

Power Dissipation

=25˚C) (Note 3) 735 mW

Max (Note 3) 150˚C

(Note 3) 170˚C/W

Operating Junction Temp. Range −40˚C to +85˚C

Storage Temperature Range −65˚C to +150˚C

Lead Temperature 300˚C

(Soldering, 10 seconds)

ESD Rating 2 kV

Electrical Characteristics

Limits in standard typeface are for T

=25˚C, and limits in boldface type apply over the full operating temperature range. Un-

less otherwise specified: V+ =5V, FC =Open, C

=150 µF. (Note 4)

Symbol Parameter Condition Min Typ Max Units

V+ Supply Voltage R

=1k Inverter, LV =Open

(Note 5) 3.5 5.5

Inverter, LV =GND 1.5 5.5 V

Doubler, LV =OUT 2.5 5.5

Supply Current No Load FC =Open 0.12 0.5 mALV =Open FC =V+ 13

Output Current T

≤+85˚C, OUT ≤−4V 100 mA

>+85˚C, OUT ≤−3.8V 100

OUT

Output Resistance (Note 6) I

=100 mA T

≤+85˚C 6.5 10 Ω

>+85˚C 12

OSC

Oscillator Frequency OSC =Open FC =Open 510 kHz

FC =V+ 40 80

OSC

OSC Input Current FC =Open ±2µA

FC =V+ ±16

EFF

Power Efficiency R

(1k) between V

and OUT 96 98

(500Ω) between GND and OUT 92 96 %

=100 mA to GND 88

OEFF

Voltage Conversion Efficiency No Load 99 99.96 %

Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device

beyond its rated operating conditions.

Note 2: OUT may be shorted to GND for one second without damage. However, shorting OUT to V+ may damage the device and should be avoided.Also, for tem-

peratures above 85˚C, OUT must not be shorted to GND or V+, or device may be damaged.

Note 3: The maximum allowable power dissipation is calculated by using PDMax =(TJMax −T

)/θJA, where TJMax is the maximum junction temperature, TAis the

ambient temperature, and θJA is the junction-to-ambient thermal resistance of the specified package.

Note 4: In the test circuit, capacitors C1and C2are 0.2Ωmaximum ESR capacitors. Capacitors with higher ESR will increase output resistance, reduce output volt-

age and efficiency.

Note 5: The minimum limit for this parameter is different from the limit of 3.0V for the industry-standard “660” product. For inverter operation with supply voltage be-

low 3.5V, connect the LV pin to GND.

Note 6: Specified output resistance includes internal switch resistance and capacitor ESR.

MAX660

www.national.com 2

Test Circuit

Typical Performance Characteristics (Circuit of

Figure 1

)

DS100898-4

FIGURE 1. MAX660 Test Circuit

Supply Current vs

Supply Voltage

DS100898-36

Supply Current vs

Oscillator Frequency

DS100898-37

Output Source Resistance

vs Supply Voltage

DS100898-38

Output Source Resistance

vs Temperature

DS100898-39

Efficiency vs Load

Load Current

DS100898-40

Output Voltage Drop

vs Load Current

DS100898-41

MAX660

www.national.com3

Typical Performance Characteristics (Circuit of

Figure 1

) (Continued)

Efficiency vs

Oscillator Frequency

DS100898-13

Output Voltage vs

Oscillator Frequency

DS100898-14

Oscillator Frequency

vs External Capacitance

DS100898-15

Oscillator Frequency

Supply Voltage

(FC =V+)

DS100898-16

Oscillator Frequency vs

Supply Voltage

(FC =Open)

DS100898-17

Oscillator Frequency vs

Temperature

(FC =V+)

DS100898-18

Oscillator Frequency

vs Temperature

(FC =Open)

DS100898-19

MAX660

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Pin Description

Pin Name Function

Voltage Inverter Voltage Doubler

1 FC Frequency control for internal oscillator: Same as inverter.

FC =open, f

OSC

=10 kHz (typ);

FC =V+, f

OSC

=80 kHz (typ);

FC has no effect when OSC pin is driven externally.

2 CAP+ Connect this pin to the positive terminal of

charge-pump capacitor. Same as inverter.

3 GND Power supply ground input. Power supply positive voltage input.

4 CAP− Connect this pin to the negative terminal of

charge-pump capacitor. Same as inverter.

5 OUT Negative voltage output. Power supply ground input.

6 LV Low-voltage operation input. Tie LV to GND when

input voltage is less than 3.5V. Above 3.5V, LV can

be connected to GND or left open. When driving

OSC with an external clock, LV must be connected

to GND.

LV must be tied to OUT.

7 OSC Oscillator control input. OSC is connected to an

internal 15 pF capacitor. An external capacitor can

be connected to slow the oscillator. Also, an

external clock can be used to drive OSC.

Same as inverter except that OSC cannot be driven

by an external clock.

8 V+ Power supply positive voltage input. Positive voltage output.

Circuit Description

The MAX660 contains four large CMOS switches which are

switched in a sequence to invert the input supply voltage.

Energy transfer and storage are provided by external capaci-

tors.

Figure 2

illustrates the voltage conversion scheme.

When S

and S

are closed, C

charges to the supply volt-

age V+. During this time interval switches S

and S

are

open. In the second time interval, S

and S

are open and S

and S

are closed, C

is charging C

. After a number of

cycles, the voltage across C

will be pumped to V+. Since

the anode of C

is connected to ground, the output at the

cathode of C

equals −(V+) assuming no load on C

, no loss

in the switches, and no ESR in the capacitors. In reality, the

charge transfer efficiency depends on the switching fre-

quency, the on-resistance of the switches, and the ESR of

the capacitors.

Application Information

SIMPLE NEGATIVE VOLTAGE CONVERTER

The main application of MAX660 is to generate a negative

supply voltage. The voltage inverter circuit uses only two ex-

ternal capacitors as shown in the TypicalApplication Circuits.

The range of the input supply voltage is 1.5V to 5.5V. For a

supply voltage less than 3.5V, the LV pin must be connected

to ground to bypass the internal regulator circuitry.This gives

the best performance in low voltage applications. If the sup-

ply voltage is greater than 3.5V, LV may be connected to

ground or left open. The choice of leaving LV open simplifies

the direct substitution of the MAX660 for the LMC7660

Switched Capacitor Voltage Converter.

The output characteristics of this circuit can be approximated

by an ideal voltage source in series with a resistor. The volt-

age source equals −(V+). The output resistance R

out

is a

function of the ON resistance of the internal MOS switches,

the oscillator frequency, and the capacitance and ESR of C

and C

. A good approximation is:

where R

is the sum of the ON resistance of the internal

MOS switches shown in

Figure 2

High value, low ESR capacitors will reduce the output resis-

tance. Instead of increasing the capacitance, the oscillator

frequency can be increased to reduce the 2/(f

osc

) term.

Once this term is trivial compared with R

and ESRs, fur-

ther increasing in oscillator frequency and capacitance will

become ineffective.

The peak-to-peak output voltage ripple is determined by the

oscillator frequency, and the capacitance and ESR of the

output capacitor C

DS100898-21

FIGURE 2. Voltage Inverting Principle

MAX660

www.national.com5

Application Information (Continued)

Again, using a low ESR capacitor will result in lower ripple.

POSITIVE VOLTAGE DOUBLER

The MAX660 can operate as a positive voltage doubler (as

shown in the TypicalApplication Circuits).The doubling func-

tion is achieved by reversing some of the connections to the

device. The input voltage is applied to the GND pin with an

allowable voltage from 2.5V to 5.5V. The V+ pin is used as

the output. The LV pin and OUT pin must be connected to

ground. The OSC pin can not be driven by an external clock

in this operation mode. The unloaded output voltage is twice

of the input voltage and is not reduced by the diode D

’s for-

ward drop.

The Schottky diode D

is only needed for start-up. The inter-

nal oscillator circuit uses the V+ pin and the LV pin (con-

nected to ground in the voltage doubler circuit) as its power

rails. Voltage across V+ and LV must be larger than 1.5V to

insure the operation of the oscillator. During start-up, D

used to charge up the voltage at V+ pin to start the oscillator;

also, it protects the device from turning-on its own parasitic

diode and potentially latching-up. Therefore, the Schottky di-

ode D

should have enough current carrying capability to

charge the output capacitor at start-up, as well as a low for-

ward voltage to prevent the internal parasitic diode from

turning-on. A Schottky diode like 1N5817 can be used for

most applications. If the input voltage ramp is less than

10V/ms, a smaller Schottky diode like MBR0520LT1 can be

used to reduce the circuit size.

SPLIT V+ IN HALF

Another interesting application shown in the Basic Applica-

tion Circuits is using the MAX660 as a precision voltage di-

vider. Since the off-voltage across each switch equals V

/2,

the input voltage can be raised to +11V.

CHANGING OSCILLATOR FREQUENCY

The internal oscillator frequency can be selected using the

Frequency Control (FC) pin. When FC is open, the oscillator

frequency is 10 kHz; when FC is connected to V+, the fre-

quency increases to 80 kHz.A higher oscillator frequency al-

lows smaller capacitors to be used for equivalent output re-

sistance and ripple, but increases the typical supply current

from 0.12 mA to 1 mA.

The oscillator frequency can be lowered by adding an exter-

nal capacitor between OSC and GND. (See Typical Perfor-

mance Characteristics.) Also, in the inverter mode, an exter-

nal clock that swings within 100 mV of V+ and GND can be

used to drive OSC. Any CMOS logic gate is suitable for driv-

ing OSC. LV must be grounded when driving OSC. The

maximum external clock frequency is limited to 150 kHz.

The switching frequency of the converter (also called the

charge pump frequency) is half of the oscillator frequency.

Note: OSC cannot be driven by an external clock in the

voltage-doubling mode.

TABLE 1. MAX660 Oscillator Frequency Selection

FC OSC Oscillator

Open Open 10 kHz

V+ Open 80 kHz

Open

or V+ External

Capacitor See Typical

Performance

Characteristics

N/A External Clock

(inverter mode only) External Clock

Frequency

CAPACITOR SELECTION

As discussed in the

Simple Negative Voltage Converter

sec-

tion, the output resistance and ripple voltage are dependent

on the capacitance and ESR values of the external capaci-

tors. The output voltage drop is the load current times the

output resistance, and the power efficiency is

Where I

(V+) is the quiescent power loss of the IC device,

and I

OUT

is the conversion loss associated with the

switch on-resistance, the two external capacitors and their

ESRs.

Since the switching current charging and discharging C

approximately twice as the output current, the effect of the

ESR of the pumping capacitor C

is multiplied by four in the

output resistance. The output capacitor C

is charging and

discharging at a current approximately equal to the output

current, therefore, its ESR only counts once in the output re-

sistance. However, the ESR of C

directly affects the output

voltage ripple. Therefore, low ESR capacitors (

Table 2

) are

recommended for both capacitors to maximize efficiency, re-

duce the output voltage drop and voltage ripple. For conve-

nience, C

and C

are usually chosen to be the same.

The output resistance varies with the oscillator frequency

and the capacitors. In

Figure 4

, the output resistance vs. os-

cillator frequency curves are drawn for three different tanta-

lum capacitors. At very low frequency range, capacitance

plays the most important role in determining the output resis-

tance. Once the frequency is increased to some point (such

as 20 kHz for the 150 µF capacitors), the output resistance is

dominated by the ON resistance of the internal switches and

the ESRs of the external capacitors. A low value, smaller

size capacitor usually has a higher ESR compared with a

bigger size capacitor of the same type. For lower ESR, use

ceramic capacitors.

DS100898-3

FIGURE 3. Splitting V

in Half

MAX660

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Application Information (Continued)

TABLE 2. Low ESR Capacitor Manufacturers

Manufacturer Phone FAX Capacitor Type

Nichicon Corp. (708)-843-7500 (708)-843-2798 PL, PF series, through-hole aluminum electrolytic

AVX Corp. (803)-448-9411 (803)-448-1943 TPS series, surface-mount tantalum

Sprague (207)-324-4140 (207)-324-7223 593D, 594D, 595D series, surface-mount tantalum

Sanyo (619)-661-6835 (619)-661-1055 OS-CON series, through-hole aluminum electrolytic

Other Applications

PARALLELING DEVICES

Any number of MAX660s can be paralleled to reduce the output resistance. Each device must have its own pumping capacitor

, while only one output capacitor C

out

is needed as shown in

Figure 5

. The composite output resistance is:

CASCADING DEVICES

Cascading the is an easy way to produce a greater negative voltage (as shown in

Figure 6

). If n is the integer representing the

number of devices cascaded, the unloaded output voltage V

out

is (−nV

). The effective output resistance is equal to the weighted

sum of each individual device:

DS100898-32

FIGURE 4. Output Source Resistance vs Oscillator Frequency

DS100898-7

FIGURE 5. Lowering Output Resistance by Paralleling Devices

MAX660

www.national.com7

Other Applications (Continued)

A three-stage cascade circuit shown in

Figure 7

generates −3V

, from V

Cascading is also possible when devices are operating in doubling mode. In

Figure 8

, two devices are cascaded to generate 3V

An example of using the circuit in

Figure 7

Figure 8

is generating +15V or −15V from a +5V input.

Note that the number of n is practically limited since the increasing of n significantly reduces the efficiency and increases the out-

put resistance and output voltage ripple.

REGULATING V

out

It is possible to regulate the output of the MAX660 by use of a low dropout regulator (such as LP2951). The whole converter is

depicted in

Figure 9

. This converter can give a regulated output from −1.5V to −5.5V by choosing the proper resistor ratio:

where

ref

=1.235V.

DS100898-8

FIGURE 6. Increasing Output Voltage by Cascading Devices

DS100898-9

FIGURE 7. Generating −3V

from +V

DS100898-10

FIGURE 8. Generating +3V

from +V

MAX660

www.national.com 8

Other Applications (Continued)

The error flag on pin 5 of the LP2951 goes low when the regulated output at pin 4 drops by about 5%. The LP2951 can be shut-

down by taking pin 3 high.

Also, as shown in

Figure 10

by operating MAX660 in voltage doubling mode and adding a linear regulator (such as LP2981) at

the output, we can get +5V output from an input as low as +3V.

DS100898-11

FIGURE 9. Combining MAX660 with LP2951 to Make a Negative Adjustable Regulator

DS100898-12

FIGURE 10. Generating +5V from +3V Input Voltage

MAX660

www.national.com9

Other Applications (Continued)

OTHER SWITCHED-CAPACITOR CONVERTERS

Please refer to

Table 3

, which shows National’s Switched-Capacitor Converter products.

TABLE 3. Switched-Capacitor Converters

LM2664 LM2665 LM3350 LM3351 MAX660

Package SOT23-6 SOT23-6 Mini SO-8 Mini SO-8 SO-8

Supply Current (typ., mA) 0.22 0.22 3.75 1.1 0.12 at 10kHz,

1.0 at 80kHz

Output Ω(typ.) 12 12 4.2 4.2 6.5

Oscillator (kHz) 80 80 800 200 10, 80

Input (V) 1.8 to 5.5 1.8 to 5.5 2.5 to 6.25 2.5 to 6.25 1.8 to 5.5

Output Mode(s) Invert Double 3/2, 2/3 3/2, 2/3 Invert, Double

LM2660 LM2661 LM2662 LM2663

Package Mini SO-8, SO-8 Mini SO-8, SO-8 SO-8 SO-8

Supply Current (typ., mA) 0.12 at 10kHz,

1.0 at 80kHz 1.0 0.3 at 10kHz,

1.3 at 70kHz 1.3

Output Ω(typ.) 6.5 6.5 3.5 3.5

Oscillator (kHz) 10, 80 80 10, 70 70

Input (V) 1.8 to 5.5 1.8 to 5.5 1.8 to 5.5 1.8 to 5.5

Output Mode(s) Invert, Double Invert, Double Invert, Double Invert, Double

MAX660

www.national.com 10

Physical Dimensions inches (millimeters) unless otherwise noted

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www.national.com

8-Lead SO (M)

Order Number MAX660M

NS Package Number M08A

MAX660 Switched Capacitor Voltage Converter

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.

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