LT3840
1
3840fa
For more information www.linear.com/LT3840
Typical applicaTion
FeaTures DescripTion
Wide Input Range
Synchronous Regulator Controller
with Accurate Current Limit
The LT
®
3840 is a high voltage synchronous step-down
switching regulator controller capable of operating from
a 2.5V to 60V supply.
The LT3840’s low quiescent current, when configured for
user selectable Burst Mode operation, helps extend run
time in battery-powered systems by increasing efficiency
at light loads. The LT3840 uses a constant frequency,
current mode architecture. High current applications are
possible with large N-channel gate drivers capable of
driving multiple low RDS(ON) MOSFETs.
An integrated buck-boost switching regulator generates
a 7.5V bias supply voltage for MOSFET gate drive and IC
power allowing higher efficiency operation over the entire
input voltage range and eliminating the need for an external
bias voltage. An accurate current limit set point regulates
the maximum output current. A current monitor reports
the average output current.
High Efficiency Synchronous Step-Down Converter 12VIN to 3.3VOUT Efficiency
applicaTions
L, LT, LTC , LT M, Linear Technology, Burst Mode, and the Linear logo are registered
trademarks of Linear Technology Corporation. All other trademarks are the property of their
respective owners.
n Wide Input Range: 2.5V to 60V
n Integrated Buck-Boost Supply for 7.5V MOSFET
Gate Drive
n Programmable Constant-Current Operation with
Current Monitor Output
n Low IQ: 75µA, 12VIN to 3.3VOUT
n Selectable Low Output Ripple Burst Mode
®
Operation
n VOUT Up to 60V
n Adjustable and Synchronizable: 50kHz to 1MHz
n Internal OVLO Protects for Input Transients Up to 80V
n Accurate Input Overvoltage and Undervoltage Threshold
n Programmable Soft-Start with Voltage Tracking
n Power Good and Output OVP
n 28-Lead TSSOP and 38-Lead 4mm × 6mm QFN Packages
n Automotive Supplies
n Industrial Systems
n Distributed DC Power Systems
LOAD CURRENT (A)
0
EFFICIENCY (%)
100
95
80
75
90
85
70
50
65
60
55
105 15
3840 TA01b
20
ICOMP ICTRL
IMON
AUXSW2AUXSW1AUXBST
LT3840
3840 TA01a
INTVCC
BOOST
TG
SW
BG
SENSE+
SENSE–
FB
GND
VIN
VIN
4V TO 60V 68µF
×2
330µF
×2
49.9k 20k
7.68k
10k
16.9k
1500pF
2200pF
470pF
100pF
1µF
1µF
1.5µH 2m
4.7µF
33µH
EN
TK/SS
AUXVIN
UVLO
OVLO
PG
SYNC
MODE
RT
VC
VOUT
3.3V
20A
LT3840
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For more information www.linear.com/LT3840
pin conFiguraTion
absoluTe MaxiMuM raTings
AUXVIN, VIN, EN and UVLO ....................... –0.3V to 80V
PG .............................................................. –0.3V to 25V
MODE ........................................................... –0.3V to 9V
SENSE+ and SENSE– .................................. –0.3V to 60V
SENSE+ to SENSE– ...........................................–1V to 1V
OVLO, VC, FB, SYNC, TK/SS and ICTRL ....... –0.3V to 6V
(Note 1)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
TOP VIEW
FE PACKAGE
28-LEAD PLASTIC TSSOP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
AUXSW1
PGND
AUXVIN
SYNC
RT
TK/SS
FB
VC
PG
MODE
OVLO
UVLO
EN
VIN
AUXBST
AUXSW2
INTVCC
BG
BGRTN
BOOST
TG
SW
SENSE–
SENSE+
ICOMP
ICTRL
IMON
GND
29
GND
θJA = 30°C/W, θJC = 10°C/W
EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB
13 14 15 16
TOP VIEW
39
GND
UFE PACKAGE
38-LEAD (4mm × 6mm) PLASTIC QFN
17 18 19
38 37 36 35 34 33 32
24
25
26
27
28
29
30
31
8
7
6
5
4
3
2
1AUXVIN
NC
SYNC
RT
NC
TK/SS
FB
VC
PG
NC
MODE
OVLO
NC
INTVCC
BG
BGRTN
NC
BOOST
TG
SW
NC
SENSE–
SENSE+
ICOMP
PGND
NC
AUXSW1
AUXBST
NC
AUXSW2
NC
UVLO
EN
VIN
NC
GND
IMON
ICTRL
23
22
21
20
9
10
11
12
θJA = 38°C/W, θJC = 4°C/W
EXPOSED PAD (PIN 39) IS GND, MUST BE SOLDERED TO PCB
orDer inForMaTion
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT3840EFE#PBF LT3840EFE#TRPBF LT3840FE 28-Lead Plastic TSSOP –40°C to 125°C
LT3840IFE#PBF LT3840IFE#TRPBF LT3840FE 28-Lead Plastic TSSOP –40°C to 125°C
LT3840HFE#PBF LT3840HFE#TRPBF LT3840FE 28-Lead Plastic TSSOP –40°C to 150°C
LT3840MPFE#PBF LT3840MPFE#TRPBF LT3840FE 28-Lead Plastic TSSOP –55°C to 150°C
LT3840EUFE#PBF LT3840EUFE#TRPBF 3840 38-Lead (4mm × 6mm) Plastic QFN –40°C to 125°C
LT3840IUFE#PBF LT3840IUFE#TRPBF 3840 38-Lead (4mm × 6mm) Plastic QFN –40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
Junction Temperature Range
LT3840E (Note 2) .............................. –40°C to 125°C
LT3840I ............................................. –40°C to 125°C
LT3840H ............................................ –40°C to 150°C
LT3840MP ......................................... –55°C to 150°C
Lead Temperature (Soldering, 10 sec)
TSSOP Only ..........................................................300°C
Storage Temperature............................. –65°C to 150°C
LT3840
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For more information www.linear.com/LT3840
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Input Supply
VIN Minimum Operating Voltage
VIN Supply Current
VIN Burst Mode Current
VIN Shutdown Current
VMODE = 0V
VEN = 0.3V
l
l
20
20
0.1
2.5
30
1
V
µA
µA
µA
AUXVIN Minimum Operating Voltage
AUXVIN Overvoltage Lockout
AUXVIN Supply Current
AUXVIN Burst Mode Current
AUXVIN Shutdown Current
(Note 3)
VMODE = 0V
VEN = 0.3V
l
l
60
300
0.1
0.1
2.5
1
V
V
µA
µA
µA
EN Enable Threshold (Rising)
EN Hysteresis
EN Pin Bias Current
VEN = 1.25V
l
1.20 1.25
30
2
1.30
V
mV
nA
UVLO Enable Threshold (Rising)
UVLO Hysteresis
UVLO Pin Bias Current
VUVLO = 1.25V
l
1.20 1.25
45
1
1.30
V
mV
nA
OVLO Threshold (Rising)
OVLO Hysteresis
OVLO Pin Bias Current
VOVLO = 1.25V
l
1.20 1.25
125
1
1.30
V
mV
nA
Voltage Regulation
Regulated FB Voltage E- and I-Grade l1.237 1.250 1.263 V
Regulated FB Voltage MP- and H-Grade l1.232 1.250 1.263 V
FB Overvoltage Protection % Above FB Voltage l8 12 16 %
FB Overvoltage Protection Hysteresis 2.5 %
FB Input Bias Current 5 20 nA
FB Voltage Line Regulation 2.5V ≤ VIN ≤ 60V 0.002 0.02 %/V
FB Error Amp Transconductance 300 µS
FB Error Amp Sink/Source Current ±25 µA
Peak Current Limit Sense Voltage 0% Duty Cycle 80 95 110 mV
Peak Current Limit Sense Voltage 100% Duty Cycle 60 mV
TK/SS Charge Current 9 µA
Current Regulation
Sense Common Mode Range l0 60 V
Average Current Limit Sense Voltage VICTRL = Open
VICTRL = 800mV
l47.5 50
40 52.5 mV
mV
IMON Voltage VSENSE = 50mV
VSENSE = 20mV
l0.95 1.00
0.4 1.05 V
V
ICTRL Current VICTRL = 1V 7 µA
Reverse Protect Sense Voltage VMODE = 7.5V –50 mV
Reverse Current Sense Voltage Offset VMODE = VFB or VMODE = 0V 5 mV
Sense Input Current SENSE+ = SENSE– = 12V 300 µA
Oscillator
Switching Frequency RT = 49.9k
RT = 348k
RT = 13.7k
l280 300
50
1000
320 kHz
kHz
kHz
SYNC Threshold 1.2 V
LT3840
4
3840fa
For more information www.linear.com/LT3840
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Power Good
PG Threshold as a Percentage of VFB VFB Rising l87 90 93 %
PG Hysteresis as a Percentage of VFB 2.5 %
PG Leakage VPG = 5V 0.1 1 µA
PG Sink Current VPG = 0.3V l35 65 µA
MOSFET Gate Drivers
Non-Overlap Time TG to BG 75 ns
Non-Overlap Time BG to TG 75 ns
TG Minimum On Time 150 ns
TG Minimum Off Time 240 ns
TG Maximum Duty Cycle RT = 49.9k 99 %
TG, BG Drive On Voltage 7.5 V
TG, BG Drive Off Voltage 5 mV
TG, BG Drive Rise Time CTG = CBG = 3300pF 20 ns
TG, BG Drive Fall Time CTG = CBG = 3300pF 20 ns
BOOST UVLO (Rising) VBOOST - VSW 4.5 5.3 V
BOOST UVLO Hysteresis 350 mV
Internal Auxiliary Supply
INTVCC Regulation Voltage l7.25 7.5 7.75 V
INTVCC UVLO Threshold (Rising) 6.25 6.5 6.75 V
INTVCC UVLO Hysteresis 300 mV
INTVCC Current in Shutdown VEN = 0.3V 6 µA
INTVCC Output Current 2.5V ≤ VIN ≤ 60V (Note 4) l100 mA
INTVCC Burst Mode Current VMODE = 0V 60 µA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3840E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization, and correlation with statistical process controls. The
LT3840I is guaranteed over the –40°C to 125°C operating junction
temperature range. The LT3840H is guaranteed over the full –40°C to
150°C operating junction temperature range. The LT3840MP is 100%
tested and guaranteed over the –55°C to 150°C temperature range. High
junction temperatures degrade operating lifetimes; Operating lifetime is
derated for junction temperatures greater than 125°C.
Note 3: Supply current specification does not include switch drive
currents. Actual supply currents will be higher.
Note 4: Specification is not tested but is guaranteed by design,
characterization and correlation with statistical process controls.
LT3840
5
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For more information www.linear.com/LT3840
Typical perForMance characTerisTics
Shutdown Current vs Temperature
INTVCC Regulation Voltage vs
Temperature ISENSE+ + ISENSE– vs VSENSE(CM)
Switching Frequency vs
Temperature
EN Threshold Voltage vs
Temperature
UVLO Threshold Voltage vs
Temperature OVLO Threshold vs Temperature
Soft-Start (TK/SS) Current vs
Temperature
TEMPERATURE (°C)
–50
INTV
CC
REGULATION VOLTAGE (V)
7.7
7.5
7.4
7.6
7.3
7.0
7.2
7.1
500 100 125
3840 G05
150
25–25 75
TEMPERATURE (°C)
–50
EN PIN VOLTAGE (V)
1.40
1.35
1.30
1.20
1.15
1.25
1.10
90
1.05
1.00
95
500 100 125
3840 G01
15025–25 75
EN RISING
EN FALLING
TEMPERATURE (°C)
–50
UVLO PIN VOLTAGE (V)
1.40
1.35
1.30
1.20
1.15
1.25
1.10
90
1.05
1.00
95
500 100 125
3840 G02
15025–25 75
UVLO RISING
UVLO FALLING
TEMPERATURE (°C)
–50
OVLO PIN VOLTAGE (V)
1.30
1.25
1.15
1.05
1.00
1.20
1.10
0.95
0.90 500 100 125
3840 G03
15025–25 75
OVLO RISING
OVLO FALLING
TA = 25°C, unless otherwise noted.
COMMON MODE SENSE VOLTAGE (V)
0
SENSE+ + SENSE– BIAS CURRENT (µA)
1600
1200
800
–800
400
0
–400
21 4
3840 G06
53
TEMPERATURE (°C)
–50
SWITCHING FREQUENCY (kHz)
330
310
290
320
300
280
270 500 100 125
3840 G07
15025–25 75
RT = 49.9k
TEMPERATURE (°C)
–50
TK/SS CURRENT (µA)
12
10
8
11
9
7
6500 100 125
3840 G08
15025–25 75
TEMPERATURE (°C)
–50
REGULATED FEEDBACK VOLTAGE (V)
1.28
1.26
1.24
1.27
1.25
1.23
1.22 500 100 125
3840 G09
15025–25 75
Regulated FB Voltage vs
Temperature
TEMPERATURE (°C)
–50
SHUTDOWN CURRENT (µA)
20
18
14
10
8
16
12
6
0
4
2
500 100 125
3840 G04
15025–25 75
VIN
AUXVIN
LT3840
6
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For more information www.linear.com/LT3840
Typical perForMance characTerisTics
UVLO Pin Current vs UVLO
Voltage
Average Current Sense Voltage vs
Temperature
Power Good Threshold vs
Temperature
Enable Pin Current vs Enable
Voltage
Current Monitor (IMON) Voltage
vs Temperature
FB Overvoltage Threshold vs
Temperature
TA = 25°C, unless otherwise noted.
ENABLE PIN VOLTAGE (V)
0
ENABLE PIN CURRENT (µA)
1.6
1.2
0.8
1.4
1.0
0.6
0.4
0.2
0.0 30 50
3840 G10
602010 40
UVLO PIN VOLTAGE (V)
0
UVLO PIN CURRENT (nA)
4
3
5
2
1
030 50
3840 G11
602010 40
TEMPERATURE (°C)
–50
AVERAGE CURRENT SENSE VOLTAGE (mV)
55
50
40
30
45
35
25
10
20
15
500 100 125
3840 G12
15025–25 75
ICTRL = 500mV
ICTRL = FLOAT
TEMPERATURE (°C)
–50
IMON VOLTAGE (V)
1.1
1.0
0.8
0.6
0.9
0.7
0.5
0.2
0.4
0.3
500 100 125
3840 G13
15025–25 75
VSENSE = 50mV
VSENSE = 25mV
TEMPERATURE (°C)
–50
POWER GOOD THRESHOLD (V)
1.4
1.3
1.2
1.1
1.0
0.8
0.9
500 100 125
3840 G14
15025–25 75
PG RISING
PG FALLING
TEMPERATURE (°C)
–50
FB THRESHOLD (V)
1.6
1.5
1.4
1.3
1.2
1.0
1.1
500 100 125
3840 G15
15025–25 75
FB FALLING
FB RISING
LT3840
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For more information www.linear.com/LT3840
pin FuncTions
AUXSW1 (Pin 1/Pin 36): AUXSW1 is a switching node of
the auxiliary bias supply. Connect the pin to the auxiliary
bias supply inductor.
PGND (Pin 2/Pin 38): PGND is the high current ground
return for the auxiliary bias supply. Connect PGND to the
negative terminal of the INTVCC decoupling capacitor and
to system ground.
AUXVIN (Pin 3/Pin 1): AUXVIN is the supply pin to the
auxiliary bias supply. Bypass the pin with a low ESR ca-
pacitor placed close to the pin and referenced to PGND.
SYNC (Pin 4/Pin 3): SYNC allows the LT3840 switching
frequency to be synchronized to an external clock. Set
the RT resistor such that the internal oscillator frequency
is 15% below the minimum external clock frequency. If
unused connect the SYNC pin to GND.
RT (Pin 5/Pin 4): An external resistor on RT sets the
switching frequency of the synchronous controller and
auxiliary bias supply.
TK/SS (Pin 6/Pin 6): TK/SS is the LT3840 external tracking
and soft-start input. The LT3840 regulates the VFB voltage
to the smaller of the internal reference or the voltage on the
TK/SS pin. An internal pull-up current source is connected
to this pin. A capacitor (CSS) to ground sets the ramp rate.
Alternatively, a resistor divider on another voltage supply
connected to this pin allows the LT3840 output to track
another supply during start-up. Leave the pin open if the
tracking and soft-start functions are unused.
FB (Pin 7/Pin 7): The regulator output voltage is set with
a resistor divider connected to FB. FB is also the input
for the output overvoltage and power good comparators.
VC (Pin 8/Pin 8): VC is the compensation node for the
output voltage regulation control loop.
PG (Pin 9/Pin 9): PG is a power good pin and is the open-
drain output of an internal comparator.
MODE (Pin 10/Pin 11): MODE is used to enable or disable
Burst Mode operation. Connect MODE to ground for Burst
Mode operation. Connect the pin to FB for pulse-skipping
mode. Connect MODE to INTVCC for continuous mode.
OVLO (Pin 11/Pin 12): OVLO has a precision threshold
with hysteresis to implement an accurate overvoltage
lockout (OVLO). Controller switching is disabled during
an overvoltage lockout (OVLO) event. INTVCC regulation
is maintained during an OVLO event. Connect the pin to
GND to disable the function.
UVLO (Pin 12/Pin 13): UVLO has a precision threshold
with hysteresis to implement an accurate undervoltage
lockout (UVLO). UVLO enables the controller switching.
Connect the pin to VIN to disable the function.
EN (Pin 13/Pin 14): EN has a precision IC enable threshold
with hysteresis. EN enables the auxiliary bias supply and
controller switching. Connect the pin to VIN to disable the
function. EN also has a lower threshold to put the LT3840
into a low current shutdown mode where all internal cir-
cuitry is disabled.
VIN (Pin 14/Pin 15): VIN provides an internal DC bias rail
and should be decoupled to GND with a low value (0.1µF),
low ESR capacitor located close to the pin.
GND (Pin 15, Exposed Pad Pin 29/Pin 17, Exposed Pad
Pin 39): Ground. Solder GND and the exposed pad directly
to the PCB ground plane.
IMON (Pin 16/Pin 18): The voltage on IMON represents
the average output current of the converter. A small value
capacitor filters the ripple voltage associated with the
inductor ripple current.
ICTRL (Pin 17/Pin 19): The maximum average output
current is programmed with a voltage applied to ICTRL.
If unused, leave floating.
ICOMP (Pin 18/Pin 20): A capacitor and resistor connected
to ICOMP compensates the average current limit circuit.
SENSE+ (Pin 19/Pin 21): SENSE+ is the positive input for
the differential current sense comparator.
SENSE– (Pin 20/Pin 22): SENSE– is the negative input for
the differential current sense comparator.
SW (Pin 21/Pin 24): SW is the high current return path
of the TG MOSFET driver and is externally connected to
the negative terminal of the BOOST capacitor.
(TSSOP/QFN)
LT3840
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For more information www.linear.com/LT3840
pin FuncTions
(TSSOP/QFN)
TG (Pin 22/Pin 25): TG is the high current gate drive for
the top N-channel MOSFET.
BOOST (Pin 23/Pin 26): BOOST is the supply for the
bootstrapped TG gate drive and is externally connected
to a low ESR ceramic capacitor referenced to SW.
BGRTN (Pin 24/Pin 28): BGRTN is the high current return
path of the BG MOSFET driver and is externally connected
to the negative terminal of the INTVCC capacitor.
BG (Pin 25/Pin 29): BG is the high current gate drive for
the bottom N-channel MOSFET.
INTVCC (Pin 26/Pin 30): INTVCC is the auxiliary bias supply
output. Bypass the pin with a low ESR capacitor placed
close to the pin. INTVCC provides supply for LT3840 internal
bias and MOSFET gate drivers. The INTVCC pin cannot be
back driven with a separate supply.
AUXSW2 (Pin 27/Pin 33): AUXSW2 is a switching node
of the auxiliary supply and is connected to the auxiliary
bias supply inductor.
AUXBST (Pin 28/Pin 35): AUXBST provides drive voltage
for the auxiliary supply and is connected to a low ESR
capacitor referenced to AUXSW1.
LT3840
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For more information www.linear.com/LT3840
operaTion
OVERVIEW
The LT3840 provides a solution for a high efficiency, general
purpose DC/DC converter. It is a wide input voltage range
switching regulator controller IC that uses a program-
mable fixed frequency, peak current mode architecture.
An internal switching regulator efficiently provides an
auxiliary bias supply to drive multiple, large N-channel
MOSFET switches.
The LT3840 includes functions such as average output
current control and monitoring, micro-power operation
with low output ripple, soft-start, output voltage tracking,
power good and a handful of protection features.
Voltage Control Loop
The LT3840 uses peak current mode control to regulate
the supply output voltage. The error amplifier (EA) gener-
ates an error voltage (VC) based on the difference between
the feedback (FB) voltage and an internal reference.
The externally compensated VC voltage generates a
threshold for the differential current sense comparator.
During normal operation, the LT3840 internal oscillator
runs at the programmed frequency. At the beginning of
each oscillator cycle, the TG switch drive is turned on. The
TG switch drive stays enabled until the sensed inductor
current exceeds the VC derived threshold of the current
sense comparator.
If the current comparator threshold is not reached for the
entire oscillator cycle, the switch driver stays on for up
to eight cycles. If after eight cycles the TG switch driver
is still on, it is turned off to regenerate the BOOST boot-
strapped supply.
When the load current increases, the FB voltage decreases
relative to the reference causing the EA to increase the VC
voltage until the average inductor current matches the new
load current. Refer to Figure 1 for a block diagram of the
LT3840 voltage control loop.
Figure 1. Peak Current Mode Voltage Control Functional Block Diagram
INTVCC
BOOST V
IN
EXTERNAL
COMPONENTS
V
OUT
INTVCC
SW
TG
DRIVER
DRIVER
ANTI SHOOT
THRU
BG
BGRTN
SENSE+
SENSE–
VREF
3840 BD
FB
SYNC RT
R
SQ
OSCILLATOR
–
+
VC
–
+
EA
LT3840
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For more information www.linear.com/LT3840
Light Load Operation (Burst Mode Operation,
Pulse-Skipping Mode or Continuous Mode)
The LT3840 is capable of operating in Burst Mode, pulse-
skipping mode, or continuous mode. Connect the MODE
pin to GND for Burst Mode operation, to the FB pin for
pulse-skipping mode, or to INTVCC for continuous mode.
In Burst Mode operation the LT3840 forces a minimum
peak inductor current via an internal clamp on the VC pin.
If the average inductor current is greater than the load
current the output voltage will begin to increase and the
error amplifier, EA, will attempt to decrease the VC volt-
age. When the internal voltage clamp on VC is engaged
and the FB voltage increases slightly, the LT3840 goes
into sleep mode.
In sleep mode, both external MOSFETs are turned off
and much of the internal circuitry is turned off, reducing
the quiescent current. The load current is supplied by
the output capacitor. As the output voltage decreases,
the LT3840 comes out of sleep mode and the controller
resumes normal operation by turning on the TG MOSFET
on the next cycle of the internal oscillator. The output
voltage increases and the controller goes back to sleep.
This cycle repeats until the average load current is greater
than the minimum forced peak inductor current.
When Burst Mode operation is selected, the inductor
current is not allowed to go negative. A reverse current
comparator turns off the BG MOSFET just before the
inductor current reaches zero, preventing it from revers-
ing and going negative. Thus, the controller operates in
discontinuous operation.
In pulse-skipping mode, during light loads, the supply
operates in discontinuous mode where the inductor cur-
rent is not allowed to reverse direction. Output voltage
regulation is maintained by skipping TG on pulses. At
light loads pulse-skipping mode is more efficient than
forced continuous mode, but not as efficient as Burst
Mode operation.
In continuous operation the inductor current is allowed
to reverse direction at light loads or under large transient
conditions. The reverse current comparator protects the
BG MOSFET by turning it off if the reverse current exceeds
the maximum reverse current sense threshold voltage.
Constant Current Operation
For applications requiring a regulated current source the
LT3840 has a control loop to accurately regulate the aver-
age output current. A current monitor function provides
output current information for telemetry and diagnostics.
The current through the sense resistor, RSENSE, produces
a voltage applied to the SENSE pins. The differential sense
voltage is amplified by 20x, buffered and output to the
IMON pin. The capacitor on the IMON pin filters the ripple
component to average the signal.
The 20x amplified differential sense voltage is also applied
to an internal GM amplifier and compared against either
1V or ICTRL voltage, whichever is smaller. A voltage
applied to ICTRL reduces the maximum average current
sense threshold. When the 20× amplified differential sense
voltage exceeds the 1V internal reference or the ICTRL
voltage the ICOMP node is driven high and VC is pulled
operaTion
LT3840
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operaTion
low. The VC voltage is the DC control node that sets the
peak inductor current. A resistor and capacitor on ICOMP
compensate the current control loop. Figure 2 includes
the block diagram of the average current control loop
and transfer functions showing the relationship between
VSENSE, ICTRL and IMON.
Auxiliary Bias Supply
The LT3840 wide input voltage range is made possible
with the auxiliary bias supply switching regulator. Other
switching regulator controllers typically use a linear volt-
age regulator to provide the gate drive voltage from VIN.
This approach is limited by power dissipation at high
input voltage and dropout at low voltage. The LT3840
bias regulator efficiently generates a 7.5V bias voltage,
capable of adequately driving large multiple MOSFETs, at
input voltages as low as 2.5V and as high as 60V.
The auxiliary bias supply is a monolithic buck-boost, peak
current mode topology. The switching frequency is fixed
and synchronized with the LT3840 synchronous buck con-
troller. The switching regulator is internally compensated
Figure 2. Average Output Current Limit Functional Block Diagram and Transfer Curves
SENSE+
SW
R
SENSE
VOUT
COUT
SENSE–
–
+
1V
–
–
+
GM
20x
ICOMP
MAXIMUM
AVERAGE
CURRENT
CONTROL
ICTRL IMON
VC
V
ICTRL
(mV)
TRANSFER FUNCTION
MAX. AVG. SENSE VOLTAGE
vs ICTRL
3002001000
30
40
50
600 800
20
400 500 700 900 1000
10
0
VSENSE (mV)
TRANSFER FUNCTION
IMON vs AVG.
SENSE VOLTAGE
1000
900
800
700
600
500
400
300
200
100
0
VIMON (mV)
V
SENSE
(mV)
40 50010 20 30
3840 F02
–
+
LT3840
12
3840fa
For more information www.linear.com/LT3840
operaTion
and current limited. Figure 3 is a functional block diagram
of the auxiliary bias supply.
Auxiliary Bias Supply Start-Up and Shutdown
The LT3840 auxiliary bias supply is enabled with the en-
able (EN) pin. When the EN pin voltage exceeds a diode
threshold the LT3840 comes out of the low quiescent cur-
rent shutdown mode and turns on the internal reference
(VREF) and internal bias (VREG). When the EN pin voltage
exceeds its precision voltage threshold the auxiliary bias
switching regulator is activated and the INTVCC voltage
is regulated. Figure 4 is a functional block diagram of the
auxiliary bias supply start-up.
The auxiliary bias supply has its own enable pin to allow
the INTVCC to be activated independent of the controller.
INTVCC may be used to drive other circuitry in the applica-
tion such as an LDO.
Figure 3. Auxiliary Bias Supply Functional Block Diagram
Figure 4. Auxiliary Bias Supply Start-Up Functional Block Diagram
3840 F04
INTERNAL
REFERENCE
OSCILLATOR
LINEAR
REGULATOR
–
+
–
+
EN
VREF
VREF
VIN AUXVIN
INTVCC
AUXILIARY
BIAS SUPPLY
VREG
3840 F03
–
+
–
+
VIN > 18V
AUXBST
CAUXBST
LPWR INTVCC
EXTERNAL
COMPONENTS
AUXSW1
AUXSW2
INTERNAL
COMPENSATION
R
S
Q
AUXVIN
VREF
CINTVCC
LT3840
13
3840fa
For more information www.linear.com/LT3840
operaTion
Soft-Start/Output Voltage Tracking
The soft-start function controls the slew rate of the power
supply output voltage during start-up. A controlled output
voltage ramp minimizes output voltage overshoot, reduces
inrush current from the VIN supply, and facilitates supply
sequencing.
TK/SS is an additional input to the error ampli-
fier (EA). The voltage control loop regulates the out-
put via the FB pin to whichever pin is lower, VREF or
TK/SS. An internal current source and a capacitor on the
pin program the output voltage ramp time. Drive the pin
with a voltage to use the output voltage tracking function
for supply sequencing.
The TK/SS voltage is clamped to a diode above the FB volt-
age, therefore, during a short-circuit the TK/SS voltage is
pulled low because the FB voltage is low. Once the short
has been removed the FB voltage starts to recover. The
soft-start circuit takes control of the output voltage slew rate
once the FB voltage has exceeded the slowly ramping TK/
SS voltage, reducing the output voltage overshoot through
a short-circuit recovery. During a fault condition such as
UVLO, OVLO or overtemperature, the soft-start capacitor
is discharged. If unused, the pin can be left open and the
internal current source will pull the pin voltage above the
soft-start operating range. Figure 5 is a functional block
diagram of the LT3840 soft-start/tracking function.
Power Good and Output Overvoltage Protection
When FB is within range of its regulated value an internal
N-channel MOSFET, on the PG pin, is turned off allowing
an external resistor to pull PG high. Power Good is valid
when the LT3840 is enabled with the EN pin and the VIN
voltage is above 2.5V.
The LT3840 output overvoltage protection feature disables
the synchronous buck controller switching when the FB
pin exceeds its regulated value by a given amount (see
Electrical Specification table). When this event occurs the
PG pin voltage is pulled low.
Input Overvoltage Lockout
The LT3840 is capable of withstanding input voltage
transients up to 80V. When the voltage on the AUXVIN
pin exceeds 60V the auxiliary bias switching regulator is
disabled.
Figure 5. Soft-Start and Output Voltage Tracking Functional Block Diagram and Transfer Curve
ISOFT-START
FAULT
VREF
V
OUT
–
+
+
FB
TK/SS
VC
EA
TRANSFER FUNCTION
FB vs TK/SS
0.1
0.2
0.4
0.3
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
FB(V)
TK/SS (V)
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4
3840 F05
LT3840
14
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For more information www.linear.com/LT3840
Switching Frequency
The choice of switching frequency is a trade-off between
converter efficiency and component size. Low frequency
operation improves efficiency by reducing MOSFET
switching losses and gate charge losses. However, lower
frequency operation requires more inductance for a given
amount of ripple current, resulting in larger inductor size.
Increasing the ripple current requires additional output
capacitance to maintain the same output ripple voltage.
For converters with extremely high or low step-down VIN
to VOUT ratios, another consideration is the minimum
on and off times of the LT3840. A final consideration for
operating frequency is in noise-sensitive systems where
it is often desirable to keep the switching noise out of a
sensitive frequency band.
The LT3840 uses a constant frequency architecture pro-
grammable with a single resistor (RT) over a 50kHz to 1MHz
range. The value of RT for a given operating frequency can
be chosen from Table 1 or from the following equation:
RT(kΩ) = 2.32 • 104 • fSW(–1.08)
Table 1. Recommended 1% Standard Values
RT (kΩ) fSW (kHz)
348 50
158 100
76.8 200
49.9 300
36.5 400
28.0 500
23.2 600
19.1 700
16.5 800
14.3 900
13.7 1000
applicaTions inForMaTion
Inductor Selection
The critical parameters for the selection of an inductor
are minimum inductance value, saturation current and
RMS current. For a given ΔIL, the inductance value is
calculated as follows:
L ≥ VOUT •
V
IN(MAX)
– V
OUT
fSW •VIN(MAX) •ΔIL
The typical range of values for ΔIL is (0.2 • IOUT(MAX)) to
(0.5 • IOUT(MAX)), where IOUT(MAX) is the maximum load
current of the supply. Using ΔIL = 0.3 • IOUT(MAX) yields a
good design compromise between inductor performance
versus inductor size and cost. A value of ΔIL = 0.3 • IOUT(MAX)
produces a ±15% of IOUT(MAX) ripple current around the DC
output current of the supply. Lower values of ΔIL require
larger and more costly magnetics. Higher values of ΔIL
will increase the peak currents, requiring more filtering
on the input and output of the supply. If ΔIL is too high,
the slope compensation circuit is ineffective and current
mode instability may occur at duty cycles greater than
50%. To satisfy slope compensation requirements the
minimum inductance is calculated as follows:
LMIN> VOUT •
2DC
MAX
–1
DCMAX
•
R
SENSE
•30
f
SW
Magnetics vendors specify the saturation current, the RMS
current or both. When selecting an inductor based on
inductor saturation current, use the peak current through
the inductor, IOUT(MAX) + ΔIL/2. The inductor saturation
current specification is the current at which the inductance,
measured at zero current, decreases by a specified amount,
typically 30%. When selecting an inductor based on RMS
current rating, use the average current through the inductor,
IOUT(MAX). The RMS current specification is the RMS current
at which the part has a specific temperature rise, typically
40°C, above 25°C ambient. After calculating the minimum
inductance value, the saturation current and the RMS
current for your design, select an off-the-shelf inductor.
Contact the Applications Group at Linear Technology for
further support. For more detailed information on selecting
an inductor, please see the Inductor Selection section of
Linear Technology Application Note 44.
LT3840
15
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For more information www.linear.com/LT3840
applicaTions inForMaTion
MOSFET Selection
Tw o external N-channel MOSFETs are used with the
LT3840 controller, one top (main) switch, and one bot-
tom (synchronous) switch. The gate drive levels are set
by the INTVCC voltage. Therefore, standard or logic level
threshold MOSFETs can be used.
Selection criteria for the power MOSFETs include break-
down voltage (BVDSS), maximum current (IOUTMAX), on-
resistance (RDSON) and gate charge.
First select a MOSFET with a BVDSS greater than VIN. Next
consider the package and current rating of the device. The
maximum current rating of the device typically corresponds
to a particular package. The RMS current of each device
is calculated below:
Top Switch Duty Cycle (DCTOP) =
V
OUT
VIN
Top Switch RMS Current = DCTOP • IOUTMAX
Bottom Switch Duty Cycle (DCBOT ) = VIN – VOUT
VIN
Bottom Switch RMS Current = DC
BOT
• I
OUTMAX
Select a device that has a continuous current rating greater
than the calculated RMS current.
Lastly, consider the RDSON and gate charge of the MOSFET.
These two parameters are considered together because
they are typically inversely proportional to one another. The
RDSON determines the conduction losses of the MOSFET
and the gate charge determines the switching losses.
The switching and conduction losses of each MOSFET
can be calculated as follows:
PCOND(TOP)=IOUT(MAX)2•
V
OUT
VIN
•RDS(ON)
PCOND(BOT)=IOUT(MAX)2•VIN – VOUT
VIN
•RDS(ON)
Note that RDSON has a large positive temperature depen-
dence. The MOSFET manufacturer’s data sheet contains
a curve, RDSON vs Temperature. In the main MOSFET,
transition losses are proportional to VIN2 and can be con-
siderably large in high voltage applications (VIN > 20V).
Calculate the maximum transition losses:
PTRAN(TOP)= VIN•IOUT •fSW •
Q
GSW
I
DRIVE
where QGSW can be found in the MOSFET specification
or calculated by:
QGSW =QGD +
Q
GS
2
and IDRIVE = 1A
The total maximum power dissipations of the MOSFET are:
PTOP(TOTAL) = PCOND(TOP) + PTRAN(TOP)
PBOT(TOTAL) = PCOND(BOT)
Complete a thermal analysis to ensure that the MOSFET’s
junction temperatures are not exceeded.
TJ = TA + P(TOTAL) • θJA
where θJA is the package thermal resistance and TA is the
ambient temperature. Keep the calculated TJ below the
maximum specified junction temperature, typically 150°C.
Note that when VIN is high and fSW is high, the transition
losses may dominate. A MOSFET with higher RDSON and
lower gate charge may provide higher efficiency. MOSFETs
with a higher voltage BVDSS specification usually have
higher RDSON and lower gate charge.
A Schottky diode can be inserted in parallel with the
synchronous MOSFET to conduct during the dead time
between the conduction of the two power MOSFETs. This
prevents the body diode of the bottom MOSFET from turn-
ing on, storing charge during the dead time and requiring
a reverse recovery period.
Input Capacitor Selection
A local input bypass capacitor is required for buck convert-
ers because the input current is pulsed with fast rise and fall
times. The input capacitor selection criteria are based on
LT3840
16
3840fa
For more information www.linear.com/LT3840
the bulk capacitance and RMS current capability. The bulk
capacitance will determine the supply input ripple voltage.
The RMS current capability is used to prevent overheating
the capacitor. The bulk capacitance is calculated based on
maximum input ripple, ΔVIN:
CIN(BULK) =
I
OUT(MAX)
•V
OUT
ΔVIN •fSW •VIN(MIN)
ΔVIN is typically chosen at a level acceptable to the user.
A good starting point is 100mV to 200mV. Aluminum
electrolytic capacitors are a good choice for high voltage,
bulk capacitance due to their high capacitance per unit area.
The capacitor’s RMS current is:
ICIN(RMS) =IOUT VOUT(VIN – VOUT)
(VIN)2
If applicable, calculate it at the worst-case condition,
VIN = 2VOUT. The RMS current rating of the capacitor
is specified by the manufacturer and should exceed the
calculated ICIN(RMS). Due to their low ESR (equivalent
series resistance), ceramic capacitors are a good choice
for high voltage, high RMS current handling. Note that the
ripple current ratings from aluminum electrolytic capacitor
manufacturers are based on 2000 hours of life. This makes
it advisable to further derate the capacitor or to choose
a capacitor rated at a higher temperature than required.
The combination of aluminum electrolytic capacitors and
ceramic capacitors is an economical approach to meeting
the input capacitor requirements. The capacitor voltage
rating must be rated greater than maximum VIN voltage.
Multiple capacitors may also be paralleled to meet size
or height requirements in the design. Locate the capaci-
tor very close to the MOSFET switch and use short, wide
PCB traces to minimize parasitic inductance. Use a small
(0.1μF to 1μF) bypass capacitor between the chip VIN pin
and GND, placed close to the LT3840.
Output Capacitor Selection
The output capacitance, COUT, selection is based on the
design’s output voltage ripple, ΔVOUT and transient load
requirements. ΔVOUT is a function of ΔIL and the COUT
ESR. It is calculated by:
∆VOUT = ∆IL•ESR+ 1
8•fSW •COUT
(
)
The maximum ESR required to meet a ΔVOUT design
requirement can be calculated by:
ESR(MAX)= ∆VOUT
(
)
L
(
)
fSW
(
)
VOUT •1– VOUT
VIN(MAX)
Worst-case ΔVOUT occurs at the highest input voltage. Use
paralleled multiple capacitors to meet the ESR require-
ments. Increasing the inductance is an option to lower the
ESR requirements. For extremely low ΔVOUT, an additional
LC filter stage can be added to the output of the supply.
Linear Technology’s Application Note 44 has some good
tips on sizing an additional output filter.
Output Voltage Programming
A resistive divider sets the DC output voltage according
to the following formula:
R2=R1 VOUT
1.250V –1
The external resistor divider is connected to the output of
the converter as shown in Figure 6.
applicaTions inForMaTion
Figure 6. Output Voltage Feedback Divider
3840 F06
FB
R2 COUT
V
OUT
L1
R1
Tolerance of the feedback resistors will add additional er-
ror to the output voltage. The VFB pin input bias current
is typically 5nA, so use of extremely high value feedback
resistors results in a converter output that is slightly
LT3840
17
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For more information www.linear.com/LT3840
higher than expected. Bias current error at the output can
be estimated as:
DVOUT(BIAS) = 5nA • R2
Great care should be taken to route the VFB line away from
noise sources, such as the inductor or the SW node.
Output Current Programming and Monitoring
The average current control loop of the LT3840 accurately
regulates the maximum output current of the switching
regulator. The default maximum differential sense volt-
age, VSENSE(MAX), is 50mV, but a voltage applied to the
ICTRL pin will program it lower. A 0V to 1V range on
the ICTRL pin corresponds to 0mV to 50mV differential
sense voltage. A way to provide the ICTRL programming
voltage is to connect a linear regulator or voltage divider
to the INTVCC pin.
Once the maximum differential sense voltage is determined
the RSENSE current sense resistor is calculated as follows:
RSENSE =
V
SENSE(MAX)
IOUT(MAX)
Select a current sense resistor where the maximum power
dissipation rating is greater than the calculated power
dissipation:
PD(RSENSE) = RSENSE • IOUT(MAX)2
The average current control loop is compensated at
the ICOMP pin with a resistor and capacitor connected
to GND.
The IMON pin is an accurate output current monitor pin. The
LT3840 outputs a voltage that is 20 times the differential
sense voltage. A 0mV to 50mV differential sense voltage
corresponds to a 0V to 1V IMON voltage. A capacitor on
the pin filters the voltage ripple due to the inductor ripple
current. Typical capacitor values on the pin range from
1000pF to 0.1µF. The larger the capacitor value, the lower
the ripple. The capacitor does not affect the average cur-
rent control loop.
Output Short-Circuit Current Foldback
The LT3840 defaults to a straight line current limit where
the short-circuit current is the same as the drop out cur-
rent. For applications that require current foldback in a
applicaTions inForMaTion
Figure 7. Output Short-Circuit Foldback Current Circuit
3840 F07
ICTRL
R1
VOUT
D1
short-circuit load condition, a diode and resistor connected
from VOUT to the ICTRL pin is recommended (see Figure 7).
The foldback current in short-circuit, IOUT(SC), is calculated
as follows:
IOUT(SC) =
(V
F(D1)
+ 7µA • R1)
20 • RSENSE
where VF is the forward voltage on the diode D1 at ~7uA
current.
Internal Power Supply
The internal auxiliary supply requires three external com-
ponents (CINTVCC, CAUXBST and LPWR) for operation, as
shown in Figure 3. CINTVCC, a 4.7μF/10V ceramic capacitor,
bypasses INTVCC. CAUXBST, a 1μF/10V ceramic capacitor,
connected between the AUXBST pin and the AUXSW1 pin,
provides bootstrapped drive to the internal switch.
A 33µH inductor with a saturation current greater than
0.6A is recommended for most applications. The Coilcraft
ME3220-333 is a good fit.
CBOOST Capacitor Selection
The recommended value of the BOOST capacitor, CBOOST,
is at least 100 times greater than the total gate capacitance
of the topside MOSFET. Typical values for most applica-
tions range from 0.1μF to 1μF.
Soft-Start and Voltage Tracking
The desired soft-start time (tSS) is programmed via the
CSS capacitor as follows:
CSS =
t
SS
• 9µA
1.75
LT3840
18
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For more information www.linear.com/LT3840
The soft-start capacitor is reset under fault conditions
including UVLO, EN, OVLO, overtemperature shutdown
and INTVCC UVLO. The soft-start pin is clamped through
a diode to the VFB pin. Therefore, the soft-start pin is reset
during a short-circuit minimizing overshoot upon recovery.
EN, UVLO and OVLO
EN has a precision voltage threshold with hysteresis to
enable the LT3840 auxiliary bias supply and synchronous
controller. The pin is typically connected to VIN through a
resistor divider, however, it can be directly connected to
VIN. A lower voltage threshold on the EN pin is used to put
the LT3840 into a low quiescent current shutdown mode.
UVLO has a precision voltage threshold with hysteresis
to enable the LT3840 synchronous controller. The pin
is typically connected to VIN through a resistor divider,
however, it can be directly connected to VIN.
OVLO has a precision voltage threshold with hysteresis
to disable the LT3840 synchronous controller. The pin is
typically connected to VIN through a resistor divider. OVLO
can be directly connected to GND to disable the function.
Switching Frequency Synchronization
The oscillator can be synchronized to an external clock.
Set the RT resistor 15% below the lowest synchronized
frequency. The rising edge of the SYNC pin waveform
triggers the discharge of the internal oscillator capacitor.
If unused, connect the SYNC pin to GND.
Layout Considerations Checklist
The following is a list of recommended layout consider-
ations:
• Locate the VIN, AUXVIN, INTVCC, AUXBST and BOOST
pin bypass capacitors in close proximity to the LT3840.
• Create a solid GND plane, preferably on layer two of
the PCB.
• Minimize the hot loop. (See Figure 9)
• Use short wide traces for the MOSFET gate drivers (TG
and BG), as well as, gate drive supply and return (INTVCC
and BOOST, BGRTN and SW).
• Connect the FB pin directly to the feedback resistors,
independent of any other nodes (i.e. SENSE+).
• Locate the feedback resistors in close proximity to the
LT3840 FB pin.
• Route the SENSE– and SENSE+ traces close together
and keep as short as possible.
• Solder the LT3840 exposed pad to the PCB. Add multiple
vias to connect the exposed pad to the GND plane.
• Per the manufacturer’s specification, add a sufficient
PCB pad around MOSFETs and inductor to dissipate
heat.
applicaTions inForMaTion
Figure 8. Precision EN, UVLO and OVLO Resistor Divider
3840 F08
EN, UVLO
OR OVLO
PIN
RA
VIN
RB
Figure 9. Hot Loop Layout for Synchronous Buck Regulator
3840 F09
HOT
LOOP
BG
TG
SW
CIN
VIN
Resistors are chosen by first selecting RB. Then calculate
RA with the following formula:
RA = RB •
V
THRESHOLD
1.25V – 1
VTHRESHOLD is the VIN referred voltage at which the supply
is enabled (UVLO and EN) or disabled (OVLO).
LT3840
19
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For more information www.linear.com/LT3840
Typical applicaTions
Wide Input Range, High Power Output, 15V to 60V Input to 12V, 20A Output
ICOMP ICTRL
IMON
AUXSW2AUXSW1AUXBST
LT3840
3840 TA02
INTVCC
BOOST
TG
SW
BG
SENSE+
SENSE–
FB
GND
VIN
VIN
15V TO 60V
EN
TK/SS
0.01µF
100pF
AUXVIN
UVLO
OVLO
PG
INTVCC
174k
887k
1µF
4.7µF 1N4448
1µF
M1
×2
M2
×2 D1
L1, 5.6µH RSENSE
2.5mΩ
M1: INFINEON, BSC160N10NS3
M2: INFINEON, BSC070N1ONS3
L1: VISHAY, IHLP6767GZER5R6MA1
L2: COILCRAFT, ME3220-333KL
CIN: SUNCON 100CE68FS
COUT1: SANYO, 16SVPF560M
COUT2: TAIYO YUDEN, EMK325BJ226MM-T
D1: DIODES INC. PDS5100H
COUT1
560µF
L2, 33µH
CIN
68µF
×2
60.4k
20k
10k
86.6k
20k
7.68k
470pF
100pF
SYNC
MODE
RT
VC
49.9k 2200pF
2200pF
COUT2
22µF
×4
VOUT
12V
20A
LT3840
20
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For more information www.linear.com/LT3840
Typical applicaTions
Low Voltage, High Current Output, 4V to 60V Input to 3.3V, 20A
Low Part Count Application, 6V to 60V Input to 5V, 10A Output
ICOMP ICTRL
IMON
AUXSW2AUXSW1AUXBST
LT3840
3840 TA03
INTVCC
BOOST
TG
SW
BG
SENSE+
SENSE–
FB
GND
VIN
V
IN
6V TO 60V
EN
470pF
AUXVIN
UVLO
OVLO
PG
1µF
4.7µF 1N4448
1µF
M1
M2
L1, 5.6µH RSENSE
5mΩ
M1: INFINEON, BSC160N10NS3
M2: INFINEON, BSC070N1ONS3
L1: VISHAY, IHLP5050
L2: COILCRAFT, ME3220-333KL
CIN: SUNCON 100CE68FS
COUT: SANYO, 16SVPC270M
L2, 33µH
CIN
68µF
×2
100k
301k
20k
SYNC
MODE
RT
VC
TK/SS
49.9k 2200pF
COUT
270µF
V
OUT
5V
10A
ICOMP ICTRL
IMON
AUXSW2AUXSW1AUXBST
LT3840
3840 TA04
INTVCC
BOOST
TG
SW
BG
SENSE+
SENSE–
GND
FB
VIN
VIN
4V TO 60V
EN
TK/SS
0.01µF
100pF
AUXVIN
UVLO
OVLO
PG
INTVCC
174k
887k
1µF
4.7µF 1N4448
1µF
M1
×2
M2
×2 D1
L1, 1.7µH
M1: INFINEON, BSC160N10NS3
M2: INFINEON, BSC070N1ONS3
L1: WÜRTH, 7443556130
L2: COILCRAFT, ME3220-333KL
CIN: SUNCON 100CE68FS
COUT1: SANYO, 16SVPF560M
COUT2: TAIYO YUDEN, EMK325BJ226MM-T
D1: DIODES INC. PDS5100H
L2, 33µH
CIN
68µF
×2
60.4k
20k
10k
16.9k
20k
7.68k
470pF
SYNC
MODE
RT
VC
RSENSE
2.5mΩ
49.9k 2200µF
2200pF
COUT2
22µF
×4
VOUT
3.3V
20A
COUT1
560µF
LT3840
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For more information www.linear.com/LT3840
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
FE28 (EA) TSSOP REV K 0913
0.09 – 0.20
(.0035 – .0079)
0° – 8°
0.25
REF
0.50 – 0.75
(.020 – .030)
4.30 – 4.50*
(.169 – .177)
1 3 4 5678 9 10 11 12 13 14
192022 21 151618 17
9.60 – 9.80*
(.378 – .386)
7.56
(.298)
3.05
(.120)
28 2726 25 24 23
1.20
(.047)
MAX
0.05 – 0.15
(.002 – .006)
0.65
(.0256)
BSC 0.195 – 0.30
(.0077 – .0118)
TYP
2
RECOMMENDED SOLDER PAD LAYOUT
EXPOSED
PAD HEAT SINK
ON BOTTOM OF
PACKAGE
0.45 ±0.05
0.65 BSC
4.50 ±0.10
6.60 ±0.10
1.05 ±0.10
7.56
(.298)
3.05
(.120)
MILLIMETERS
(INCHES) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
SEE NOTE 4
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
6.40
(.252)
BSC
FE Package
28-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663 Rev K)
Exposed Pad Variation EA
LT3840
22
3840fa
For more information www.linear.com/LT3840
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
4.00 ±0.10 2.40 REF
6.00 ±0.10
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
PIN 1
TOP MARK
(NOTE 6)
0.40 ±0.10
3837
1
2
BOTTOM VIEW—EXPOSED PAD
4.40 REF
0.75 ±0.05
R = 0.115
TYP
R = 0.10
TYP
PIN 1 NOTCH
R = 0.30 OR
0.35 × 45°
CHAMFER
0.20 ±0.05
0.40 BSC
0.200 REF
0.00 – 0.05
(UFE38) QFN 0708 REV B
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.70 ±0.05
0.20 ±0.05
0.40 BSC
2.40 REF
4.40 REF
5.10 ±0.05
6.50 ±0.05
2.65 ±0.05
3.10 ±0.05
4.50 ±0.05
PACKAGE OUTLINE
2.65 ±0.10
4.65 ±0.10
4.65 ±0.05
UFE Package
38-Lead Plastic QFN (4mm × 6mm)
(Reference LTC DWG # 05-08-1750 Rev B)
LT3840
23
3840fa
For more information www.linear.com/LT3840
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
A 8/14 Changed PG hysteresis
Modified schematic
4
20
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LT3840
24
3840fa
For more information www.linear.com/LT3840
LINEAR TECHNOLOGY CORPORATION 2014
LT 0814 REV A • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LT3840
relaTeD parTs
Typical applicaTion
PART NUMBER DESCRIPTION COMMENTS
LT3845A 60V, Low IQ, Single Output Synchronous Step-Down
DC/DC Controller Synchronizable Fixed Frequency 100kHz to 600kHz, 4V ≤ VIN ≤ 60V,
1.23V ≤ VOUT ≤ 36V, IQ = 120µA, TSSOP-16 Package
LT3844 60V, Low IQ, Single Output Step-Down DC/DC Controller Synchronizable Fixed Frequency 50kHz to 600kHz, 4V ≤ VIN ≤ 60V,
1.23V ≤ VOUT ≤ 36V, IQ = 120µA, TSSOP-16 Package
LTC3864 60V, Low IQ, Step-Down DC/DC Controller 100% Duty
Cycle Capability Selectable Fixed Frequency 200kHz to 600kHz, 3.5V ≤ VIN ≤ 60V,
0.8V ≤ VOUT ≤ VIN, IQ = 40µA, MSOP-10E Package
LTC3891 60V, Low IQ, Synchronous Step-Down DC/DC Controller Phase-Lockable Fixed Frequency 50kHz to 900kHz, 4V ≤ VIN ≤ 60V,
0.8V ≤ VOUT ≤ 24V, IQ = 50µA
LTC3890/
LTC3890-1/
LTC3890-2
60V, Low IQ, Dual 2-Phase Synchronous Step-Down
DC/DC Controller Phase-Lockable Fixed Frequency 50kHz to 900kHz, 4V ≤ VIN ≤ 60V,
0.8V ≤ VOUT ≤ 24V, IQ = 50µA
LTC3859A Low IQ, Triple Output Buck/Buck/Boost Synchronous
DC/DC Controller All Outputs Remain in Regulation Through Cold Crank, 2.5V ≤ VIN ≤ 38V,
VOUT(BUCKS) Up to 24V, VOUT(BOOST) Up to 60V, IQ = 27µA
LT8705 30V VIN and VOUT Synchronous 4-Switch Buck-Boost
Controller Synchronizable Fixed Frequency 100kHz to 400kHz, 2.8V ≤ VIN ≤ 80V,
1.3V ≤ VOUT ≤ 30V, Four Regulation Loops
Inverting Application, 24V Input to –15V, 10A
ICOMP ICTRL
IMON
AUXSW2AUXSW1AUXBST
LT3840
3840 TA05
INTVCC
BOOST
TG
SW
BG
SENSE+
SENSE–
GND
FB
VIN
VIN
18V TO 36V
EN
TK/SS
33nF
100pF
AUXVIN
UVLO
OVLO
PG
1M
1µF
4.7µF 1N4448
1µF
M1
M2 D1
L1, 15µH
M1: INFINEON, BSC160N10NS3
M2: INFINEON, BSC070N1ONS3
L1: WÜRTH, 7443631500
L2: COILCRAFT, ME3220-333KL
D1: DIODES INC. PDS5100H
L2, 33µH
CIN
68µF
×2
80.6k
10k
110k
39.2k
7.68k
470pF
SYNC
MODE
RT
VC
RSENSE
5mΩ
49.9k
VOUT
–15V
2200pF
2200pF
COUT2
330µF
×2 VOUT
–15V
10A
COUT1
10µF
×2
