PRELIMINARY INFORMATION 1 TC1232 MICROPROCESSOR MONITOR 2 FEATURES GENERAL DESCRIPTION The TC1232 is a fully-integrated processor supervisor. It provides three important functions to safeguard processor sanity: precision power on/off reset control, watchdog timer and external reset override. On power-up, the TC1232 holds the processor in the reset state for a minimum of 250msec after VCC is within tolerance to ensure a stable system start-up. Microprocessor sanity is monitored by the on-board watchdog circuit. The microprocessor must provide a periodic low-going signal on the ST input. Should the processor fail to supply this signal within the selected time-out period (150msec, 600msec or 1200msec), an out-of-control processor is indicated and the TC1232 issues a processor reset as a result. The outputs of the TC1232 are immediately driven active when the PB input is brought low by an external pushbutton switch or other electronic signal. When connected to a push-button switch, the TC1232 provides contact debounce. The TC1232 is packaged in a space-saving 8-pin plastic DIP or SOIC package and requires no external components. Precision Voltage Monitor ....................... Adjustable +4.5V or +4.75V Reset Pulse Width ............................. 250msec Min No External Components Adjustable Watchdog Timer ........................ 150msec, 600msec or 1.2sec Debounced Manual Reset Input for External Override APPLICATIONS Computers Controllers Intelligent Instruments Automotive Systems Critical P Power Monitoring ORDERING INFORMATION Part No. TC1232COA TC1232COE TC1232CPA TC1232EOA TC1232EOE TC1232EPA Package Temp. Range 8-Pin SOIC 16-Pin SOIC (Wide) 8-Pin PDIP 8-Pin SOIC 16-Pin SOIC (Wide) 8-Pin PDIP 0C to +70C 0C to +70C 0C to +70C - 40C to +85C - 40C to +85C - 40C to +85C 3 4 5 FUNCTIONAL BLOCK DIAGRAM TOL 6 RST VCC 5%/10% TOLERANCE SELECT + RESET GENERATOR - + RST REF PB RST 7 TC1232 DEBOUNCE TD WATCHDOG TIMEBASE SELECT WATCHDOG TIMER ST 8 GND TC1232-4 TELCOM SEMICONDUCTOR, INC. 11/6/96 5-19 MICROPROCESSOR MONITOR TC1232 ABSOLUTE MAXIMUM RATINGS* Voltage on Any Pin (With Respect to GND) - 0.3V to +5.8V Operating Temperature Range: TC1232C .......................................... 0C to +70C TC1232E ..................................... - 40C to + 85C Storage Temperature Range ................ - 65C to +150C Lead Temperature (Soldering, 10 sec) ................. +300C *Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS: TA = TMIN to TMAX; VCC = +4.5V to 5.5V, unless otherwise specified. Symbol Parameter VCC VIH Supply Voltage ST and PB RST Input High Level ST and PB RST Input Low Level Input Leakage ST, TOL Output Current RST Current RST, RST Operating Current VCC 5% Trip Point (Note 3) VCC 10% Trip Point (Note 3) VIL IL IOH IOL ICC VCCTP VCCTP Test Conditions Min Typ Max Unit 4.5 2.0 5.0 -- 5.5 VCC +0.3 V V - 0.3 -- +0.8 V VOH = 2.4V VOL = 0.4V Note 2 TOL = GND TOL = VCC - 1.0 - 1.0 2.0 -- 4.50 4.25 -- -12 10 50 4.62 4.37 +1.0 -- -- 200 4.74 4.49 A mA mA A V V Test Conditions Min Typ Max Units -- -- -- -- 5 7 pF pF Note 1 CAPACITANCE (Note 4): TA = +25C Symbol Parameters CIN COUT Input Capacitance ST, TOL Output Capacitance RST, RST AC ELECTRICAL CHARACTERISTICS: TA = TMIN to TMAX; VCC = +5V to +10%, unless otherwise specified. Symbol Parameters Test Conditions Min Typ Max Units tPB tPBD tRST tST tTD PB RST (Note 5) PB RST Delay Reset Active Time ST Pulse Width ST Time-out Period Figure 3 Figure 3 20 1 250 75 -- 4 610 -- -- 20 1000 -- msec msec msec nsec 62.5 250 500 10 150 600 1200 -- 250 1000 2000 -- msec msec msec sec tF 5-20 VCC Fall Time (Note 4) Figure 4 Figure 4 TD Pin = 0V TD Pin = Open TD Pin = VCC Figure 5 TELCOM SEMICONDUCTOR, INC. MICROPROCESSOR MONITOR 1 TC1232 AC ELECTRICAL CHARACTERISTICS: (Cont.) TA = TMIN to TMAX; VCC = +5V to +10%, unless otherwise specified. Symbol Parameter Test Conditions tR tRPD VCC Rise Time (Note 4) VCC Detect to RST High and RST Low VCC Detect to RST High and RST Open (Note 6) tRPU NOTES: 1. 2. 3. 4. 5. 6. Min Typ Max Units Figure 6 Figure 7, VCC Falling 0 -- -- -- -- 100 sec nsec Figure 8, VCC Rising 250 610 1000 msec 2 3 PB RST is internally pulled up to VCC with an internal impedance of typically 40k. Measured with outputs open. All voltages referenced to GND. Guaranteed by design. PB RST must be held low for a minimum of 20msec to guarantee a reset. tR = 5sec. PIN CONFIGURATIONS PB RST TD TOL 1 8 VCC 2 7 ST 6 RST 5 RST 3 GND TC1232CPA TC1232EPA 4 16-Pin SOIC Wide 8-Pin SOIC 8-Pin PDIP PB RST 1 8 VCC NC 1 16 NC TD 2 7 ST PB RST 2 15 VCC 3 14 NC 3 6 RST NC TOL TD 4 13 ST GND 4 5 RST TC1232COA TC1232EOA NC 5 TOL 6 NC 7 10 NC GND 8 9 RST TC1232COE TC1232EOE 4 12 NC 11 RST 5 PIN DESCRIPTION Pin No. Pin No. Pin No. (8-Pin PDIP) (8-Pin SOIC) (16-Pin SOIC) Symbol Description 1 1 2 2 2 4 3 3 6 4 5 4 5 8 9 6 7 8 6 7 8 11 13 15 1, 3, 5, 7, 10, 12, 14, 16 TELCOM SEMICONDUCTOR, INC. PB RST Push-button Reset Input. A debounced active-low input that ignores pulses less than 1msec in duration and is guaranteed to recognize inputs of 20msec or greater. TD Time Delay Set. The watchdog time-out select input (tTD = 150msec for TD = 0V, tTD = 600msec for TD = open, tTD = 1.2sec for TD = VCC). TOL Tolerance Input. Connect to GND for 5% tolerance or to VCC for 10% tolerance. GND Ground. RST Reset Output (Active High) - goes active: 1. If VCC falls below the selected reset voltage threshold 2. If PB RST is forced low 3. If ST is not strobed within the minimum time-out period 4. During power-up RST Reset Output (Active Low, Open Drain) - see RST. ST Strobe Input. Input for watchdog timer. VCC The +5V Power-Supply Input. NC No Internal Connection. 5-21 6 7 8 MICROPROCESSOR MONITOR TC1232 DETAILED DESCRIPTION Power Monitor The TC1232 detects out-of-tolerance power supply conditions and warns a processor-based system of an impending power failure. When VCC is detected as below the preset level defined by TOL, the VCC comparator outputs the signals RST and RST. If TOL is connected to ground, the RST and RST signals become active as VCC falls below 4.75 volts. If TOL is connected to VCC, the RST and RST become active as VCC falls below 4.5 volts. Because the processing is stopped at the last possible moment of valid VCC, the RST and RST are excellent control signals for a P. The reset outputs will remain in their active states until VCC has been continuously in-tolerance for a minimum of 250msec allowing the power supply and P to stabilize before RST is released. mode and set it low while in the background or interrupt mode. If both modes do not execute correctly, the watchdog timer issues reset pulses. Supply Monitor Noise Sensitivity The TC1232 is optimized for fast response to negativegoing changes in VDD. Systems with an inordinate amount of electrical noise on VDD (such as systems using relays), may require a 0.01F or 0.1F bypass capacitor to reduce detection sensitivity. This capacitor should be installed as close to the TC1232 as possible to keep the capacitor lead length short. +5V VCC Push-button Reset Input TD ST PB RST The debounced manual reset input (PB RST) manually forces the reset outputs into their active states. Once PB RST has been low for a time tPBD, the push-button delay time, the reset outputs go active. The reset outputs remain in their active states for a minimum of 250msec after PB RST rises above VIH (Figure 3). A mechanical push-button or active logic signal can drive the PB RST input. The debounced input ignores input pulses less than 1msec and is guaranteed to recognize pulses of 20msec or greater. No external pull-up resistor is required because the PB RST input has an internal pull-up to VCC of approximately 100A. I/O MICROPROCESSOR RST RESET TC1232 GND TOL Figure 1. Push-button Reset Watchdog Timer When the ST input is not stimulated for a preset time period, the watchdog timer function forces RST and RST signals to the active state. The preset time period is determined by the TD inputs to be 150msec with TD connected to ground, 600msec with TD floating, or 1200msec with TD connected to VCC, typical. The watchdog timer starts timing out from the set time period as soon as RST and RST are inactive. If a high-to-low transition occurs on the ST input pin prior to time-out, the watchdog timer is reset and begins to time-out again. If the watchdog timer is allowed to time-out, then the RST and RST signals are driven to the active state for 250msec minimum (Figure 2). The software routine that strobes ST is critical. The code must be in a section of software that is executed frequently enough so the time between toggles is less than the watchdog time-out period. One common technique controls the P I/O line from two sections of the program. The software might set the I/O line high while operating in the foreground 5-22 +5V 10K 3 -TERMINAL REGULATOR +5V VCC 0.1 F RST RESET MICROPROCESSOR TC1232 ST TD I/O TOL GND Figure 2. Watchdog Timer TELCOM SEMICONDUCTOR, INC. MICROPROCESSOR MONITOR 1 TC1232 2 tPB tF tPBD PB RST VIH VCC VIL 3 tRST +4.75V RST +4.25V RST Figure 3. Push-button Reset. The debounced PB RST input ignores input pulses less than 1msec and is guaranteed to recognize pulses of 20msec or greater 4 Figure 5. Power-Down Slew Rate PUSH-BUTTON RESET 5 tST ST tR +4.75V tTD 6 +4.25V NOTE: tTD IS THE MAXIMUM ELAPSED TIME BETWEEN ST HIGH-TO-LOW TRANSITIONS (ST IS ACTIVATED BY FALLING EDGES ONLY) WHICH WILL KEEP THE WATCHDOG TIMER FROM FORCING THE RESET OUTPUTS ACTIVE FOR A TIME OF tRST. tTD IS A FUNCTION OF THE VOLTAGE AT THE TD PIN, AS TABULATED BELOW. tTD CONDITON MIN TYP MAX TD PIN = 0V TD PIN = OPEN TD PIN = VCC 62.5msec 250msec 500msec 150msec 600msec 1200msec 250msec 1000msec 2000msec Figure 4. Strobe Input VCC 7 Figure 6. Power-Up Slew Rate 8 TELCOM SEMICONDUCTOR, INC. 5-23 MICROPROCESSOR MONITOR TC1232 VCC = 5V 4.6V (5% TRIP POINT) +4.5V (5% TRIP POINT) 4.5V(10% TRIP POINT) +4.25V (10% TRIP POINT) VCC tRPD RST tRPU RST VOH VOH RST VOL RST VOL VCC SLEW RATE = 1.66mV/sec (0.5V/300sec) Figure 7. VCC Detect Reset Output Delay (Power-Down) 5-24 Figure 8. VCC Detect Reset Output Delay (Power-Up) TELCOM SEMICONDUCTOR, INC.