1
FEATURES
APPLICATIONS
DESCRIPTION
VGH1
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
OUT9
OUT10
VGL
VGH2
+
-OUT
AVDD
POS
NEG
GND
TPS65190
www.ti.com
.......................................................................................................................................................................................... SLVS881 – SEPTEMBER 2009
10-Channel Level Shifter and VCOM Buffer
The uncommitted high-speed operational amplifierfeatures a high slew rate and high peak current•10-Channel Level Shifter, Organized as Two
capability that make it particularly suitable for drivingGroups of 8 + 2 Channels
the panel ’ s common rail (V
COM
).•Separate Positive Supplies (V
GH
) for EachGroup
•V
GH
Levels up to 38V•V
GL
Levels down to – 13V•Logic Level Inputs•High Peak Output Currents•High-Speed V
COM
Buffer•28-Pin 5x5 mm QFN Package
•Large Format LCD Displays using GIPTechnology
The TPS65190 is a combined multi-channellevel-shifter and V
COM
buffer intended for use in largeformat LCD display applications such as TVs andmonitors. The device converts the logic-level signalsgenerated by the Timing Controller (T-CON) to thehigh-level gate drive signals used by the displaypanel and amplifies/buffers an externally generatedV
COM
voltage.
The 10 level shifter channels are organized as 2groups, each with its own positive supply. Channels1-6 and 9-10 are supplied by V
GH1
and channels 7-8are supplied by V
GH2
. The two positive supplies canbe tied together if one positive supply voltage is usedfor all level shifter channels. Both level shifter groupsuse the same negative supply V
GL.
The level-shifters feature low impedance outputstages that achieve fast rise and fall times even whendriving significant capacitive loads.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2009, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATINGS
RECOMMENDED OPERATING CONDITIONS
TPS65190
SLVS881 – SEPTEMBER 2009 ..........................................................................................................................................................................................
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
(1)
T
A
ORDERING PACKAGE PACKAGE MARKING
– 40 to 85 ° C TPS65190RHDR 28-Pin QFN TPS65190
(1) The device is supplied taped and reeled, with 3000 devices per reel.
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE UNIT
Voltage on VGH1, VGH2
(2)
45 VVoltage on VGL
(2)
– 15 VVoltage on AVDD
(2)
20 VVoltage on IN1 through IN10
(2)
– 0.3 to 7.0 VVoltage on POS, NEG
(2)
– 0.3 to V
AVDD
+ 0.3 VDifferential voltage between POS and NEG ± V
AVDD
VESD Rating HBM 2 kVESD Rating MM 200 VESD Rating CDM 700 VContinuous power dissipation See Dissipation Rating TableT
A
Operating ambient temperature range – 40 to 85 ° CT
J
Operating junction temperature range – 40 to 150 ° CT
STG
Storage temperature range – 65 to 150 ° C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratingsonly and functional operation of the device at these or any other conditions beyond those indicated under recommended operatingconditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) Voltage values are with respect to the GND pin
PACKAGE θ
JA
T
A
≤25 ° C T
A
= 70 ° C T
A
= 85 ° CPOWER RATING POWER RATING POWER RATING
28-Pin QFN
(1)
35 ° C/W 3.57 W 2.29 W 1.86 W
(1) Refer to application section on how to improve thermal resistance θ
JA
.
MIN TYP MAX UNIT
V
GH1
12 30 38Positive supply voltage range VV
GH2
12 30 38V
GL
Negative supply voltage range – 2 – 6.2 -13 VV
IN
Level shifter input voltage range 3 3.3 5 VV
AVDD
Operational amplifier positive supply voltage range 8 15 20 VV
POS
, V
NEG
Operational amplifier common-mode input voltage range 1 0.5 x V
AVDD
-1 VV
AVDD
T
A
Operating ambient temperature – 40 85 ° CT
J
Operating junction temperature – 40 125 ° C
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ELECTRICAL CHARACTERISTICS
TPS65190
www.ti.com
.......................................................................................................................................................................................... SLVS881 – SEPTEMBER 2009
V
GH1
= V
GH2
= 30 V; V
GL
= – 6.2 V; V
AVDD
= 15 V; T
A
= – 40 ° C to 85 ° C; typical values are at 25 ° C unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
LEVEL SHIFTER
I
GH1
V
GH1
Supply current IN1 to IN10 = GND 0.18 1 mAI
GH2
V
GH2
Supply current IN1 to IN10 = GND 0.012 0.1 mAI
GL
V
GL
Supply current IN1 to IN10 = GND 0.015 0.1 mAI
OUTX
Peak output current Channels 1-8, sourcing 490 mAChannels 1-8, sinking 850Channels 9-10, sourcing 250Channels 9-10, sinking 450I
INX
Input current Channels 1-10, inputs connected to GND -0.003 ± 1 µAChannels 1-10, inputs connected to 3.3 V -0.002 ± 1V
IH
High level input threshold Channels 1 through 10 2.0 VV
IL
Low level input threshold Channels 1 through 10 0.5 VV
DROPH
Output voltage drop high Channels 1 through 8, I
OUT
= 10 mA 0.19 0.4 VChannels 9 and 10, I
LOAD
= 10 mA 0.36 1V
DROPL
Output voltage drop low Channels 1 through 8, I
OUT
= – 10 mA 0.06 0.4 VChannels 9 and 10, I
OUT
= – 10 mA 0.11 1t
R
Rise time Channels 1 through 8. C
OUT
= 4.7 nF
(1)
404 600 nsChannels 9 and 10. C
OUT
= 4.7 nF
(1)
740 950t
F
Fall time Channels 1 through 8. C
OUT
= 4.7 nF
(1)
192 370 nsChannels 9 and 10. C
OUT
= 4.7 nF
(1)
377 700t
PH
Rising edge, C
OUT
= 150 pF 27 nsPropagation delayt
PL
Falling edge, C
OUT
= 150 pF 40
OPERATIONAL AMPLIFIER
I
AVDD
Supply current V
CM
= 7.5 V, unity gain, no load 5.4 mAV
OS
Input offset voltage V
CM
= 7.5 V 1 ± 20 mVI
IB
Input bias current V
CM
= 7.5 V 0.001 ± 0.1 µAV
CM
Common-mode input voltage range V
AVDD
= 8 V to 20 V 1 V
AVDD
– 1 VCMRR Common mode rejection ratio V
CM
= 1 V to 14 V, 1 Hz, no load 93 dBA
VOL
Open loop gain V
OUT
= 0.5 V to 14.5 V, no load 88 dBV
DROPL
Output voltage drop low I
O
= – 10 mA 52 200 mVV
DROPH
Output voltage drop high I
O
= 10 mA 85 200 mVPSRR Power supply rejection ratio Measured at 1 Hz 90 dBBW Small signal unity gain bandwidth – 3 dB, V
IN
= 100 mV
PP
76 MHzSlew rate, rising A
V
= 1, V
CM
=7.5 V, V
IN
= 2 V
PP
66SR V/ µsSlew rate, falling 53I
O
Output current Peak. V
CM
= 7.5 V ± 200 ± 450V
OUT
= 13 V, sourcing 100 225 mAV
OUT
= 2 V, sinking – 100 317I
SC
Short circuit current OUT shorted to GND or AVDD
(2)
± 250 ± 498 ± 900 mA
(1) Rise and fall times are measured between 10% and 90% of the waveform ’ s maximum amplitude.(2) To prevent overheating, short-circuit conditions must not be allowed to persist indefinitely. The maximum allowable duration ofshort-circuit conditions will be determined by the IC ’ s junction-to-ambient thermal resistance ( θ
JA
) and the ambient temperature of theapplication.
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DEVICE INFORMATION
PIN ASSIGNMENT
IN7
1
IN6
2
IN5
3
IN4
4
5
IN9
6
IN8
IN2
8
IN1
9
VGH1 10
VGL 11
VGH2 12
OUT1 13
IN10
28
NEG
27
POS
26
OUT
25
AVDD
24
GND
23
OUT9
21
OUT8
20
OUT7
19
OUT6
18
OUT5
17
OUT4
16
Exposed
ThermalDie
IN3 7OUT3
15
OUT2 14 OUT10
22
TOP VIEW
TPS65190
SLVS881 – SEPTEMBER 2009 ..........................................................................................................................................................................................
www.ti.com
PIN FUNCTIONS
PIN
I/O DESCRIPTIONNAME NO.
IN9 1 I Level shifter channel 9 inputIN8 2 I Level shifter channel 8 inputIN7 3 I Level shifter channel 7 inputIN6 4 I Level shifter channel 6 inputIN5 5 I Level shifter channel 5 inputIN4 6 I Level shifter channel 4 inputIN3 7 I Level shifter channel 3 inputIN2 8 I Level shifter channel 2 inputIN1 9 I Level shifter channel 1 inputVGH1 10 P Positive supply for level shifter channels 1-6 and 9-10VGL 11 P Negative supply voltage for all level shifter channelsVGH2 12 P Positive supply for level shifter channels 7-8OUT1 13 O Level shifter channel 1 outputOUT2 14 O Level shifter channel 2 outputOUT3 15 O Level shifter channel 3 outputOUT4 16 O Level shifter channel 4 outputOUT5 17 O Level shifter channel 5 outputOUT6 18 O Level shifter channel 6 outputOUT7 19 O Level shifter channel 7 outputOUT8 20 O Level shifter channel 8 outputOUT9 21 O Level shifter channel 9 outputOUT10 22 O Level shifter channel 10 outputGND 23 P Ground connection for level shifter and operational amplifier.AVDD 24 P Operational amplifier positive supplyOUT 25 O Operational amplifier outputNEG 26 I Operational amplifier inverting inputPOS 27 I Operational amplifier non-inverting input
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TYPICAL CHARACTERISTICS
TABLE OF GRAPHS
OUTPUTRISETIME
CHANNELS1-8,C =4.7nF
OUT
V
10V/div
OUT
RISETIME=457ns
MEASUREDBETWEEN10%
AND90%OFVOUT
200ns/div
OUTPUTRISETIME
CHANNELS1-8,C =8pF
OUT
V
10V/div
OUT
RISETIME=3.8ns
MEASUREDBETWEEN10%
AND90%OFVOUT
10ns/div
TPS65190
www.ti.com
.......................................................................................................................................................................................... SLVS881 – SEPTEMBER 2009
PIN FUNCTIONS (continued)
PIN
I/O DESCRIPTIONNAME NO.
IN10 28 I Level shifter channel 10 inputExposed Thermal Die P Connect to the system V
GL
connection.
LEVEL SHIFTER
Rise time Channels 1-8, C
OUT
= 8 pF Figure 1Channels 1-8, C
OUT
= 4.7 nF Figure 2Channels 9-10, C
OUT
= 8 pF Figure 3Channels 9-10, C
OUT
= 4.7 nF Figure 4Fall time Channels 1-8, C
OUT
= 8 pF Figure 5Channels 1-8, C
OUT
= 4.7 nF Figure 6Channels 9-10, C
OUT
= 8 pF Figure 7Channels 9-10, C
OUT
= 4.7 nF Figure 8Propagation delay, channels 1 to 8 Channels 1-8, rising, C
OUT
= 8 pF Figure 9Channels 1-8, falling, C
OUT
= 8 pF Figure 10Channels 9-10, rising, C
OUT
= 8 pF Figure 11Channels 9-10, falling, C
OUT
= 8 pF Figure 12Peak output current Channels 1-8, C
OUT
= 10 nF Figure 13Channels 9-10, C
OUT
= 10 nF Figure 14Output voltage drop Output low Figure 15Output high Figure 16
OPERATIONAL AMPLIFIER
Small signal frequency response V
CM
= 7.5 V, V
IN
= 100 mV
PP
Figure 17Output voltage drop Figure 18Slew rate Output rising, C
OUT
= 150 pF Figure 19Output falling, C
OUT
= 150 pF Figure 20
Figure 1. Figure 2.
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OUTPUTRISETIME
CHANNELS9-10,C =4.7nF
OUT
V
10V/div
OUT
RISETIME=904ns
MEASUREDBETWEEN10%
AND90%OFVOUT
500ns/div
OUTPUTRISETIME
CHANNELS9-10,C =8pF
OUT
V
10V/div
OUT
RISETIME=5.4ns
MEASUREDBETWEEN10%
AND90%OFVOUT
10ns/div
OUTPUTFALL TIME
CHANNELS1-8,C =4.7nF
OUT
V
10V/div
OUT
FALL TIME=204ns
MEASUREDBETWEEN90%
AND10%OFVOUT
200ns/div
OUTPUTFALL TIME
CHANNELS1-8,C =8pF
OUT
V
10V/div
OUT
FALL TIME=6.4ns
MEASUREDBETWEEN90%
AND10%OFVOUT
200ns/div
OUTPUTFALL TIME
CHANNELS9-10,C =4.7nF
OUT
V
10V/div
OUT
FALL TIME=387ns
MEASUREDBETWEEN90%
AND10%OFVOUT
500ns/div
OUTPUTFALL TIME
CHANNELS9-10,C =8pF
OUT
V
10V/div
OUT
FALL TIME=7.2ns
MEASUREDBETWEEN90%
AND10%OFVOUT
10ns/div
TPS65190
SLVS881 – SEPTEMBER 2009 ..........................................................................................................................................................................................
www.ti.com
Figure 3. Figure 4.
Figure 5. Figure 6.
Figure 7. Figure 8.
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PROPAGATIONDELAY RISING
IN-OUT,CHANNELS1-8,C =8pF
–
OUT
10ns/div
V
10V/div
OUT
V
1V/div
IN
DELAY=21ns
MEASUREDBETWEEN50%
OFV AND50%OFV
IN OUT
PROPAGATIONDELAY FALLING
IN-OUT,CHANNELS1-8,C =8pF
–
OUT
10ns/div
V
10V/div
OUT
V
1V/div
IN
DELAY=33ns
MEASUREDBETWEEN50%
OFV AND50%OFV
IN OUT
PROPAGATIONDELAY FALLING
IN-OUT,CHANNELS9-10,C =8pF
–
OUT
DELAY=31ns
MEASUREDBETWEEN50%
OFV AND50%OFV
IN OUT
V
10V/div
OUT
10ns/div
V
1V/div
IN
PROPAGATIONDELAY RISING
IN-OUT,CHANNELS9-10,C =8pF
–
OUT
DELAY=22ns
MEASUREDBETWEEN50%
OFV AND50%OFV
IN OUT
10ns/div
V
10V/div
OUT
V
1V/div
IN
PEAKOUTPUTCURRENT
CHANNELS1-8,C =10nF
OUT
POSITIVEI =444mA
NEGATIVEI =820mA
PK
PK
5µs/div
I
200mA/div
OUT
PEAKOUTPUTCURRENT
CHANNELS9-10,C =10nF
OUT
5µs/div
POSITIVEI =240mA
NEGATIVEI =420mA
PK
PK
I
200mA/div
OUT
TPS65190
www.ti.com
.......................................................................................................................................................................................... SLVS881 – SEPTEMBER 2009
Figure 9. Figure 10.
Figure 11. Figure 12.
Figure 13. Figure 14.
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LEVEL SHIFTER
OUTPUTVOLTAGEDROP LOW
CH9-CH10
CH1-CH8
0.0
0.5
1.0
1.5
2.0
2.5
0 10 20 30 40 50
Output Current (mA)
Output Voltage Drop High (V)
LEVEL SHIFTER
OUTPUTVOLTAGEDROP HIGH
CH9-CH10
CH1-CH8
OPERATIONAL AMPLIFIER
SMALL SIGNAL FREQUENCY RESPONSE
Frequency
1kHz
1MHz
V =100mV
UNITY GAIN
-3dB=76MHz
IN PP
0dB
-3dB/DIV
TPS65190
SLVS881 – SEPTEMBER 2009 ..........................................................................................................................................................................................
www.ti.com
Figure 15.
Figure 16.
Figure 17.
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OPERATIONAL AMPLIFIER
OUTPUTVOLTAGEDROP
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
0 20 40 60 80 100 120 140 160 180 200
Output Current (mA)
Output Voltage Drop (V)
O/P HIGH
O/P LOW
OPERATIONAL AMPLIFIER
POSITIVESLEWRATE,C =150pF
OUT
V
500mV/div
OUT
50ns/div
V =±1V
UNITY GAIN
SR=73V/µs
IN PP
OPERATIONAL AMPLIFIER
NEGATIVESLEWRATE,C =150pF
OUT
V
500mV/div
OUT
50ns/div
V =±1V
UNITY GAIN
SR=60V/µs
IN PP
TPS65190
www.ti.com
.......................................................................................................................................................................................... SLVS881 – SEPTEMBER 2009
Figure 18.
Figure 19.
Figure 20.
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DETAILED DESCRIPTION
APPLICATION INFORMATION
TPS65190
SLVS881 – SEPTEMBER 2009 ..........................................................................................................................................................................................
www.ti.com
The TPS65190 contains 10 level shifter channels and one high-speed operational amplifier.
The 10 level shifter channels are organized in two groups: the first group, comprising channels 1-6 and 9-10 ispowered from V
VGH1
and V
GL
; the second group, comprising channels 7 and 8 is powered from V
GH2
and V
GL
.Channels 1 to 8 are optimized for high speed operation while channels 9 and 10 operate a little slower.
All level shifter channels feature the same input circuitry and are compatible with the standard logic-level signalsgenerated by timing controllers in typical applications. The output circuitry has been designed to achieve highrise and fall times when driving the capacitive loads typically encountered in LCD display applications
The input and output stages of the operational amplifier extend close to both supply rails and the output stagehas been optimized to supply the fast transient currents typical in V
COM
applications.
It is recommended to use high quality ceramic capacitors to decouple each supply pin. In typical applications 10µF is recommended for V
GH1
and V
GL
, while 1 µF is normally sufficient for V
GH2
.
Use level shifter channels 1 to 8 for high-speed clock signals and use channels 9 to 10 for lower-speed signals(see Figure 14). The inputs of any unused level shifter channels should be tied to GND. The outputs of anyunused level shifter channels should be left floating.
It is recommended to use low-value feedback resistors with the VCOM buffer to minimize the effects of straycapacitance at its inverting input. Using high value feedback resistors can cause excessive peaking in theamplifier ’ s gain response (caused by pole formed by the feedback resistor and the stray capacitance). If theVCOM buffer is used in a unity gain configuration, the flattest gain response is achieved using a directconnection between the amplifier's output and inverting input.
If the VCOM buffer is not used, tie AVDD, its inverting and non-inverting inputs, and its output to GND.
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OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
OUT8
OUT9
VGL
VGH2
VGH1
OUT
POS
GND
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
START
ODD
EVEN
16V
-7V
+28V
+28V
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
START
ODD
EVEN
VCOM
FromT-CON
ToPanel
OUT9
EVEN
OUT10
IN10
AVDD
NEG
10µF
1µF
10µF
1µF 10k
10k
PCB LAYOUT
TPS65190
www.ti.com
.......................................................................................................................................................................................... SLVS881 – SEPTEMBER 2009
Figure 21. Typical Application Circuit
Proper PCB layout is essential if the TPS65190 ’ s specified performance is to be achieved, and the followingbasic steps should be followed as a minimum:1. Use high quality ceramic decoupling capacitors, placed as close as possible to the IC pins they aredecoupling
2. Use short, wide tracks to route power to the IC3. Ensure that the PCB ’ s thermal design is adequate to dissipate power away from the IC
The TPS65190 is supplied in a 28-Pin QFN thermally enhanced package designed to eliminate the use of bulkyheat sinks and slugs. In order to benefit from these superior thermal properties PCB layout and manufacturingshould follow the guidelines contained in the following application reports, available for free download fromhttp://www.ti.com .•Application Report – QFN Layout Guidelines (SLOA122 )•Application Report – QFN/SON PCB Attachment (SLUA271 A)
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PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TPS65190RHDR ACTIVE VQFN RHD 28 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 8-Dec-2009
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS65190RHDR VQFN RHD 28 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 8-Dec-2009
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS65190RHDR VQFN RHD 28 3000 346.0 346.0 29.0
PACKAGE MATERIALS INFORMATION
www.ti.com 8-Dec-2009
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
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