a HARRIS August 1991 2N6904 N-Channel Logic Level Power MOS Field-Effect Transistors (L2FET) Features * 8A, 200V * TDS(on) = 9.62 * SOA is Power-Dissipation Limited Nanosecond Switching Speeds e Linear Transfer Characteristics * High Input Impedance * Majority Carrier Device Design Optimized for 5V Gate Drive e Can be Driven Directly from QMOS, NMOS, TTL Circuits * Compatible with Automotive Drive Requirements Package TO-204AA BOTTOM VIEW DRAIN SOURCE / (FLANGE) Terminal Diagram N-CHANNEL ENHANCEMENT MODE Description D The 2N6904 is an N-channel enhancement-mode silicon-gate power MOS field-effect transistor specifically designed for use with logic level (5V) driving sources in applications such as programma- ble controllers, automotive switching, and solenoid drivers. This per- formance is accomplished through a special gate oxide design G which provides full rated conduction at gate biases in the 3V - 5V range, therefore facilitating true on-off power control directly from logic circuit supply voltages. s The 2N6904 is supplied in the JEDEC TO-204AA steel package. Absolute Maximum Ratings (Tc = +25C), Unless Otherwise Specified 2N6904 UNITS Drain-Source Voltage 0.0.0... ccc cee cece erence nett ane ennerueetenetenesebereunnes Vos 200* Vv Drain-Gate Voltage (RGS = IMD) 20... ete ene teen eee e teens teen eee VDGR 200* v Continuous Drain Current To F259 cen ener re ene e ett n eed d ee tate e beta een b es 8* A Pulsed Drain Current 20* A Gate-Source Voltage +10* Vv Maximum Power Dissipation TOE H25OC cece ence nee nee ede tee tent ee eat badd scat enn t en neepenens 75* Ww Above Tc = +25C, Derate Linearly 0.6* Ww/9C Operating and Storage Junction Temperature Range.......2... ec ececee ce accceeeeesevavs -55 to +150* C Maximum Lead Temperature for Soldering ............ccccceeececceveceuetctenetenetevuennene 260* At distance > 1/8 in. (3.17mm) from seating plane for 10s max *JEDEC registered values CAUTION: These devices are sensitive to electrostatic discharge. Proper I.C. handling procedures shauld be followed. File Number 1 880.1 Copyright Harris Corparation 1991 6-15 mw - Wo Js Qe Ow Os Ad a + Specifications 2NG904 ELECTRICAL CHARACTERISTICS at Case Temperature (Tc = 25C) unless otherwise specified LIMITS CHARACTERISTIC TEST CONDITIONS UNITS MIN. MAX, Drain-Source Breakdown Voltage BVoss lo = 1MA, Vas = 0 200 Vv Gate Threshold Voltage Vas(th) Vas = Vos, lpn = 1 mA 1 2 Vv Zero Gate Voltage Drain Current loss Vos = 160 V 1 Tc = 125C, Vos = 160 V _ 50 uA Gate-Source Leakage Current lass Vas = +10 V, Vos = 0 _ 100 nA Drain-Source On Voitage Vos(on)@ lo = 5.1 A, Ves = 5 V _ 3.06 y lo = 6A, Vas =5V - 6.5 Static Drain-Source On Resistance Tos(on) lp=5.1A _ 0.6 a Te=125 C, Ip=5.1 A, Ves=5 V 1.11 Forward Transconductance Ore" Vos = 5 V, Ip = 5.1A 3 12 mho Input Capacitance Cis Vos = 25 V 350 900 Output Capacitance Coss Vas = OV 75 250 pF Reverse-Transfer Capacitance Cran f= 0.1 MHz 20 100 Turn-On Delay Time ta(on) Vpo = 100 V _ 45 Rise Time tr Ip =5.1A _ 150 Turn-Off Delay Time ta(off) Roen = Roe = 150 _ 135 ns Fall Time tr Vas = 5 V 150 Thermal Resistance Junction-to-Case Roc - 1.67 C/W SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS LIMITS CHARACTERISTIC TEST CONDITIONS UNITS MIN. MAX. Diode Forward Voltage Vsn Isn = BA 0.8 1.6 Vv Reverse Recovery Time tr lR=4A dir/de = 100 A/ps ~ 625 ns * In accordance with JEDEC registration data. Pulsed: Pulse duration = 300 ys, max., duty cycle = 2%. 2N6904 eH CASE TEMPERATURE( Te }= 25C + (CURVES MUST BE DERATED LINEARLY WITH INCREASE IN TEMPERATURE) Ops SES athe OPERATION IN THIS AREA pl 4,-| Tipe tet bob IS LIMITED BY 'p fan] re M DRAIN CURRENT {Ip)A rile . aa Vpsg(MAX)= 200V (2N6904) 2 2 4 6 B 1 8 100 1000 DRAIN -TO-SOURCE VOLTAGE (Vps5) V 92CM- 40710 Fig, 1 - Maximum safe operating areas. oO LOGIC LEVEL POWER MOSFETs = a oO > oo POWER DISSIPATION (P7)-W wl 2 K a oS > a 2 xz a i] ina x - w ra a eo a iy N a 4 = 5 z o 50 { 150 CASE TEMPERATURE (Toy TC coras JUNCTION TEMPERATURE (Ty )- C e2cs-a0735 Fig. 2 - Power dissipation vs. temperature derating curve. Fig. 3 - Typical normalized gate threshold voltage as a function of junction temperature. Vps7 5 PULSE TEST PULSE DURATION = 80xs DUTY CYCLE < 2% Ip: 544 Vegt +5V 5 a w 2 z a Ee 2 a iw x z 5 ON-STATE DRAIN CURRENT (Tp (onl]~4 Tes -40C 1 2 JUNCTION TEMPERATURE (T) }C GATE-TO- SOURCE VOLTAGE (Vggi-V 9205-40736 g2cs-407s4 2N6904 Veg *5V TEST DURATION = BOs CYCLE 32% ie DRAIN-TO-SOURCE RESISTANCE Oo 5 lo 5 DRAIN CURRENT (IplA 92CS-37224 Fig. 6 - Typical drain-to-source on resistance as a function of drain current. Vggt lov PULSE TEST PULSE DURATION =80 ps DUTY CYCLE < 2% 1 o gy w 2 e 2 So 2 o 35 ao Zz a a & o a = x So a DRAIN CURRENT ( Ip)-Aa 92CS-37226 Fig. 8 - Typical forward transconductance as a function of drain current. (N= 1 MHz 4 a 1 2 a o z a E 3 2 a <q 3 Cras oO 10 20 30 40 50 ORAIN-TO- SOURCE VOLTAGE (Vpg}V 92CS- 37225 Fig. 7 - Capacitance as a function of drain-to-source voltage. 190 TQ SCOPE 100Vv KELVIN CONTACT ~~--~---4 + g2cs- 40742 Fig. 9 - Switching time test circuit.