VND5025B2K-E - STMicroelectronics, Inc.

August 2010 Doc ID 13374 Rev 6 1/32

VND5025BK-E

Double channel high-side driver with analog current sense

for automotive applications

Features

■Features

– In-rush current active management by

power limitation

– Very low standby current

– 3.0 V CMOS compatible input

– Optimized electromagnetic emission

– Very low electromagnetic susceptibility

– In compliance with the 2002/95/EC

European directive

– Two classes with different ‘K@3A’ ranges

– Package: ECOPACK®

■Diagnostic functions

– 3 A current sense precision of +/-8%

– Proportional load current sense

– High current sense precision for wide range

currents

– Current sense disable

– Thermal shutdown indication

– Very low current sense leakage

■Protection

– Undervoltage shutdown

– Overvoltage clamp

– Load current limitation

– Self-limiting of fast thermal transients

– Protection against loss of ground and loss

of VCC

– Thermal shutdown

– Reverse battery protection

– Electrostatic discharge protection

Description

The VND5025BK-E is a monolithic device made

using STMicroelectronics™ VIPower™ M0-5

technology, intended for driving resistive or

inductive loads with one side connected to

ground, and suitable for driving LEDs.

Active VCC pin voltage clamp protects the device

against low energy spikes (see ISO7637 transient

compatibility table). This device integrates an

analog current sense which delivers a current

proportional to the load current (according to a

known ratio) when CS_DIS is driven low or left

open. When CS_DIS is driven high, the

CURRENT SENSE pin is in a high impedance

condition.

Output current limitation protects the device in

overload condition. In case of long overload

duration, the device limits the dissipated power to

safe level up to thermal shutdown intervention.

Thermal shutdown with automatic restart allows

the device to recover normal operation as soon as

fault condition disappears.

Max transient supply voltage VCC 41 V

Operating voltage range VCC 4.5 to 36 V

Max on-state resistance (per ch.) RON 25 mΩ

Current limitation (typ) ILIMH 60 A

Off-state supply current IS2µA

(1)

1. Typical value with all loads connected.

Table 1. Device summary

Package

Order codes

Tube Tape and reel

PowerSSO-24™

VND5025BK-E

VND5025B1K-E

VND5025B2K-E

VND5025BKTR-E

VND5025B1KTR-E

VND5025B2KTR-E

PowerSSO-24™

www.st.com

Obsolete Product(s) - Obsolete Product(s)

         
Contents VND5025BK-E
2/32  Doc ID 13374 Rev 6
Contents
Block diagram and pin description  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical specification  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  7
2 Thermal data   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  8
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  9
4 Electrical characteristics curves  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  19
Application information   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
1 GND protection network against reverse battery  . . . . . . . . . . . . . . . . . . .  22
1.1 Solution 1: resistor in the ground line (RGND only)  . . . . . . . . . . . . . . . . 22
1.2 Solution 2: diode (DGND) in the ground line  . . . . . . . . . . . . . . . . . . . . . 23
2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  23
3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  23
4 Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . .  24
Package and thermal data   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
1 PowerSSO-24™ thermal data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  25
Package and packing information  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
1 ECOPACK® packages  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  28
2 Package mechanical data   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  28
3 Packing information   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  30
Revision history   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
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VND5025BK-E List of tables
Doc ID 13374 Rev 6 3/32
         
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Suggested connections for unused and not connected pins  . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Switching (VCC =13V; T
j= 25 °C)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. Logic input  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 10. Current sense (8 V < VCC < 16 V)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 12. Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 13. Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 14. Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 16. PowerSSO-24™ mechanical data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 17. Document revision history  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
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List of figures VND5025BK-E
4/32  Doc ID 13374 Rev 6
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Delay response time between rising edge of output current and rising edge of current sense
(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. IOUT/ISENSE vs IOUT  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 7. Maximum current sense ratio drift vs load current  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8. Switching characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 9. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 10. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 11. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 12. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 13. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 14. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 15. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 16. Input hysteresis voltage  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 17. On-state resistance vs Tcase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 18. On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 19. Undervoltage shutdown  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 20. ILIMH vs Tcase  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 21. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 22. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 23. CS_DIS high level voltage  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 24. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 25. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 26. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 27. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 24
Figure 28. PowerSSO-24™ PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 29. Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 25
Figure 30. PowerSSO-24™ thermal impedance junction to ambient single pulse (one channel ON) . 26
Figure 31. Thermal fitting model of a double channel HSD in PowerSSO-24™  . . . . . . . . . . . . . . . . . 26
Figure 32. PowerSSO-24™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 33. PowerSSO-24™ tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 34. PowerSSO-24™ tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
      Obsolete Product(s) - Obsolete Product(s)

VND5025BK-E Block diagram and pin description

Doc ID 13374 Rev 6 5/32

1 Block diagram and pin description

Figure 1. Block diagram

Table 2. Pin functions

Name Function

VCC Battery connection.

OUTPUT1,2 Power output.

GND Ground connection; must be reverse battery protected by an external

diode/resistor network.

INPUT1,2

Voltage controlled input pin with hysteresis, CMOS compatible; controls

output switch state.

CURRENT SENSE1,2

Analog current sense pin; delivers a current proportional to the load

current.

CS_DIS Active high CMOS compatible pin to disable the current sense pin.

LOGIC

UNDERVOLTAGE

OVERTEMP. 1

ILIM 1

PwCLAMP 1

IOUT1

GND

INPUT1

OUTPUT1

CURRENT

SENSE1

DRIVER 1

VCC

CLAMP

VDSLIM 1

ILIM 2

PwCLAMP 2

DRIVER 2

VDSLIM 2

OVERTEMP. 2

IOUT2

OUTPUT2

CURRENT

SENSE2

CS_DIS

K 2

INPUT2

PwrLIM 1

PwrLIM 2

K 1

Obsolete Product(s) - Obsolete Product(s)

Block diagram and pin description VND5025BK-E

6/32 Doc ID 13374 Rev 6

Figure 2. Configuration diagram (top view)

Table 3. Suggested connections for unused and not connected pins

Connection / pin Current sense N.C. Output Input CS_DIS

Floating N.R.(1)

1. Not recommended.

XX X X

To Ground Through 1kΩ resistor X N.R. Through 10kΩ

resistor

Through 10kΩ

resistor

N.C.

INPUT1

GND

VCC

N.C.

INPUT2

CS_DIS.

VCC

CURRENT SENSE1

N.C.

CURRENT SENSE2

OUTPUT2

OUTPUT1

TAB = V

Obsolete Product(s) - Obsolete Product(s)

VND5025BK-E Electrical specification

Doc ID 13374 Rev 6 7/32

2 Electrical specification

Figure 3. Current and voltage conventions

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may

cause permanent damage to the device. These are stress ratings only and operation of the

device at these or any other conditions above those indicated in the Operating sections of

this specification is not implied. Exposure to the conditions in table below for extended

periods may affect device reliability. Refer also to the STMicroelectronics SURE Program

and other relevant quality document.

GND

SENSE2

OUTPUT1

OUT1

CURRENT

SENSE1

INPUT1

IN1

IN2

OUT2

GND

CS_DIS

CSD

INPUT2

IN2

IN1

SENSE1

OUTPUT2

OUT2

CURRENT

SENSE2

SENSE1

OUT1

Note: VFn = VOUTn - VCC during reverse battery condition.

Table 4. Absolute maximum ratings

Symbol Parameter Value Unit

VCC DC supply voltage 41 V

-VCC Reverse DC supply voltage 0.3

-IGND DC reverse ground pin current 200 mA

IOUT DC output current Internally limited A

- IOUT Reverse DC output current 24

IIN DC input current -1 to 10 mAICSD DC current sense disable input current

-ICSENSE DC reverse CS pin current 200

VCSENSE Current sense maximum voltage VCC - 41 to +VCC V

Obsolete Product(s) - Obsolete Product(s)

Electrical specification VND5025BK-E

8/32 Doc ID 13374 Rev 6

2.2 Thermal data

EMAX(1)

Maximum switching energy (single pulse)

(L = 0.3 mH; RL=0Ω; Vbat = 13.5 V; Tjstart = 150 °C;

IOUT = IlimL(Typ.))

109 mJ

VESD

Electrostatic discharge

(Human Body Model: R = 1.5 kΩ; C = 100 pF)

- Input

- Current sense

- CS_DIS

- Output

- VCC

4000

2000

4000

5000

VESD Charge device model (CDM-AEC-Q100-011) 750 V

TjJunction operating temperature -40 to 150 °C

Tstg Storage temperature -55 to 150

1. See Section 3.4 for details.

Table 4. Absolute maximum ratings (continued)

Symbol Parameter Value Unit

Table 5. Thermal data

Symbol Parameter Maximum value Unit

Rthj-case Thermal resistance junction-case (with one channel ON) 1.35 °C/W

Rthj-amb Thermal resistance junction-ambient See Figure 29

Obsolete Product(s) - Obsolete Product(s)

VND5025BK-E Electrical specification

Doc ID 13374 Rev 6 9/32

2.3 Electrical characteristics

8V<V

CC <36V; -40°C<T

j< 150 °C, unless otherwise specified.

Table 6. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit

VCC Operating supply voltage 4.5 13 36

VUSD Undervoltage shutdown 3.5 4.5

VUSDhyst

Undervoltage shut-down

hysteresis 0.5

RON On-state resistance(1)

1. For each channel.

IOUT =3A; T

j=25°C 25

mΩIOUT =3A; T

j= 150 °C 50

IOUT =3A; V

CC =5V; T

j=25°C 35

Vclamp Clamp voltage IS= 20 mA 41 46 52 V

ISSupply current

Off-state; VCC =13V; T

j=25°C;

VIN =V

OUT =V

SENSE =V

CSD =0V 2(2)

2. PowerMOS leakage included.

5(2) µA

On-state; VCC =13V;

VIN =5V; I

OUT =0A 36mA

IL(off) Off-state output current(1)

VIN =V

OUT =0V;

VCC =13V; T

j=25°C 00.01 3

µA

VIN =V

OUT =0V;

VCC =13V; T

j=125°C 05

Output - VCC diode

voltage(1) -IOUT =4A; T

j= 150 °C 0.7 V

Table 7. Switching (VCC =13V; T

j=25°C)

Symbol Parameter Test conditions Min. Typ. Max. Unit

td(on) Turn-on delay time RL=4.3Ω

(see Figure 8)

—35—

µs

td(off) Turn-off delay time — 50 —

(dVOUT/dt)on Turn-on voltage slope

RL=4.3Ω

— See Figure 21 —

V/µs

(dVOUT/dt)off Turn-off voltage slope — See Figure 22 —

WON

Switching energy losses

during tWON RL=4.3Ω

(see Figure 8)

—0.45—

WOFF

Switching energy losses

during tWOFF

—0.35—

Obsolete Product(s) - Obsolete Product(s)

Electrical specification VND5025BK-E

10/32 Doc ID 13374 Rev 6

Table 8. Logic input

Symbol Parameter Test conditions Min. Typ. Max. Unit

VIL Input low level voltage 0.9 V

IIL Low level input current VIN =0.9V 1 µA

VIH Input high level voltage 2.1 V

IIH High level input current VIN =2.1V 10 µA

VI(hyst) Input hysteresis voltage 0.25

VVICL Input clamp voltage IIN =1mA 5.5 7

IIN =-1mA -0.7

VCSDL CS_DIS low level voltage 0.9

ICSDL Low level CS_DIS current VCSD =0.9V 1 µA

VCSDH CS_DIS high level voltage 2.1 V

ICSDH High level CS_DIS current VCSD =2.1V 10 µA

VCSD(hyst) CS_DIS hysteresis voltage 0.25

VCSCL CS_DIS clamp voltage ICSD =1mA 5.5 7

ICSD =-1mA -0.7

Table 9. Protection and diagnostics(1)

1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related

diagnostic signals must be used together with a proper software strategy. If the device is subjected to

abnormal conditions, this software must limit the duration and number of activation cycles.

Symbol Parameter Test conditions Min. Typ. Max. Unit

ILIMH DC short circuit current VCC = 13 V 43 60 85

5V<V

CC <36V

ILIML

Short circuit current

during thermal cycling

VCC =13V;

TR<T

j<T

TSD

TTSD Shutdown temperature 150 175 200

°C

TRReset temperature TRS +1 T

RS +5

TRS Thermal reset of STATUS 135

THYST

Thermal hysteresis

(TTSD-TR)7

VDEMAG

Turn-off output voltage

clamp

IOUT =2A;

VIN =0; L=6mH VCC -41 V

CC -46 V

CC -52 V

VON

Output voltage drop

limitation

IOUT = 0.2 A

Tj= -40 °C to 150 °C

(see Figure 9)

40 mV

Obsolete Product(s) - Obsolete Product(s)

VND5025BK-E Electrical specification

Doc ID 13374 Rev 6 11/32

Table 10. Current sense (8 V < VCC <16V)

Symbol Parameter Test conditions Min. Typ. Max. Unit

KLED IOUT/ISENSE

IOUT =0.05A; V

SENSE =0.5V;

VCSD =0V; T

j= -40 °C to 150 °C 1740 3300 4570

K0IOUT/ISENSE

IOUT = 0.5 A; VSENSE =0.5V;

VCSD =0V; T

j= -40 °C to 150 °C 1920 3020 3930

K1IOUT/ISENSE

IOUT =2A; V

SENSE =4V;

VCSD =0V;

Tj=-40°C

Tj=25°C to 150°C

2090

2320

2810

3440

3200

dK1/K1(1)(2)

Current sense

ratio drift

IOUT =2A; V

SENSE =4V;

VCSD =0V;

Tj= -40 °C to 150 °C

-8 +8 %

K2IOUT/ISENSE

IOUT =3A; V

SENSE =4V;

VCSD =0V;

Tj= -40 °C to 150 °C

ClassB

ClassB1

ClassB2

2510

2690

3160

2960

3160

dK2/K2(1)(2) Current sense

ratio drift

IOUT =3A; V

SENSE =4V; V

CSD =0V;

Tj= -40 °C to 150 °C -6 +6 %

K3IOUT/ISENSE

IOUT =10A; V

SENSE =4V;

VCSD =0V;

Tj=-40°C

Tj=25°C to 150°C

2610

2650

2760

2970

2870

dK3/K3(1)(2) Current sense

ratio drift

IOUT =10A; V

SENSE =4V; V

CSD =0V;

Tj= -40 °C to 150 °C -3 +3 %

ISENSE0

Analog sense

leakage current

IOUT =0A; V

SENSE =0V; V

CSD =5V;

VIN =0V; T

j= -40 °C to 150 °C 01µA

VCSD =0V; V

IN =5V;

Tj= -40 °C to 150 °C 02µA

IOUT =2A; V

SENSE =0V; V

CSD =5V;

VIN =5V; T

j= -40 °C to 150 °C 01µA

VSENSE

Max analog

Sense output

voltage

IOUT =3 A; V

CSD =0V 5

VSENSEH

Analog sense

output voltage in

over temperature

condition

VCC =13V; R

SENSE =3.9kΩ9

ISENSEH

Analog sense

output current in

over temperature

condition

VCC =13V; V

SENSE =5V 8 mA

Obsolete Product(s) - Obsolete Product(s)

Electrical specification VND5025BK-E

12/32 Doc ID 13374 Rev 6

Figure 4. Current sense delay characteristics

tDSENSE1H

Delay response

time from falling

edge of CS_DIS

VSENSE <4V, 0.5<I

OUT <10A

ISENSE =90% of I

SENSEMAX

(see Figure 4)

50 100

µs

tDSENSE1L

Delay response

time from rising

edge of CS_DIS

VSENSE <4V, 0.5<I

OUT <10A

ISENSE =10% of I

SENSEMAX

(see Figure 4)

5 20

tDSENSE2H

Delay response

time from rising

edge of INPUT

VSENSE <4V, 0.5<I

OUT <10A

ISENSE =90% of I

SENSEMAX

(see Figure 4)

70 300

ΔtDSENSE2H

Delay response

time between

rising edge of

output current

and rising edge

of current sense

VSENSE <4V,

ISENSE =90% of I

SENSEMAX,

IOUT =90% of I

OUTMAX, IOUTMAX =3A

(see Figure 5)

110

tDSENSE2L

Delay response

time from falling

edge of INPUT

VSENSE <4V, 0.5<I

OUT <10A

ISENSE =10% of I

SENSEMAX

(see Figure 4)

100 250

1. Parameter guaranteed by design; it is not tested.

2. Current sense ratio drift is the deviation of factor K for a given device (measured over the range -40 °C to

150 °C and 8 V < VCC < 16 V) from its value measured at Tj =25°C, VCC =13V.

Table 10. Current sense (8 V < VCC < 16 V) (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

SENSE CURRENT

INPUT

LOAD CURRENT

CS_DIS

tDSENSE2H tDSENSE2L

tDSENSE1L tDSENSE1H

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VND5025BK-E Electrical specification

Doc ID 13374 Rev 6 13/32

Figure 5. Delay response time between rising edge of output current and rising

edge of current sense (CS enabled)

OUT

SENSE

OUTMAX

SENSEMAX

90% I

SENSEMAX

90% I

OUTMAX

DSENSE2H

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Electrical specification VND5025BK-E

14/32 Doc ID 13374 Rev 6

Figure 6. IOUT/ISENSE vs IOUT

Class B2

Class B1

Class B

Iout/Isense

2000

2200

2400

2600

2800

3000

3200

3400

246810

Iout [A]

Max, Tj = -40 °C to 150 °C

Min, Tj = -40 °C to 150 °C

Iout/Isense

2000

2200

2400

2600

2800

3000

3200

3400

246810

Iout [A]

Max, Tj = -40 °C to 150 °C

Min, Tj = -40 °C to 150 °C

Iout/Isense

2000

2200

2400

2600

2800

3000

3200

3400

246810

Iout [A]

Max, Tj = -40 °C to 150 °C

Min, Tj = -40 °C to 150 °C

Note: See Table 10 for details.

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VND5025BK-E Electrical specification

Doc ID 13374 Rev 6 15/32

Figure 7. Maximum current sense ratio drift vs load current

Table 11. Truth table

Conditions Input Output Sense (VCSD =0V)

(1)

1. If the VCSD is high, the SENSE output is at a high impedance; its potential depends on leakage currents

and external circuit.

Normal operation

LL 0

HH Nominal

Overtemperature

SENSEH

Undervoltage

Short circuit to GND (RSC ≤10mΩ)

0 if Tj < TTSD

VSENSEH if Tj > TTSD

Short circuit to VCC

H < Nominal

Negative output voltage clamp L L 0

dK/K [% ]

-10

-8

-6

-4

-2

2345678910

Iout [A]

Max, Tj = -40 °C to 150 °C

Min, Tj = -40 °C to 150 °C

Note: Parameter guaranteed by design; it is not tested.

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Electrical specification VND5025BK-E

16/32 Doc ID 13374 Rev 6

Figure 8. Switching characteristics

Figure 9. Output voltage drop limitation

OUT

/dt

(on)

80%

10% t

OUT

/dt

(off)

d(off)

d(on)

INPUT

90%

Won

Woff

OUT

-V

OUT

=150°C T

=25°C

=-40°C

on(T)

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VND5025BK-E Electrical specification

Doc ID 13374 Rev 6 17/32

Table 12. Electrical transient requirements (part 1/3)

ISO 7637-2:

2004(E)

Test pulse

Test levels(1)

1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b.

Number of

pulses or

test times

Burst cycle/pulse

repetition time Delays and

Impedance

III IV Min. Max.

1 -75V -100V 5000 pulses 0.5s 5s 2 ms, 10Ω

2a +37V +50V 5000 pulses 0.2s 5s 50µs, 2Ω

3a -100V -150V 1h 90ms 100ms 0.1µs, 50Ω

3b +75V +100V 1h 90ms 100ms 0.1µs, 50Ω

4 -6V -7V 1 pulse 100ms, 0.01Ω

5b(2)

2. Valid in case of external load dump clamp: 40V maximum referred to ground.

+65V +87V 1 pulse 400ms, 2Ω

Table 13. Electrical transient requirements (part 2/3)

ISO 7637-2:

2004E

Test pulse

Test level results

III VI

1C C

2a C C

3a C C

3b C C

4C C

5b(1)

1. Valid in case of external load dump clamp: 40V maximum referred to ground.

Table 14. Electrical transient requirements (part 3/3)

Class Contents

C All functions of the device performed as designed after exposure to disturbance.

EOne or more functions of the device did not perform as designed after exposure to

disturbance and cannot be returned to proper operation without replacing the device.

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Electrical specification VND5025BK-E

18/32 Doc ID 13374 Rev 6

Figure 10. Waveforms

SENSE CURRENT

INPUT

NORMAL OPERATION

UNDERVOLTAGE

VCC

VUSD

VUSDhyst

INPUT

SENSE CURRENT

LOAD CURRENT

OVERLOAD OPERATION

INPUT

SENSE CURRENT

TTSD

LOAD CURRENT

INPUT

LOAD VOLTAGE

SENSE CURRENT

LOAD CURRENT

< Nominal < Nominal

SHORT TO VCC

CS_DIS

TRS

ILIMH

ILIML

VSENSEH

Thermal cycling

Power

limitation

Current

limitation

SHORTED LOAD NORMAL LOAD

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VND5025BK-E Electrical specification

Doc ID 13374 Rev 6 19/32

2.4 Electrical characteristics curves

Figure 11. Off-state output current Figure 12. High level input current

Figure 13. Input clamp voltage Figure 14. Input high level

Figure 15. Input low level Figure 16. Input hysteresis voltage

-50 -25 0 25 50 75 100 125 150 175

Tc ( ° C )

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

Iloff (uA)

Off State

Vcc=13V

Vin=Vout=0V

-50 -25 0 25 50 75 100 125 150 175

Tc ( ° C )

0.5

1.5

2.5

3.5

4.5

Iih(uA)

Vin=2.1V

-50 -25 0 25 50 75 100 125 150 175

Tc ( ° C )

5.25

5.5

5.75

6.25

6.5

6.75

Vicl (V)

Iin=1mA

-50 -25 0 25 50 75 100 125 150 175

Tc ( ° C )

0.5

1.5

2.5

3.5

Vih (V)

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

0.2

0.4

0.6

0.8

1.2

1.4

1.6

1.8

Vil (V)

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

Vhyst (V)

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Electrical specification VND5025BK-E

20/32 Doc ID 13374 Rev 6

Figure 17. On-state resistance vs Tcase Figure 18. On-state resistance vs VCC

Figure 19. Undervoltage shutdown Figure 20. ILIMH vs Tcase

Figure 21. Turn-on voltage slope Figure 22. Turn-off voltage slope

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

100

Ron (mOhm)

Iout=3A

Vcc=13V

0 5 10 15 20 25 30 35 40

Vcc (V)

Ron (mOhm)

Tc= -40°C

Tc= 25°C

Tc= 125°C

Tc=150°C

-50 -25 0 25 50 75 100 125 150 175

Tc ( ° C )

Vusd (V)

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

100

Ilimh (A)

Vcc=13V

-50 -25 0 25 50 75 100 125 150 175

Tc ( ° C )

100

200

300

400

500

600

700

800

900

1000

(dVout/dt)on (V/ms)

Vcc=13V

Rl=4.3Ohm

-50 -25 0 25 50 75 100 125 150 175

Tc (° C )

100

200

300

400

500

600

700

800

900

1000

(dVout/dt)off (V/ms)

Vcc=13V

Rl=4.3Ohm

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VND5025BK-E Electrical specification

Doc ID 13374 Rev 6 21/32

Figure 23. CS_DIS high level voltage Figure 24. CS_DIS low level voltage

Figure 25. CS_DIS clamp voltage

-50 -25 0 25 50 75 100 125 150 175

Tc ( ° C )

0.5

1.5

2.5

3.5

Vcsdh (V)

-50 -25 0 25 50 75 100 125 150 175

Tc ( ° C )

0.5

1.5

2.5

3.5

Vcsdl (V)

-50 -25 0 25 50 75 100 125 150 175

Tc ( ° C )

4.5

5.5

6.5

7.5

Vcsdcl (V)

Icsd=1mA

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Application information VND5025BK-E

22/32 Doc ID 13374 Rev 6

3 Application information

Figure 26. Application schematic

3.1 GND protection network against reverse battery

This section provides two solutions for implementing a ground protection network against

reverse battery.

3.1.1 Solution 1: resistor in the ground line (RGND only)

This first solution can be used with any type of load.

The following formulas indicate how to dimension the RGND resistor:

1. RGND ≤ 600 mV / (IS(on)max)

2. RGND ≥ (-VCC) / (-IGND)

where -IGND is the DC reverse ground pin current and can be found in the absolute

maximum rating section of the device datasheet.

Power Dissipation in RGND (when VCC < 0 during reverse battery situations) is:

PD=(-V

CC)2/R

GND

This resistor can be shared among several different HSDs. Please note that the value of this

resistor is calculated with formula (1), where IS(on)max becomes the sum of the maximum on-

state currents of the different devices.

Please note that if the microprocessor ground is not shared by the device ground, the RGND

produces a shift (IS(on)max * RGND) in the input thresholds and the status output values. This

shift varies depending on how many devices are ON in the case of several high-side drivers

sharing the same RGND.

GND

OUTPUT

GND

µC

+5V

GND

CS_DIS

prot

CURRENT SENSE

prot

SENSE

EXT

INPUT

Note: Channel 2 has the same internal circuit as channel 1.

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VND5025BK-E Application information

Doc ID 13374 Rev 6 23/32

If the calculated power dissipation leads to a large resistor or several devices have to share

the same resistor, then ST suggests to utilize the following Solution 2.

3.1.2 Solution 2: diode (DGND) in the ground line

If the device drives an inductive load, insert a resistor (RGND =1kΩ) in parallel to DGND.

This small signal diode can be safely shared among several different HSDs. Also in this

case, the presence of the ground network produces a shift (≈600 mV) in the input threshold

and in the status output values if the microprocessor ground is not common to the device

ground. This shift does not vary if more than one HSD shares the same diode/resistor

network.

3.2 Load dump protection

Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the

VCC maximum DC rating. The same applies if the device is subject to transients on the VCC

line that are greater than the ones shown in the ISO 7637-2:2004E table.

3.3 MCU I/Os protection

If a ground protection network is used and negative transients are present on the VCC line,

the control pins are pulled negative. ST suggests to insert an in-line resistor (Rprot) to

prevent the microcontroller I/O pins from latch-up.

The value of these resistors is a compromise between the leakage current of microcontroller

and the current required by the HSD I/Os (input levels compatibility) with the latch-up limit of

microcontroller I/Os.

-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax

Calculation example:

For VCCpeak = -100 V and Ilatchup ≥20 mA; VOHµC ≥4.5 V

Ω ≤ Rprot ≤ 65 kΩ

Recommended values: Rprot =10kΩ, CEXT =10nF.

Obsolete Product(s) - Obsolete Product(s)

Application information VND5025BK-E

24/32 Doc ID 13374 Rev 6

3.4 Maximum demagnetization energy (VCC =13.5V)

Figure 27. Maximum turn-off current versus inductance (for each channel)

100

0,1110100L (mH)

I (A)

Demagnetization Demagnetization Demagnetization

VIN, IL

jstart

= 125 °C repetitive pulse

jstart

= 150 °C single pulse

B: T

jstart

= 100 °C repetitive pulse

Note:

Values are generated with RL=0 Ω. In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every

pulse must not exceed the temperature specified above for curves A and B.

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VND5025BK-E Package and thermal data

Doc ID 13374 Rev 6 25/32

4 Package and thermal data

4.1 PowerSSO-24™ thermal data

Figure 28. PowerSSO-24™ PC board

Figure 29. Rthj-amb vs PCB copper area in open box free air condition (one channel

ON)

Note:

Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4 area = 77 mm x 86 mm, PCB

thickness = 1.6 mm, Cu thickness = 70 µm (front and back side), Copper areas: from minimum pad layout to 8 cm2).

0246810

RTHj_amb(°C/W)

PCB Cu heatsink area (cm^2)

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Package and thermal data VND5025BK-E

26/32 Doc ID 13374 Rev 6

Figure 30. PowerSSO-24™ thermal impedance junction to ambient single pulse (one

channel ON)

Equation 1: pulse calculation formula

where δ = tP/T

Figure 31. Thermal fitting model of a double channel HSD in PowerSSO-24™

0.1

100

1000

0.0001 0.001 0.01 0.1 1 10 100 1000

Time (s)

ZTH (°C/W)

Footprint

8 cm2

2 cm2

ZTHδRTH δZTHtp 1δ–()+⋅=

Note: Values are given inTable 11.

Obsolete Product(s) - Obsolete Product(s)

VND5025BK-E Package and thermal data

Doc ID 13374 Rev 6 27/32

Table 15. Thermal parameters

Area/Island (cm2) Footprint 2 8

R1 (°C/W) 0.28

R2 (°C/W) 0.9

R3 (°C/W) 6

R4 (°C/W) 7.7

R5 (°C/W) 9 9 8

R6 (°C/W) 28 17 10

R7 (°C/W) 0.28

R8 (°C/W) 0.9

C1 (W.s/°C) 0.001

C2 (W.s/°C) 0.003

C3 (W.s/°C) 0.025

C4 (W.s/°C) 0.75

C5 (W.s/°C) 1 4 9

C6 (W.s/°C) 2.2 5 17

C7 (W.s/°C) 0.001

C8 (W.s/°C) 0.003

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Package and packing information VND5025BK-E

28/32 Doc ID 13374 Rev 6

5 Package and packing information

5.1 ECOPACK® packages

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®

specifications, grade definitions and product status are available at: www.st.com.

ECOPACK® is an ST trademark.

5.2 Package mechanical data

Figure 32. PowerSSO-24™ package dimensions

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VND5025BK-E Package and packing information

Doc ID 13374 Rev 6 29/32

Table 16. PowerSSO-24™ mechanical data

Symbol

Millimeters

Min Typ Max

A2.45

A2 2.15 2.35

a1 0 0.1

b0.33 0.51

c0.23 0.32

D 10.10 10.50

E7.4 7.6

e0.8

e3 8.8

F2.3

G0.1

H 10.1 10.5

h0.4

k0° 8°

L0.55 0.85

O1.2

Q0.8

S2.9

T3.65

U1.0

N10°

X4.1 4.7

Y6.5 7.1

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Package and packing information VND5025BK-E

30/32 Doc ID 13374 Rev 6

5.3 Packing information

Figure 33. PowerSSO-24™ tube shipment (no suffix)

Figure 34. PowerSSO-24™ tape and reel shipment (suffix “TR”)

All dimensions are in mm.

Base Qty 49

Bulk Qty 1225

Tube length (±0.5) 532

A3.5

B13.8

C (±0.1) 0.6

Base Qty 1000

Bulk Qty 1000

A (max) 330

B (min) 1.5

C (±0.2) 13

F20.2

G (+2 / -0) 24.4

N (min) 100

T (max) 30.4

REEL DIMENSIONS

TAPE DIMENSIONS

According to Electronic Industries Association

(EIA) Standard 481 rev. A, Feb. 1986

All dimensions are in mm.

Tape width W 24

Tape Hole Spacing P0 (±0.1) 4

Component Spacing P 12

Hole Diameter D (±0.05) 1.55

Hole Diameter D1 (min) 1.5

Hole Position F (±0.1) 11.5

Compartment Depth K (max) 2.85

Hole Spacing P1 (±0.1) 2

Top

cover

tape

End

Start

No componentsNo components Components

500mm min 500mm min

Empty components pockets

sealed with cover tape.

User direction of feed

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VND5025BK-E Revision history

Doc ID 13374 Rev 6 31/32

6 Revision history

Table 17. Document revision history

Date Revision Changes

28-Mar-2007 1 Initial release

02-Jul-2009 2 Updated Table 16: PowerSSO-24™ mechanical data

23-Jul-2009 3

Updated Figure 32: PowerSSO-24™ package dimensions.

Updated Table 16: PowerSSO-24™ mechanical data:

– Deleted G1 row

– Added O, Q, S, T and U rows

08-Feb-2010 4 Updated ILIMH value from 41 A to 60 A

22-Jul-2010 5

Updated Table 1: Device summary.

Table 10: Current sense (8 V < VCC <16V):

– Updated K2 values and test conditions.

Updated Figure 6: IOUT/ISENSE vs IOUT

05-Aug-2010 6 Table 10: Current sense (8 V < VCC <16V):

– Updated K1 minimum value at Tj=25°C to 150°C

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VND5025BK-E

32/32 Doc ID 13374 Rev 6

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right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any

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