1
DS04-28310-2E
FUJITSU SEMICONDUCTOR
DATA SHEET
ASSP
1 CHANNEL
10-BIT D/A CONVERTER
MB40730
MB40730 is a low-power consumption, high-speed 10-bit D/A converter.
The MB40730 is characterized by ECL (10 kH) compatible digital inputs, an
analog output voltage from -2 to 0 V, and a maximum conversion rate of 60 MHz.
It provides a ref erence v oltage from a potential divider and band-gap ref erence,
and can also use an external reference voltage.
The MB40730 D/A converter is suitable for high-resolution TVs or VTRs.
Resolution: 10 bits
Conversion characteristics:
-Maximum conversion rate: 60 MHz (Minimum)
-Linearity error: ±0.1 % (Maximum)
-Differential linearity error: ±0.1 % (Maximum)
Input and output:
-Digital input voltage: ECL (10 kH) levels
-Analog output voltage: 2 Vp-p (-2 V to 0 V)
Reference voltage:
-VROUT1: Potential divider circuit (VEEA 2/5.2)
-VROUT2: Band-gap reference circuit (-2 V)
Others:
- Supply voltage: -5.2 V single power supply
- Pow er dissipation: 180 mW (Typical value at analog output voltage
2 Vp-p)
140 mW (Typical value at analog output voltage
1 Vp-p)
ABSOLUTE MAXIMUM RATINGS (See NOTE)
(VCCA=VCCD=0 V, Ta=+25°C)
Parameter Symbol Value Unit
Analog power supply voltage VEEA -7.0 to 0 V
Digital power supply voltage VEED -7.0 to 0 V
Power supply voltage difference VEED-VEEA 1.0 V
Digital signal input voltage VID 0 to VEE V
Storage Temperature Tstg -55 to +125 °C
NOTE: Permanent device damage may occur if the above Absolute Maximum Rat-
ing are exceeded. Functional operation should be restricted to the condi-
tions as detailed in the operational sections of this data sheet. Exposure
to absolute maximum rating conditions for extended periods may affect
device reliability.
20-PIN PLASTIC DIP
(DIP-20P-M01)
20-PIN PLASTIC SOP
(FPT-20P-M01)
This device contains circuitry to protect the inputs
against damage due to high static voltages or electric
fields. However, it is advised that normal precautions
be taken to avoid application of any voltage higher
than maximum rated voltages to this high impedance
circuit.
2
MB40730
PIN ASSIGNMENT
PIN DESCRIPTIONS
Pin No. Symbol I/O Description
1 to 10 D1 to D10 IData signal input pin (D1: MSB, D10: LSB)
20 CLK IClock signal input pin
19 VCCD -Digital ground pin (0 V)
18 VCCA -Analog ground pin (0 V)
11 VEED -Digital power pin (-5.2 V)
12 VEEA -Analog ground pin (-5.2 V)
15 VRIN I
Reference voltage input pin
Analog output dynamic range setup pin
Connect to pin 14 or 16 to use the built-in reference voltage
When using an external reference voltage, the voltage on this pin must be from
-2.20 V to -0.70 V
14 VROUT1 OReference voltage output pin 1
The output voltage of the potential divider reference is fixed at VEEA 2/5.2. When this
pin is connected to pin 15, the analog output voltage ranges from VEEA 2/5.2 to 0 V
16 VROUT2 OReference voltage output pin 2
The output voltage of the band-gap reference is fixed at -2.0 V. When the
pin is connected to pin 15, the analog output voltage ranges from -2 V to 0 V
13 COMP -Phase compensation capacitor pin
Insert a capacitor of 0.1 µF or greater between VEEA and COMP for phase
compensation
17 A. OUT OAnalog signal output pin
(TOP VIEW)
(DIP-20P-M01)
(FPT-20P-M01)
(MSB) D1120CLK
D2219VCCD
D3318VCCA
D4417A.OUT
D5516VROUT2
D6615VRIN
D7714VROUT1
D8813COMP
D9912VEEA
(LSB) D10 10 11 VEED
3
MB40730
BLOCK DIAGRAM
CLK
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
(MSB)
(LSB)
Input
Buffer Master-
slave
Flip Flop
Buffer Current
Switch
Reference Resistor
Reference Voltage 1
(potential divider
reference)
Reference Voltage 2
(band-gap
reference)
Amplifier
R
2R
2R
2R
2R
2R
2R
R
R
R
R
R
R
R
R
VCCA
A.OUT
VCCD
VCCA
VROUT1 VROUT2 VRIN COMP
10 10 10
VEED
VEEA
4
MB40730
DIGITAL INPUT EQUIVALENT CIRCUIT
ANALOG OUTPUT EQUIVALENT CIRCUIT
REFERENCE VOLTAGE OUTPUT EQUIVALENT CIRCUIT
VCCD
Threshold voltage = -1.3 V
VEED
D1 to D10
CLK
VCCA
RO = 240
A.OUT
IO
VEEA
VCCA
4 k
6 k
VROUT1
VROUT2
RS *
VCCA
BGR
-
+
*: Overcurrent-prevention resistor (2 k) for a short to GND.
VEEA
5
MB40730
TYPICAL CONNECTION EXAMPLE
RECOMMENDED OPERATING CONDITIONS
(VCCA=VCCD=0 V, Ta=-20°C to +75°C)
Parameter Symbol Standard value Unit
Min. Typ. Max.
Power
supply
voltage
Analog power supply voltage VEEA -5.46 -5.20 -4.94 V
Digital power supply voltage VEED -5.46 -5.20 -4.94 V
Power supply voltage difference VEEA-VEED -0.2 -0.2 V
Analog reference voltage VRIN -2.20 -2.00 -0.70 V
Digital input high voltage VIHD
-20°C - - -0.88 V
25°C-1.13 --0.81 V
75°C - - -0.735 V
Digital input low voltage VILD
-20°C-1.95 - - V
25°C-1.95 --1.48 V
75°C-1.95 - - V
Clock frequency fCLK - - 60 MHz
Setup time tsu 8 - - ns
Hold time th2 - - ns
Clock minimum pulse width high twH 6.5 - - ns
Clock minimum pulse width low twL 6.5 - - ns
Phase compensation capacitor CCOMP 0.1 - - µF
Operating temperature Top -20 -75 °C
VCCD VCCA
D1
to
D10
CLK
A. OUT
VROUT2
VRIN
VROUT1
COMP
DATA Input
CLK Input
Connect to VROUT1, VROUT2 or
external reference voltage.
0.1 m
VEED VEEA
2.2 µ47 µ0.01 µ
2.2 µ
47 µ0.01 µ
-5.2 V
6
MB40730
DC CHARACTERISTICS
AC CHARACTERISTICS
(VEEA=VEED=-5.46 to -4.94 V, Ta=-20°C to +75°C)
Parameter Symbol Condition Standard values Unit
Min. Typ. Max.
Resolution - - - - 10 bit
Linearity error LE DC accuracy - - ±0.1 %
Differential linearity error DLE - - ±0.1 %
Digital input current high IIHD - - - 5 µA
Digital input current low IILD --0.1 - - µA
Reference input current IRIN VRIN=-2.000V - - 10 µA
Potential
divider
reference Reference voltage VROUT1 VEEA = -5.20 V
VEED = -5.20 V -2.100 -2.000 -1.900 V
Band-gap
reference
Reference voltage VROUT2 --2.100 -2.000 -1.900 V
Temperature
coefficient ---100 -ppm/°C
Full-scale output voltage VOFS --20 0 - mV
Zero-scale output voltage VOZS VEEA = -5.20 V
VEED = -5.20 V
VRIN = -2.000 V -2.068 -1.998 -1.928 V
Output resistance ROTa=+25°C192 240 288
Power dissipation IEE VEEA = -5.46 V
VEED = -5.46 V
VRIN = VROUT -59 -34* -mA
* : VEEA = VEED = -5.20 V
(VEEA= VEED=-5.46 to -4.94 V, Ta=-20°C to +75°C)
Parameter Symbol Conditions Standard values Unit
Min. Typ. Max.
Maximum conversion rate FS
CL = 15 pF
A.OUT pin terminating
resistance = 240
60 - - MSPS
Output propagation delay time tpd - 7 - ns
Output rise time tr- 5 - ns
Output fall time tf- 5 - ns
Settling time tset --17.5 -ns
7
MB40730
TIMING CHART
Data input
Clock input
Analog output
VIHD
VILD
VIHD
VILD
VOFS
VOZS
-0.9 V
-1.7 V
-0.9 V
-1.7 V
-1.3 V
-1.3 V
90%
50%
10%
90%
50%
10%
+1/2LSB
+1/2LSB
tsu th
twH twL
trtf
tsetLH tsetHL
tPLH tPHL
8
MB40730
DAC OUTPUT VOLTAGE CHARACTERISTICS
DAC OUTPUT VOLTAGE FORMULA IN IDEAL CONDITIONS
NOTES
1. Preventing Switching Noise
To pre v ent s witching noise in the analog output signal, connect noise limiting capacitors to the VEEA and VEED pins as close
to the VCCA and VCCD pins as possible.
2. Power Pattern
To reduce parasitic impedance , the PC board pattern to the VCCA, VCCD, VEEA and VEED pins should be as wide as possible .
Input Output
D1 to D10 A.OUT
1023
0
0.000 V
0.000 V
-1.998 V
-2.000 V
(VCCA)
VOFS
VOZS
(VRIN)
1 LSB = 2 mV
A.OUT = VCCA - (VCCA - VRIN)
(N : Digital input code from 0 to 1023)
VOFS = VCCA
VOZS = VCCA - (VCCA - VRIN)
1023 - N
1024
1023
1024
9
MB40730
TYPICAL CHARACTERISTICS CURVES
1. Power Supply Current v.s. Ambient Temperature
VEE = -5.46 V
VRIN = VROUT1
0
-20
-40
-60
-80
-100
IEE, Power
supply
current
(mA)
-25 0 25 50 75 100
Ambient temperature Ta ( °C)
2. Linearity Error v.s. Ambient Temperature
VEE = -5.20 V
VRIN = -2.000 V
0.1
0.08
0.06
0.04
0.02
0
LEM ,
Linearity
error (%)
-25 0 25 50 75 100
Ambient temperature Ta ( °C)
4. Output Resistance v.s. Ambient Temperature
300
280
260
240
220
200
RO, Output
resistance ()
-25 0 25 50 75 100
Ambient temperature Ta ( °C)
VEE = -5.20 V
VRIN = -2.000 V
-25 0 25 50 75 100
Ambient temperature Ta ( °C)
0.1
0.08
0.06
0.04
0.02
0
DLEM ,
Differential
linearity
error (%)
3. Differential Linearity Error v.s. Ambient Temperature
10
MB40730
VEE = -5.20 V
5. Full-Scale Output Voltage
v.s. Ambient Temperature
VEE = -5.20 V
VRIN = -2.000 V
VCC
-10
-20
-30
-40
-50
VOFS,
Full-scale
output
voltage
(mV)
-25 0 25 50 75 100
Ambient temperature Ta ( °C)
6. Zero-Scale Output Voltage
v.s. Ambient Temperature
VEE = -5.20 V
VRIN = -2.000 V
-1.900
-1.950
-2.000
-2.050
-2.100
VOZS,
Zero-scale
output
voltage (V)
-25 0 25 50 75 100
Ambient temperature Ta ( °C)
7. VROUT1 Reference Output Voltage
v.s. Ambient Temperature
VROUT1,
Reference
output
voltage (V)
-25 0 25 50 75 100
Ambient temperature Ta ( °C)
(Reference)
-1.900
-1.950
-2.000
-2.050
-2.100
VEE = -5.20 V
8. VROUT2 Reference Output Voltage
v.s. Ambient Temperature
VROUT2,
Reference
output
voltage (V)
-25 0 25 50 75 100
Ambient temperature Ta ( °C)
-1.900
-1.950
-2.000
-2.050
-2.100
11
MB40730
Power supply voltage VEE (V)
10. Setup Time v.s. Ambient Temperature
VEE = -5.20 V
10
8
6
4
2
0
tsu,
Setup
time (ns)
-25 0 25 50 75 100
Ambient temperature Ta ( °C)
12. Hold Time v.s. Ambient Temperature
VEE = -5.20 V
6
4
2
0
-2
-4
-25 0 25 50 75 100
Ambient temperature Ta ( °C)
11. Setup Time v.s. Power Supply Voltage
10
8
6
4
2
0
-6.5 -6.0 -5.5 -5.0 -4.5 -4.0
Ta = 25°C
9. VROUT2 Reference Output Voltage
v.s. Power Supply Voltage
Reference
output
voltage
VROUT2 (V)
-6.5 -6.0 -5.5 -5.0 -4.5 -4.0
Power supply voltage VCC (V)
-1.900
-1.950
-2.000
-2.050
-2.100
Ta = 25°C
tsu,
Setup time
(ns)
tn,
Hold time
(ns)
12
MB40730
-6.5 -6.0 -5.5 -5.0 -4.5 -4.0
Power supply voltage VEE (V)
Ta = 25 °C
-6.5 -6.0 -5.5 -5.0 -4.5 -4.0
Power supply voltage VEE (V)
13. Hold Time v.s. Power Supply Voltage
6
4
2
0
-2
-4
tn, Hold time
(ns)
14. Minimum Clock Pulse Width
v.s. Ambient Temperature
VEE = -5.20 V
10
8
6
4
2
0
twL/twH,
Minimum
clock pulse
width (ns)
-25 0 25 50 75 100
Ambient temperature Ta ( °C)
16. Rise Time / Fall Time
v.s. Ambient Temperature
VEE = -5.20 V
VRIN = -2.000 V
CL = 15 pF
Analog output 240 termination
(1 V amplitude)
10
8
6
4
2
0
tr/tf, Rise time
and fall time (ns)
-25 0 25 50 75 100
Ambient temperature Ta ( °C)
15. Minimum Clock Pulse Width
v.s. Power Supply Voltage
10
8
6
4
2
0
twL
twH
Ta = 25 °C
twL/twH,
Minimum
clock pulse
width (ns) twL
twH
13
MB40730
-6.5 -6.0 -5.5 -5.0 -4.5 -4.0
Power supply voltage VEE (V)
18. Quantization Noise
v.s. Analog Output Frequency
70
60
50
40
30
20
S/Nq,
Quantization
noise (dB)
0 5 10152025
Analog output frequency fOUT (MHz)
17. Rise Time / Fa ll Time v.s. Power Supply Voltage
Ta = 25 °C
VRIN = -2.000 V
CL = 15 pF
Analog output 240 termination
(1 V amplitude)
10
8
6
4
2
0
tr/tf, Rise
time and
fall time
(ns) fCLK = 15 MHz
fCLK = 30 MHz
fCLK = 60 MHz
14
MB40730
PACKAGE DIMENSIONS
Dimensions in
inches (millimeters)
20-LEAD PLASTIC DUAL IN-LINE PACKAGE
(CASE No.: DIP-20P-M01)
1991 FUJITSU LIMITED D20005S-3C
.970+.008
-.012 (24.64 )
+0.20
-0.30
.034 +.012
-0
(0.86 )
+0.30
-0
.260±.010
(6.60±0.25)
INDEX-1
.100(2.54)
TYP
.050(1.27)
MAX
.018±.003
(0.46±0.08) .020(0.51) MIN
.172(4.36) MAX
.118(3.00) MIN
.010±.002
(0.25±0.05)
.300(7.62)
TYP
15°MAX
.050 +.012
-0
(1.27 )
+0.30
-0
INDEX-2
15
MB40730
PACKAGE DIMENSIONS (Continued)
Dimensions in
inches (millimeters)
20-LEAD PLASTIC FLAT PACKAGE
(CASE No.: FPT-20P-M01)
1991 FUJITSU LIMITED F20003S-5C
.004(0.10)
.005(0.13) M
.050(1.27)
TYP
“A”
.018±.004
(0.45±0.10)
.089(2.25) MAX
(MOUNTING HEIGHT)
.002(0.05) MIN
(STAND OFF HEIGHT)
+.016
-.008 +0.40
-0.20
.268 (6.80 )
.020±.008
(0.50±0.20)
+.002
-.001 +0.05
-0.02
.006 (0.15 )
Details of “A” part
.008(0.20)
.020(0.50)
.007(0.18)
MAX
.027(0.68)
MAX
.500
INDEX
.450(11.43) REF
(12.70 )
+0.25
-0.20
+.010
-.008
.209±.012
(5.30±0.30)
.307±.016
(7.80±0.40)
MB40730
FUJITSU LIMITED
For further information please contact:
Japan
FUJITSU LIMITED
Corporate Global Business Support Division
Electronic Devices
KAWASAKI PLANT, 1015, Kamikodanaka
Nakahara-ku, Kawasaki-shi
Kanagawa 211, Japan
Tel: (044) 754-3753
Fax: (044) 754-3329
North and South America
FUJITSU MICROELECTRONICS, INC.
Semiconductor Division
3545 North First Street
San Jose, CA 95134-1804, U.S.A.
Tel: (408) 922-9000
Fax: (408) 432-9044/9045
Europe
FUJITSU MIKROELEKTRONIK GmbH
Am Siebenstein 6-10
63303 Dreieich-Buchschlag
Germany
Tel: (06103) 690-0
Fax: (06103) 690-122
Asia Pacific
FUJITSU MICROELECTR ONICS ASIA PTE. LIMITED
No. 51 Bras Basah Road,
Plaza By The Park,
#06-04 to #06-07
Singapore 189554
Tel: 336-1600
Fax: 336-1609
F9601
FUJITSU LIMITED Printed in Japan
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