Quad, 12-/14-/16-Bit nanoDACs with
5 ppm/°C On-Chip Reference
AD5624R/AD5644R/AD5664R
Rev. B
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
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FEATURES
Low power, smallest pin-compatible, quad nanoDACs
AD5664R: 16 bits
AD5644R: 14 bits
AD5624R: 12 bits
User-selectable external or internal reference
External reference default
On-chip 1.25 V/2.5 V, 5 ppm/°C reference
10-lead MSOP and 3 mm × 3 mm LFCSP_WD
2.7 V to 5.5 V power supply
Guaranteed monotonic by design
Power-on reset to zero scale
Per channel power-down
Serial interface, up to 50 MHz
APPLICATIONS
Process controls
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
FUNCTIONAL BLOCK DIAGRAM
0
5856-001
BUFFER
BUFFER
AD5624R/AD5644R/AD5664R
1.25V/2.5V REF
V
DD
V
REFIN
/
V
REFOUT
GND
POWER-
DOWN
LOGIC
POWER-ON
LOGIC
SCLK
S
YNC
DIN
STRING
DAC A
STRING
DAC B
STRING
DAC C
STRING
DAC D
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INTERFACE
LOGIC
BUFFER
BUFFER
V
OUT
A
V
OUT
B
V
OUT
C
V
OUT
D
Figure 1.
Table 1. Related Devices
Part No. Description
AD5624/AD5664 2.7 V to 5.5 V quad, 12-/16-bit DACs, external
reference
AD5666 2.7 V to 5.5 V quad, 16-bit DAC, internal
reference, LDAC, CLR pins
GENERAL DESCRIPTION
The AD5624R/AD5644R/AD5664R, members of the nanoDAC®
family, are low power, quad, 12-/14-/16-bit buffered voltage-out
DACs. All devices operate from a single 2.7 V to 5.5 V supply
and are guaranteed monotonic by design.
The AD5624R/AD5644R/AD5664R have an on-chip reference.
The AD56x4R-3 has a 1.25 V, 5 ppm/°C reference, giving a full-
scale output range of 2.5 V; the AD56x4R-5 has a 2.5 V, 5 ppm/°C
reference giving a full-scale output range of 5 V. The on-chip
reference is off at power-up, allowing the use of an external refer-
ence; all devices can be operated from a single 2.7 V to 5.5 V
supply. The internal reference is enabled via a software write.
The part incorporates a power-on reset circuit that ensures the
DAC output powers up to 0 V and remains there until a valid
write takes place. The part contains a per-channel power-down
feature that reduces the current consumption of the device to
480 nA at 5 V and provides software-selectable output loads
while in power-down mode. The low power consumption of
this part in normal operation makes it ideally suited to portable
battery-operated equipment.
The AD5624R/AD5644R/AD5664R use a versatile 3-wire serial
interface that operates at clock rates up to 50 MHz, and is com-
patible with standard SPI, QSPI™, MICROWIRE™, and DSP
interface standards. The on-chip precision output amplifier
enables rail-to-rail output swing.
PRODUCT HIGHLIGHTS
1. Quad 12-/14-/16-bit DACs.
2. On-chip 1.25 V/2.5 V, 5 ppm/°C reference.
3. Available in 10-lead MSOP and 10-lead, 3 mm × 3 mm,
LFCSP_WD.
4. Low power, typically consumes 1.32 mW at 3 V and
2.25 mW at 5 V.
AD5624R/AD5644R/AD5664R
Rev. B | Page 2 of 28
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
AD5624R-5/AD5644R-5/AD5664R-5 ....................................... 3
AD5624R-3/AD5644R-3/AD5664R-3 ....................................... 4
AC Characteristics ........................................................................ 6
Timing Characteristics ................................................................ 7
Timing Diagram ........................................................................... 7
Absolute Maximum Ratings ............................................................ 8
ESD Caution .................................................................................. 8
Pin Configuration and Function Descriptions ............................. 9
Typical Performance Characteristics ........................................... 10
Terminology .................................................................................... 18
Theory of Operation ...................................................................... 20
Digital-to-Analog Section ......................................................... 20
Resistor String ............................................................................. 20
Output Amplifier ........................................................................ 20
Internal Reference ...................................................................... 20
External Reference ..................................................................... 20
Serial Interface ............................................................................ 20
Input Shift Register .................................................................... 21
SYNC Interrupt ........................................................................... 21
Power-On Reset .......................................................................... 22
Software Reset ............................................................................. 22
Power-Down Modes .................................................................. 22
LDAC Function ........................................................................... 23
Internal Reference Setup ........................................................... 23
Microprocessor Interfacing ....................................................... 24
Applications ..................................................................................... 25
Using a Reference as a Power Supply for the
AD5624R/AD5644R/AD5664R ............................................... 25
Bipolar Operation Using the
AD5624R/AD5644R/AD5664R ............................................... 25
Using AD5624R/AD5644R/AD5664R with a Galvanically
Isolated Interface ........................................................................ 25
Power Supply Bypassing and Grounding ................................ 26
Outline Dimensions ....................................................................... 27
Ordering Guide .......................................................................... 28
REVISION HISTORY
4/08—Rev. A to Rev. B
Changes to Figure 50 ...................................................................... 20
Updated Outline Dimensions ....................................................... 27
Changes to Ordering Guide .......................................................... 28
11/06—Rev. 0 to Rev. A
Changes to Reference Output Parameter in Table 2 .................... 3
Changes to Reference Output Parameter in Table 3 .................... 5
Added Note to Figure 3 .................................................................... 9
4/06—Revision 0: Initial Version
AD5624R/AD5644R/AD5664R
Rev. B | Page 3 of 28
SPECIFICATIONS
AD5624R-5/AD5644R-5/AD5664R-5
VDD = 4.5 V to 5.5 V; RL = 2 kΩ to GND; CL = 200 pF to GND; VREFIN = VDD; all specifications TMIN to TMAX, unless otherwise noted.
Table 2.
B Grade1
Parameter Min Typ Max Unit Conditions/Comments
STATIC PERFORMANCE2
AD5664R
Resolution 16 Bits
Relative Accuracy ±8 ±16 LSB
Differential Nonlinearity ±1 LSB Guaranteed monotonic by design
AD5644R
Resolution 14 Bits
Relative Accuracy ±2 ±4 LSB
Differential Nonlinearity ±0.5 LSB Guaranteed monotonic by design
AD5624R
Resolution 12 Bits
Relative Accuracy ±0.5 ±1 LSB
Differential Nonlinearity ±0.25 LSB Guaranteed monotonic by design
Zero-Code Error 2 10 mV All zeroes loaded to DAC register
Offset Error ±1 ±10 mV
Full-Scale Error −0.1 ±1 % of FSR All ones loaded to DAC register
Gain Error ±1.5 % of FSR
Zero-Code Error Drift ±2 μV/°C
Gain Temperature Coefficient ±2.5 ppm Of FSR/°C
DC Power Supply Rejection Ratio −100 dB DAC code = midscale; VDD = 5 V ± 10%
DC Crosstalk
External Reference 10 μV Due to full-scale output change, RL = 2 kΩ to GND or VDD
10 μV/mA Due to load current change
5 μV Due to powering down (per channel)
Internal Reference 25 μV Due to full-scale output change, RL = 2 kΩ to GND or VDD
20 μV/mA Due to load current change
10 μV Due to powering down (per channel)
OUTPUT CHARACTERISTICS3
Output Voltage Range 0 VDD V
Capacitive Load Stability 2 nF RL = ∞
10 nF RL = 2 kΩ
DC Output Impedance 0.5 Ω
Short-Circuit Current 30 mA VDD = 5 V
Power-Up Time 4 μs Coming out of power-down mode; VDD = 5 V
REFERENCE INPUTS
Reference Current 170 200 μA VREF = VDD = 5.5 V
Reference Input Range 0.75 VDD V
Reference Input Impedance 26
REFERENCE OUTPUT
Output Voltage 2.495 2.505 V At ambient
Reference TC3
±5 ±10 ppm/°C MSOP package models
±10 ppm/°C LFCSP package models
Output Impedance 7.5
AD5624R/AD5644R/AD5664R
Rev. B | Page 4 of 28
B Grade1
Parameter Min Typ Max Unit Conditions/Comments
LOGIC INPUTS3
Input Current ±2 μA All digital inputs
VINL, Input Low Voltage 0.8 V VDD = 5 V
VINH, Input High Voltage 2 V VDD = 5 V
Pin Capacitance 3 pF
POWER REQUIREMENTS
VDD 4.5 5.5 V
IDD VIH = VDD, VIL = GND, VDD = 4.5 V to 5.5 V
Normal Mode4 0.45 0.9 mA Internal reference off
0.95 1.2 mA Internal reference on
All Power-Down Modes5 0.48 1 μA
1 Temperature range: B grade: −40°C to +105°C.
2 Linearity calculated using a reduced code range: AD5664R (Code 512 to Code 65,024); AD5644R (Code 128 to Code 16,256); AD5624R (Code 32 to Code 4064). Output
unloaded.
3 Guaranteed by design and characterization, not production tested.
4 Interface inactive. All DACs active. DAC outputs unloaded.
5 All DACs powered down.
AD5624R-3/AD5644R-3/AD5664R-3
VDD = 2.7 V to 3.6 V; RL = 2 kΩ to GND; CL = 200 pF to GND; VREFIN = VDD; all specifications TMIN to TMAX, unless otherwise noted.
Table 3.
B Grade1
Parameter Min Typ Max Unit Conditions/Comments
STATIC PERFORMANCE2
AD5664R
Resolution 16 Bits
Relative Accuracy ±8 ±16 LSB
Differential Nonlinearity ±1 LSB Guaranteed monotonic by design
AD5644R
Resolution 14 Bits
Relative Accuracy ±2 ±4 LSB
Differential Nonlinearity ±0.5 LSB Guaranteed monotonic by design
AD5624R
Resolution 12 Bits
Relative Accuracy ±0.5 ±1 LSB
Differential Nonlinearity ±0.25 LSB Guaranteed monotonic by design
Zero-Code Error 2 10 mV All zeroes loaded to DAC register
Offset Error ±1 ±10 mV
Full-Scale Error −0.1 ±1 % of FSR All ones loaded to DAC register
Gain Error ±1.5 % of FSR
Zero-Code Error Drift ±2 μV/°C
Gain Temperature Coefficient ±2.5 ppm Of FSR/°C
DC Power Supply Rejection Ratio −100 dB DAC code = midscale; VDD = 3 V ± 10%
DC Crosstalk
External Reference 10 μV Due to full-scale output change, RL = 2 kΩ to GND or VDD
10 μV/mA Due to load current change
5 μV Due to powering down (per channel)
Internal Reference 25 μV Due to full-scale output change, RL = 2 kΩ to GND or VDD
20 μV/mA Due to load current change
10 μV Due to powering down (per channel)
AD5624R/AD5644R/AD5664R
Rev. B | Page 5 of 28
B Grade1
Parameter Min Typ Max Unit Conditions/Comments
OUTPUT CHARACTERISTICS3
Output Voltage Range 0 VDD V
Capacitive Load Stability 2 nF RL = ∞
10 nF RL = 2 kΩ
DC Output Impedance 0.5 Ω
Short-Circuit Current 30 mA VDD = 3 V
Power-Up Time 4 μs Coming out of power-down mode; VDD = 3 V
REFERENCE INPUTS
Reference Current 170 200 μA VREF = VDD = 3.6 V
Reference Input Range 0 VDD V
Reference Input Impedance 26
REFERENCE OUTPUT
Output Voltage 1.247 1.253 V At ambient
Reference TC3
±5 ±15 ppm/°C MSOP package models
±10 ppm/°C LFCSP package models
Output Impedance 7.5
LOGIC INPUTS3
Input Current ±2 μA All digital inputs
VINL, Input Low Voltage 0.8 V VDD = 3 V
VINH, Input High Voltage 2 V VDD = 3 V
Pin Capacitance 3 pF
POWER REQUIREMENTS
VDD 2.7 3.6 V
IDD VIH = VDD, VIL = GND, VDD = 2.7 V to 3.6 V
Normal Mode4 0.44 0.85 mA Internal reference off
0.95 1.15 mA Internal reference on
All Power-Down Modes5 0.2 1 μA
1 Temperature range: B grade: −40°C to +105°C.
2 Linearity calculated using a reduced code range: AD5664R (Code 512 to Code 65,024); AD5644R (Code 128 to Code 16,256); AD5624R (Code 32 to Code 4064). Output
unloaded.
3 Guaranteed by design and characterization, not production tested.
4 Interface inactive. All DACs active. DAC outputs unloaded.
5 All DACs powered down.
AD5624R/AD5644R/AD5664R
Rev. B | Page 6 of 28
AC CHARACTERISTICS
VDD = 2.7 V to 5.5 V; RL = 2 kΩ to GND; CL = 200 pF to GND; VREFIN = VDD; all specifications TMIN to TMAX, unless otherwise noted.1
Table 4.
Parameter2Min Typ Max Unit Conditions/Comments3
Output Voltage Settling Time
AD5624R 3 4.5 μs ¼ to ¾ scale settling to ±0.5 LSB
AD5644R 3.5 5 μs ¼ to ¾ scale settling to ±0.5 LSB
AD5664R 4 7 μs ¼ to ¾ scale settling to ±2 LSB
Slew Rate 1.8 V/μs
Digital-to-Analog Glitch Impulse 10 nV-s 1 LSB change around major carry
Digital Feedthrough 0.1 nV-s
Reference Feedthrough −90 dB VREF = 2 V ± 0.1 V p-p, frequency 10 Hz to 20 MHz
Digital Crosstalk 0.1 nV-s
Analog Crosstalk 1 nV-s External reference
4 nV-s Internal reference
DAC-to-DAC Crosstalk 1 nV-s External reference
4 nV-s Internal reference
Multiplying Bandwidth 340 kHz VREF = 2 V ± 0.1 V p-p
Total Harmonic Distortion −80 dB VREF = 2 V ± 0.1 V p-p, frequency = 10 kHz
Output Noise Spectral Density 120 nV/√Hz DAC code = midscale, 1 kHz
100 nV/√Hz DAC code = midscale, 10 kHz
Output Noise 15 μV p-p 0.1 Hz to 10 Hz
1 Guaranteed by design and characterization, not production tested.
2 See the Terminology section.
3 Temperature range is −40°C to +105°C, typical at 25°C.
AD5624R/AD5644R/AD5664R
Rev. B | Page 7 of 28
TIMING CHARACTERISTICS
All input signals are specified with tR = tF = 1 ns/V (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2 (see Figure 2).
VDD = 2.7 V to 5.5 V; all specifications TMIN to TMAX, unless otherwise noted.1
Table 5.
Limit at TMIN, TMAX
Parameter VDD = 2.7 V to 5.5 V Unit Conditions/Comments
t1220 ns min SCLK cycle time
t2 9 ns min SCLK high time
t3 9 ns min SCLK low time
t4 13 ns min
SYNC to SCLK falling edge setup time
t5 5 ns min Data setup time
t6 5 ns min Data hold time
t7 0 ns min
SCLK falling edge to SYNC rising edge
t8 15 ns min
Minimum SYNC high time
t9 13 ns min
SYNC rising edge to SCLK fall ignore
t10 0 ns min
SCLK falling edge to SYNC fall ignore
1 Guaranteed by design and characterization, not production tested.
2 Maximum SCLK frequency is 50 MHz at VDD = 2.7 V to 5.5 V.
TIMING DIAGRAM
DB0DB23
t
10
SCLK
SYNC
DIN
t
1
t
9
t
7
t
2
t
3
t
6
t
5
t
4
t
8
05856-002
Figure 2. Serial Write Operation
AD5624R/AD5644R/AD5664R
Rev. B | Page 8 of 28
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 6.
Parameter Rating
VDD to GND −0.3 V to +7 V
VOUT to GND −0.3 V to VDD + 0.3 V
VREFIN/VREFOUT to GND −0.3 V to VDD + 0.3 V
Digital Input Voltage to GND −0.3 V to VDD + 0.3 V
Operating Temperature Range
Industrial −40°C to +105°C
Storage Temperature Range −65°C to +150°C
Junction Temperature (TJ max) 150°C
Power Dissipation (TJ max − TA)/θJA
Thermal Impedance
LFCSP_WD Package (4-Layer Board)
θJA 61°C/W
MSOP Package (4-Layer Board)
θJA 142°C/W
θJC 43.7°C/W
Reflow Soldering Peak Temperature
Pb-Free 260°C ± 5°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
AD5624R/AD5644R/AD5664R
Rev. B | Page 9 of 28
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
V
OUT
A
10
V
REFIN
/V
REFOUT
2
V
OUT
B
9
V
DD
3
GND
8
DIN
4
V
OUT
C
7
SCLK
5
V
OUT
D
6
SYNC
AD5624R/
AD5644R/
AD5664R
TOP VIEW
(Not to Scale)
05856-003
EXPOSED PAD TIED TO
GND ON LFCSP PACKAGE
Figure 3. Pin Configuration
Table 7. Pin Function Descriptions
Pin No. Mnemonic Description
1 VOUTA Analog Output Voltage from DAC A. The output amplifier has rail-to-rail operation.
2 VOUTB Analog Output Voltage from DAC B. The output amplifier has rail-to-rail operation.
3 GND Ground Reference Point for all Circuitry on the Part.
4 VOUTC Analog Output Voltage from DAC C. The output amplifier has rail-to-rail operation.
5 VOUTD Analog Output Voltage from DAC D. The output amplifier has rail-to-rail operation.
6 SYNC Active Low Control Input. This is the frame synchronization signal for the input data. When SYNC goes low, it
powers on the SCLK and DIN buffers and enables the input shift register. Data is transferred in on the falling
edges of the next 24 clocks. If SYNC is taken high before the 24th falling edge, the rising edge of SYNC acts as an
interrupt and the write sequence is ignored by the device.
7 SCLK Serial Clock Input. Data is clocked into the input shift register on the falling edge of the serial clock input. Data
can be transferred at rates up to 50 MHz.
8 DIN Serial Data Input. This device has a 24-bit shift register. Data is clocked into the register on the falling edge of the
serial clock input.
9 VDD Power Supply Input. These parts can be operated from 2.7 V to 5.5 V, and the supply should be decoupled with a
10 μF capacitor in parallel with a 0.1 μF capacitor to GND.
10 VREFIN/VREFOUT The AD5624R/AD5644R/AD5664R have a common pin for reference input and reference output. When using the
internal reference, this is the reference output pin. When using an external reference, this is the reference input
pin. The default for this pin is as a reference input.
AD5624R/AD5644R/AD5664R
Rev. B | Page 10 of 28
TYPICAL PERFORMANCE CHARACTERISTICS
CODE
INL ERROR (LSB)
10
4
6
8
0
2
–6
–10
–8
–2
–4
0 5k 10k 15k 20k 25k 30k 35k 40k 45k 50k 55k 60k 65k
05856-004
V
DD
= V
REF
= 5V
T
A
= 25°C
Figure 4. AD5664R INL, External Reference
CODE
INL ERROR (LSB)
4
–4
02500 5000 7500 10000 12500 15000
05856-005
–3
–2
–1
0
1
2
3
V
DD
= V
REF
= 5V
T
A
= 25°C
Figure 5. AD5644R INL, External Reference
CODE
INL ERROR (LSB)
1.0
–1.0
0500 1000 1500 2000 2500 3000 3500 4000
05856-006
–0.8
–0.6
–0.4
0
0.4
0.2
–0.2
0.6
0.8
V
DD
= V
REF
= 5V
T
A
= 25°C
Figure 6. AD5624R INL, External Reference
CODE
DNL ERROR (LSB)
1.0
0.6
0.4
0.2
0.8
0
–0.4
–0.2
–0.6
–1.0
–0.8
0 10k 20k 30k 40k 50k 60k
05856-007
V
DD
= V
REF
= 5V
T
A
= 25°C
Figure 7. AD5664R DNL, External Reference
DNL ERROR (LSB)
0.5
0.3
0.2
0.1
0.4
0
–0.2
–0.1
–0.3
–0.5
–0.4
05856-008
V
DD
= V
REF
= 5V
T
A
= 25°C
CODE
02500 5000 7500 10000 12500 15000
Figure 8. AD5644R DNL, External Reference
DNL ERROR (LSB)
0.20
0.10
0.05
0.15
0
–0.05
–0.10
–0.20
–0.15
05856-009
CODE
0500 1000 1500 2000 2500 3000 3500 4000
V
DD
= V
REF
= 5V
T
A
= 25°C
Figure 9. AD5624R DNL, External Reference
AD5624R/AD5644R/AD5664R
Rev. B | Page 11 of 28
CODE
INL ERROR (LSB)
10
8
0
–10
–6
–8
–4
6
–2
4
2
65000
60000
55000
50000
45000
40000
35000
30000
25000
20000
15000
10000
5000
0
V
DD
= 5V
V
REFOUT
= 2.5V
T
A
= 25°C
05856-010
Figure 10. AD5664R-5 INL, Internal Reference
CODE
INL ERROR (LSB)
4
3
–4
–3
–2
2
–1
1
0
16250
15000
13750
12500
11250
10000
8750
7500
6250
5000
3750
2500
1250
0
V
DD
=5V
V
REFOUT
=2.5V
T
A
= 25°C
05856-011
Figure 11. AD5644R-5 INL, Internal Reference
CODE
INL ERROR (LSB)
1.0
0.8
0
–1.0
–0.8
–0.6
0.6
–0.4
–0.2
0.4
0.2
0 1000500 20001500 350030002500 4000
V
DD
=5V
V
REFOUT
=2.5V
T
A
= 25°C
05856-012
Figure 12. AD5624R-5 INL, Internal Reference
CODE
DNL ERROR (LSB)
1.0
0.8
0
–1.0
–0.6
–0.8
–0.4
0.6
–0.2
0.4
0.2
65000
60000
55000
50000
45000
40000
35000
30000
25000
20000
15000
10000
5000
0
V
DD
=5V
V
REFOUT
=2.5V
T
A
=25°C
05856-013
Figure 13. AD5664R-5 DNL, Internal Reference
CODE
DNL ERROR (LSB)
0.5
0.4
0
–0.5
–0.3
–0.4
–0.2
0.3
–0.1
0.2
0.1
16250
15000
13750
12500
11250
10000
8750
7500
6250
5000
3750
2500
1250
0
V
DD
= 5V
V
REFOUT
= 2.5V
T
A
= 25°C
05856-014
Figure 14. AD5644R-5 DNL, Internal Reference
CODE
DNL ERROR (LSB)
0.20
0.15
0
–0.20
–0.15
–0.10
0.10
–0.05
0.05
0 1000500 20001500 350030002500 4000
V
DD
= 5V
V
REFOUT
= 2.5V
T
A
= 25°C
05856-015
Figure 15. AD5624R-5 DNL, Internal Reference
AD5624R/AD5644R/AD5664R
Rev. B | Page 12 of 28
CODE
INL ERROR (LSB)
10
8
4
6
2
0
–4
–2
–6
–8
–10
65000
60000
55000
50000
45000
40000
35000
30000
25000
20000
15000
10000
5000
0
05856-016
V
DD
= 3V
V
REFOUT
= 1.25V
T
A
= 25°C
Figure 16. AD5664R-3 INL, Internal Reference
CODE
INL ERROR (LSB)
4
–4
16250
15000
13750
12500
11250
10000
8750
7500
6250
5000
3750
2500
1250
0
05856-017
3
2
1
0
–1
–2
–3
V
DD
= 3V
V
REFOUT
= 1.25V
T
A
= 25°C
Figure 17. AD5644R-3 INL, Internal Reference
CODE
INL ERROR (LSB)
1.0
–1.0
0 500 1000 1500 2000 2500 3000 3500 4000
0
0.8
0.6
0.4
0.2
–0.2
–0.4
–0.6
–0.8
V
DD
= 3V
V
REFOUT
= 1.25V
T
A
= 25°C
05856-018
Figure 18. AD5624R-3 INL, Internal Reference
CODE
DNL ERROR (LSB)
1.0
0.8
0.4
0.6
0.2
0
–0.4
–0.2
–0.6
–0.8
–1.0
65000
60000
55000
50000
45000
40000
35000
30000
25000
20000
15000
10000
5000
0
VDD = 3V
VREFOUT = 1.25V
TA = 25°C
05856-019
Figure 19. AD5664R-3 DNL, Internal Reference
CODE
DNL ERROR (LSB)
0.5
–0.5
16250
15000
13750
12500
11250
10000
8750
7500
6250
5000
3750
2500
1250
0
0
0.4
0.3
0.2
0.1
–0.1
–0.2
–0.3
–0.4
VDD = 3V
VREFOUT = 1.25V
TA = 25°C
05856-020
Figure 20. AD5644R-3 DNL, Internal Reference
CODE
DNL ERROR (LSB)
0.20
–0.20
0 500 1000 1500 2000 2500 3000 3500 4000
0
0.15
0.10
0.05
–0.05
–0.10
–0.15
VDD = 3V
VREFOUT = 1.25V
TA = 25°C
05856-021
Figure 21. AD5624R-3 DNL, Internal Reference
AD5624R/AD5644R/AD5664R
Rev. B | Page 13 of 28
TEMPERATURE (°C)
ERROR (LSB)
8
6
4
2
–6
–4
–2
0
–8
–40 –20 40200 1008060
05856-022
MIN DNL
MAX DNL
MAX INL
MIN INL
VDD = VREF = 5V
Figure 22. INL Error and DNL Error vs. Temperature
V
REF
(V)
ERROR (LSB)
10
4
6
8
2
0
–8
–6
–4
–2
–10
0.75 1.25 1.75 2.25 4.253.753.252.75 4.75
MIN DNL
MAX DNL
MAX INL
MIN INL
V
DD
= 5V
T
A
= 25°C
05856-023
Figure 23. INL Error and DNL Error vs. VREF
V
DD
(V)
ERROR (LSB)
8
6
4
2
–6
–4
–2
0
–8
2.7 3.2 3.7 4.74.2 5.2
MIN DNL
MAX DNL
MAX INL
MIN INL
T
A
= 25°C
05856-024
Figure 24. INL Error and DNL Error vs. Supply
TEMPERATURE (°C)
ERROR (% FSR)
0
–0.04
–0.02
–0.06
–0.08
–0.10
–0.18
–0.16
–0.14
–0.12
–0.20
–40 –20 40200 1008060
V
DD
= 5V
GAIN ERROR
FULL-SCALE ERROR
05856-025
Figure 25. Gain Error and Full-Scale Error vs. Temperature
TEMPERATURE (°C)
ERROR (mV)
1.5
1.0
0.5
0
–2.0
–1.5
–1.0
–0.5
–2.5
–40 –20 40200860 1000
OFFSET ERROR
ZERO-SCALE ERROR
05856-026
Figure 26. Zero-Scale Error and Offset Error vs. Temperature
V
DD
(V)
ERROR (% FSR)
1.0
–1.5
–1.0
–0.5
0
0.5
–2.0
2.7 3.2 3.7 4.74.2 5.2
GAIN ERROR
FULL-SCALE ERROR
05856-027
Figure 27. Gain Error and Full-Scale Error vs. Supply
AD5624R/AD5644R/AD5664R
Rev. B | Page 14 of 28
V
DD
(V)
ERROR (mV)
1.0
0.5
0
–2.0
–1.5
–1.0
–0.5
–2.5
2.7 3.2 4.23.7 5.24.7
ZERO-SCALE ERROR
OFFSET ERROR
T
A
= 25°C
05856-028
Figure 28. Zero-Scale Error and Offset Error vs. Supply
I
DD
(mA)
FREQUEN
C
Y
0
1
2
3
4
5
6
0.41 0.42 0.43 0.44 0.45
05856-029
V
DD
= 5.5V
T
A
= 25°C
Figure 29. IDD Histogram with External Reference, 5.5 V
I
DD
(mA)
FREQUEN
C
Y
0
1
2
3
4
5
6
0.92 0.94 0.96 0.98
05856-030
V
DD
= 5.5V
T
A
= 25°C
Figure 30. IDD Histogram with Internal Reference, VREFOUT = 2.5 V
I
DD
(mA)
FREQUENCY
0
1
2
3
5
4
6
8
7
0.39 0.40 0.41 0.42 0.43
05856-060
V
DD
= 3.6V
T
A
= 25°C
Figure 31. IDD Histogram with External Reference, 3.6 V
I
DD
(mA)
FREQUENCY
0
1
2
3
5
4
6
8
7
0.90 0.92 0.94 0.96
05856-061
V
DD
= 3.6V
T
A
= 25°C
Figure 32. IDD Histogram with Internal Reference, VREFOUT = 1.25 V
CURRENT (mA)
ERROR VOLTAGE (V)
0.5
0.4
–0.5
–0.4
–0.3
–0.2
–0.1
0
0.1
0.2
0.3
–10 –8 –6 –4 –2 0 2 4 8610
V
DD
= 3V
V
REFOUT
= 1.25V
V
DD
= 5V
V
REFOUT
= 2.5V
DAC LOADED WITH
ZERO-SCALE
SINKING CURRENT
DAC LOADED WITH
FULL-SCALE
SOURCING CURRENT
0
5856-031
Figure 33. Headroom at Rails vs. Source and Sink
AD5624R/AD5644R/AD5664R
Rev. B | Page 15 of 28
CURRENT (mA)
V
OUT
(V)
6
5
4
3
2
1
–1
0
–30 –20 –10 0 10 20 30
V
DD
= 5V
V
REFOUT
= 2.5V
T
A
= 25°C
ZERO SCALE
FULL SCALE
MIDSCALE
1/4 SCALE
3/4 SCALE
0
5856-046
Figure 34. AD56x4R-5 Source and Sink Capability
CURRENT (mA)
V
OUT
(V)
4
–1
0
1
2
3
–30 –20 –10 0 10 20 30
V
DD
= 3V
V
REFOUT
= 1.25V
T
A
= 25°C
ZERO SCALE
FULL SCALE
MIDSCALE
1/4 SCALE
3/4 SCALE
0
5856-047
Figure 35. AD56x4R-3 Source and Sink Capability
TEMPERATURE (°C)
I
DD
(mA)
0.50
0.05
0.10
0.15
0.20
0.35
0.40
0.25
0.30
0.45
0
–40 –20 0 20 40 60 80 100
05856-063
T
A
= 25°C
V
DD
= V
REFIN
= 5V
V
DD
= V
REFIN
= 3V
Figure 36. Supply Current vs. Temperature
TIME BASE = 4µs/DIV
V
DD
= V
REF
= 5V
T
A
= 25°C
FULL-SCALE CODE CHANGE
0x0000 TO 0xFFFF
OUTPUT LOADED WITH 2k
AND 200pF TO GND
V
OUT
= 909mV/DIV
1
05856-048
Figure 37. Full-Scale Settling Time, 5 V
CH1 2.0V CH2 500mV M100µs 125MS/s
A CH1 1.28V
8.0ns/pt
V
DD
= V
REF
= 5V
T
A
= 25°C
V
OUT
V
DD
1
2
MAX(C2)
420.0mV
05856-049
Figure 38. Power-On Reset to 0 V
05856-050
V
DD
= 5V
SYNC
SCLK
V
OUT
1
3
CH1 5.0V
CH3 5.0V
CH2 500mV M400ns A CH1 1.4V
2
Figure 39. Exiting Power-Down to Midscale
AD5624R/AD5644R/AD5664R
Rev. B | Page 16 of 28
SAMPLE NUMBER
V
OUT
(V)
2.521
2.522
2.523
2.524
2.525
2.526
2.527
2.528
2.529
2.530
2.531
2.532
2.533
2.534
2.535
2.536
2.537
2.538
0 50 100 150 350 400200 250 300 450 512
05856-058
V
DD
= V
REF
= 5V
T
A
= 25°C
5ns/SAMPLE NUMBER
GLITCH IMPULSE = 9.494nV
1LSB CHANGE AROUND
MIDSCALE (0x8000 TO 0x7FFF)
Figure 40. Digital-to-Analog Glitch Impulse (Negative)
SAMPLE NUMBER
V
OUT
(V)
2.491
2.492
2.493
2.494
2.495
2.496
2.497
2.498
0 50 100 150 350 400200 250 300 450 512
05856-059
V
DD
= V
REF
= 5V
T
A
= 25°C
5ns/SAMPLE NUMBER
ANALOG CROSSTALK = 0.424nV
Figure 41. Analog Crosstalk, External Reference
SAMPLE NUMBER
V
OUT
(V)
2.456
2.458
2.460
2.462
2.464
2.466
2.468
2.470
2.472
2.474
2.476
2.478
2.480
2.482
2.484
2.486
2.488
2.490
2.492
2.494
2.496
0 50 100 150 350 400200 250 300 450 512
05856-062
V
DD
= 5V
V
REFOUT
= 2.5V
T
A
= 25°C
5ns/SAMPLE NUMBER
ANALOG CROSSTALK = 4.462nV
Figure 42. Analog Crosstalk, 2.5 V Internal Reference
1
Y AXIS = 2µV/DIV
X AXIS = 4s/DIV
V
DD
= V
REF
= 5V
T
A
= 25°C
DAC LOADED WITH MIDSCALE
05856-051
Figure 43. 0.1 Hz to 10 Hz Output Noise Plot, External Reference
5s/DIV
10µV/DIV
1
V
DD
= 5V
V
REFOUT
= 2.5V
T
A
= 25°C
DAC LOADED WITH MIDSCALE
05856-052
Figure 44. 0.1 Hz to 10 Hz Output Noise Plot, 2.5 V Internal Reference
4s/DIV
5µV/DIV
1
V
DD
= 3V
V
REFOUT
= 1.25V
T
A
= 25°C
DAC LOADED WITH MIDSCALE
05856-053
Figure 45. 0.1 Hz to 10 Hz Output Noise Plot, 1.25 V Internal Reference