ASM802MCPA - Alliance Semiconductor

Alliance Semiconductor

2575 Augustine Drive . Santa Clara, CA 95054 . Tel: 408.855.4900 . Fax: 408.855.4999 . www.alsc.com

Notice: The information in this document is subject to change without notice

rev 1.0 µP Power Supply Supervisor With Battery Backup Switch

ASM690A / 692A

ASM802L / 802M

ASM805L

October 2003

General Description

The AS690A / AS692A / AS802L / AS802M / AS805L offers

complete single chip solutions for power supply monitoring and

control battery functions in microprocessor systems. Each

device implements four functions: Reset control, watchdog

monitoring, battery-backup switching and power-failure

monitoring. In addition to microprocessor reset under power-up

and power-down conditions, these devices provide battery-

backup switching to maintain control in power loss and brown-

out situations. Additional monitoring capabilities can provide an

early warning of unregulated power supply loss before the

voltage regulator drops out. The important features of these

four functions are:

• 1.6 second watchdog timer to keep microprocessor

responsive

• 4.40V or 4.65V VCC threshold for microprocessor reset at

power-up and power-down

• SPDT (Single-pole, Double-throw) PMOS switch connects

backup power to RAM if VCC fails

• 1.25V threshold detector for power loss or general purpose

voltage monitoring

These features are pin-compatible with the industry standard

power-supply supervisors. Short-circuit and thermal protection

have also been added. The AS690A / AS802L / AS805L

generate a reset pulse when the supply voltage drops below

4.65V and the AS692A / AS802M generate a reset below

4.40V. The ASM802L / ASM802M have power-fail accuracy to

± 2%. The ASM805L is the same as the ASM690A except that

RESET is provided instead of RESET.

Features

• Two precision supply-voltage monitor options

•4.65V (AS690A / AS802L / AS805L)

•4.40V (AS692A / AS802M )

• Battery-backup power switch on-chip

• Watchdog timer: 1.6 second timeout

• Power failure / low battery detection

• Short circuit protection and thermal limiting

• Small 8-pin SO package

• No external components

• Specified over full temperature range

Applications

• Embedded control systems

• Portable/Battery operated systems

• Intelligent instruments

• Wireless instruments

• Wireless communication systems

• PDAs and hand-held equipments

• µP / µC power supply monitoring

• Safety system

Typical Operating Circuit

Block Diagram

BUS

0.1 µF

3.6 V

Lithium

Battery

ASM690A

Regulated +5V

Unregulated DC

VBATT

GND VOUT

WDI

PFO

PFI

RESET

VCC VCC

RESET

GND

NMI

I/O LINE

VCC

CMOS

RAM

Battery-Switchover Circuit

Reset

Generator

Watchdog

Timer

VBATT

VCC

WDI

PFI

VOUT

RESET

(RESET)

PFO

1.25V

3.5V

0.8V 1.25V

GND

|+ -

ASM690A, ASM692A, ASM802L, ASM802M, (ASM805L)

Battery-Switchover Circuit

Reset

Generator

Watchdog

Timer

VBATT

VCC

WDI

PFI

VOUT

RESET

(RESET)

PFO

1.25V

3.5V

0.8V 1.25V

|+ -

2 of 13

Notice: The information in this document is subject to change without notice

ASM690A / 692A

ASM802L / 802M

ASM805L

µP Power Supply Supervisor With Battery Backup Switch

rev 1.0

October 2003

Pin Configuration

VOUT

VCC

GND

PFI

VBATT

RESET (RESET)

WDI

PFO

Plastic/CerDip/SO

ASM690A

ASM692A

ASM802L

ASM802M

(ASM805L)

Pin Description

Pin Number

Name Function

ASM690A /

ASM692A

ASM802L /

ASM802M

ASM805L

VOUT

Voltage supply for RAM. When VCC is above the reset threshold, VOUT connects to

VCC through a P-Channel MOS device. If VCC falls below the reset threshold, this

output will be connected to the backup supply at VBATT (or VCC, whichever is

higher) through the MOS switch to provide continuous power to the CMOS RAM.

VCC +5V power supply input.

3 3 GND Ground

44PFI

Power failure monitor input. PFI is connected to the internal power fail comparator

which is referenced to 1.25V. The power fail output (PFO) is active LOW but

remains HIGH if PFI is above 1.25V. If this feature is unused, the PFI pin should be

connected to GND or VOUT

55PFO

Power-fail output. PFO is active LOW whenever the PFI pin is less than 1.25V.

66WDI

Watchdog input. The WDI input monitors microprocessor activity. An internal timer

is reset with each transition of the WDI input. If the WDI is held HIGH or LOW for

longer than the watchdog timeout period, typically 1.6 seconds, RESET (or RESET)

is asserted for the reset pulse width time, tRS, of 140ms, minimum.

7 - RESET

Active-LOW reset output. When triggered by VCC falling below the reset threshold

or by watchdog timer timeout, RESET (or RESET) pulses low for the reset pulse

width tRS, typically 200ms. It will remain low if VCC is below the reset threshold

(4.65V in ASM690A / ASM802L and 4.4V in the ASM692A / ASM802L) and

remains low for 200ms after VCC rises above the reset threshold.

- 7 RESET Active-HIGH reset output. The inverse of RESET.

VBATT

Auxiliary power or backup-battery input. VBATT should be connected to GND if the

function is not used. The input has about 40mV of hysteresis to prevent rapid tog-

gling between VCC and VBATT

3 of 13

Notice: The information in this document is subject to change without notice

ASM690A / 692A

ASM802L / 802M

ASM805L

µP Power Supply Supervisor With Battery Backup Switch

rev 1.0

October 2003

Detailed Description

It is important to initialize a microprocessor to a known state

in response to specific events that could create code

execution errors and “lock-up”. The reset output of these

supervisory circuits send a reset pulse to the microprocessor

in response to power-up, power-down/power-loss or a

watchdog time-out.

RESET/RESET Timing

Power-up reset occurs when a rising VCC reaches the reset

threshold, VRT

, forcing a reset condition in which the reset

output is asserted in the appropriate logic state for the

duration of tRS. The reset pulse width, tRS, is typically around

200ms and is LOW for the ASM690A, ASM692A, ASM802

and HIGH for the ASM805L. Figure 1 shows the reset pin

timing.

Power-loss or “brown-out” reset occurs when VCC dips below

the reset threshold resulting in a reset assertion for the

duration of tRS. The reset signal remains asserted as long as

VCC is between VRT and 1.1V, the lowest VCC for which these

devices can provide a guaranteed logic-low output. To ensure

logic inputs connected to the ASM690A / ASM692A/ASM802

RESET pin are in a known state when VCC is under 1.1V, a

100kΩ pull-down resistor at RESET is needed: the logic-high

ASM805L will need a pull-up resistor to VCC.

Watchdog Timer

A Watchdog time-out reset occurs when a logic “1” or logic

“0” is continuously applied to the WDI pin for more than 1.6

seconds. After the duration of the reset interval, the watchdog

timer starts a new 1.6 second timing interval; the

microprocessor must service the watchdog input by changing

states or by floating the WDI pin before this interval is

finished. If the WDI pin is held either HIGH or LOW, a reset

pulse will be triggered every 1.8 seconds (the 1.6 second

timing interval plus the reset pulse width tRS).

Application Information

Microprocessor Interface

The ASM690 has logic-LOW RESET output while the

ASM805 has an inverted logic-HIGH RESET output.

Microprocessors with bidirectional reset pins can pose a

problem when the supervisory circuit and the microprocessor

output pins attempt to go to opposite logic states. The

problem can be resolved by placing a 4.7kΩ resistor between

the RESET output and the microprocessor reset pin. This is

shown in Figure 2. Since the series resistor limits drive

capabilities, the reset signal to other devices should be

buffered.

Figure 1: RESET/RESET Timing

Figure 2: Interfacing with bi-directional

microprocessor reset inputs

RESET

GND

ASM690A

Power Supply

Bi-directional I/O pin

RESET

Buffered

BUF

4.7K

Ω

4 of 13

Notice: The information in this document is subject to change without notice

ASM690A / 692A

ASM802L / 802M

ASM805L

µP Power Supply Supervisor With Battery Backup Switch

rev 1.0

October 2003

Watchdog Input

As discussed in the Reset section, the Watchdog input is

used to monitor microprocessor activity. It can be used to

insure that the microprocessor is in a continually responsive

state by requiring that the WDI pin be toggled every second.

If the WDI pin is not toggled within the 1.6 second window

(minimum tWD + tRS), a reset pulse will be asserted to return

the microprocessor to the initial start-up state. Pulses as

short as 50ns can be applied to the WDI pin. If this feature is

not used, the WDI pin should be open circuited or the logic

placed into a high-impedance state to allow the pin to float.

Backup-Battery Switchover

A power loss can be made less severe if the system RAM

contents are preserved. This is achieved in the ASM690/692/

802/805 by switching from the failed VCC to an alternate

power source connected at VBATT when VCC is less than the

reset threshold voltage (VCC < VRT), and VCC is less than

VBATT

. The VOUT pin is normally connected to VCC through a

2Ω PMOS switch but a brown-out or loss of VCC will cause a

switchover to VBATT by means of a 20Ω PMOS switch.

Although both conditions (VCC < VRT and VCC <VBATT) must

occur for the switchover to VBATT to occur, VOUT will be

switched back to VCC when VCC exceeds VRT irrespective of

the voltage at VBATT

. It should be noted that an internal

device diode (D1 in Figure 3) will be forward biased if VBATT

exceeds VCC by more than a diode drop when VCC is

switched to VOUT

. Because of this it is recommended that

VBATT be no greater than VRT +0.6V.

Table 1. Pin Connections in Battery Backup Mode

During the backup power mode, the internal circuitry of the

supervisory circuit draws power from the battery supply.

While VCC is still alive, the comparator circuits remain alive

and the current drawn by the device is typically 35µA. When

VCC drops more than 1.1V below VBATT

, the internal

switchover comparator, the PFI comparator and WDI

comparator will shut off, reducing the quiescent current drawn

by the IC to less than 1µA.

Condition SW1/SW2 SW3/SW4

VCC > Reset Threshold open closed

VCC < Reset Threshold

VCC > VBATT

open closed

VCC < Reset Threshold

VCC < VBATT

closed open

ASM690A/802A/805L Reset Threshold = 4.65V

ASM692A /ASM802M Reset Threshold = 4.4V

Pin Connection

VOUT

Connected to VBATT through internal PMOS

switch

VBATT Connected to VOUT

PFI Disabled

PFO Logic-LOW

RESET Logic-LOW (except on ASM805 where it is

HIGH)

WDI Watchdog timer disabled

SW1 SW2 D1 D2 SW3 SW4

ASM690A

ASM692A

ASM802L

ASM802M

ASM805L

VOUT

VCC

VBATT

Figure 3: Internal device configuration of battery

switch-over function

5 of 13

Notice: The information in this document is subject to change without notice

ASM690A / 692A

ASM802L / 802M

ASM805L

µP Power Supply Supervisor With Battery Backup Switch

rev 1.0

October 2003

Backup Power Sources - Batteries

Battery voltage selection is important to insure that the

battery does not discharge through the parasitic device diode

D1 (see Figure 3) when VCC is less than VBATT and VCC >

VRT

Table 2: Maximum Battery Voltages

Although most batteries that meet the requirements of Table

2 are acceptable, lithium batteries are very effective backup

source due to their high-energy density and very low self-

discharge rates.

Battery replacement while Powered

Batteries can be replaced even when the device is in a

powered state as long as VCC remains above the reset

threshold voltage VRT. In the ASM devices, a floating VBATT

pin will not cause a powersupply switchover as can occur in

some other supervisory circuits. If VBATT is not used, the pin

should be grounded.

Backup Power Sources - SuperCap™

Capacitor storage, with very high values of capacitance, can

be used as a back-up power source instead of batteries.

SuperCap™ are capacitors with capacities in the fractional

farad range. A 0.1 farad SuperCap™ would provide a useful

backup power source. Like the battery supply, it is important

that the capacitor voltage remain below the maximum

voltages shown in Table 2. Although the circuit of Figure 4

shows the most simple way to connect the SuperCap™, this

circuit cannot insure that an over voltage condition will not

occur since the capacitor will ultimately charge up to VCC. To

insure that an over voltage condition does not occur, the

circuit of Figure 5 is preferred. In this circuit configuration, the

diode-resistor pair clamps the capacitor voltage at one diode

drop below VCC. VCC itself should be regulated within ±5% of

5V for the ASM692A/802M or within ±10% of 5V for the

ASM690A/802L/805L to insure that the storage capacitor

does not achieve an over voltage state.

Note: SuperCapTM is a trademark of Baknor Industries

Part Number MAXIMUM Battery Voltage

ASM690A 4.80

ASM802L 4.80

ASM805L 4.80

ASM692A 4.55

ASM802M 4.55

100K ASM692A

ASM802M

VCC VOUT

VBATT RESET

(RESET)

GND

To µP

0.1F

Figure 5: Capacitor as a backup power source

Voltage clamped to 0.5V below VCC

VCC VOUT

VBATT RESET

(RESET)

GND

To µP

+5V

0.1F

Figure 4: Capacitor as a backup power source

To SRAM

ASM692A

ASM802M

To SRAM

+5V

6 of 13

Notice: The information in this document is subject to change without notice

ASM690A / 692A

ASM802L / 802M

ASM805L

µP Power Supply Supervisor With Battery Backup Switch

rev 1.0

October 2003

Operation without a Backup Power Source

When operating without a back-up power source, the VBATT

pin should be connected to GND and VOUT should be

connected to VCC, since power source switchover will not

occur. Connecting VOUT to VCC eliminates the voltage drop

due to the ON-resistance of the PMOS switch.

Power-Fail Comparator

The Power Fail feature is an independent voltage monitoring

function that can be used for any number of monitoring

activities. The PFI function can provide an early sensing of

power supply failure by sensing the voltage of the

unregulated DC ahead of the regulated supply sensing seen

by the backup-battery switchover circuitry. The PFI pin is

compared to a 1.25V internal reference. If the voltage at the

PFI pin is less than this reference voltage, the PFO pin goes

low. By sensing the voltage of the raw DC power supply, the

microprocessor system can prepare for imminent power-loss,

especially if the battery backup supply is not enabled. The

input voltage at the PFI pin results from a simple resistor

voltage divider as shown in Figure 6.

Power Fail Hysteresis

A noise margin can be added to the simple monitoring circuit

of Figure 6 by adding positive feedback from the PFO pin.

The circuit of Figure 7 adds this positive “latching” effect by

means of an additional resistor R3 connected between PFO

and PFI which helps in pulling PFI in the direction of PFO and

eliminating an indecision at the trip point. Resistor R3 is

normally about 10 times higher in resistance than R2 to keep

the hysteresis band reasonable and should be larger than

10kΩ to avoid excessive loading on the PFO pin. The

calculations for the correct values of resistors to set the

hysteresis thresholds are given in Figure 7. A capacitor can

be added to offer additional noise rejection by low-pass

filtering.

PFI PFO

GND

ASM690A

ASM692A

ASM802L

ASM802M

ASM805L

+5V

PFO

5R2

R1R2

--------------------1.25V<=

5R2

R1R2

--------------------1.25V>=

Figure 6: Simple Voltage divider sets PFI trip point

+5V

VIN

VCC

PFI

PFO

GND

+5V

VIN

To µP

ASM690A

ASM692A

ASM802L

ASM802M

ASM805L

C1*

* Optional

+5V

PFO

0V VLVH

VTRIP

Figure 7: Hysterisis Added To PFI Pin

TRIP 1.25

R2R2

--------------------

⎝⎠

⎜⎟

⎛⎞

-------------------------

1.25

R2R3

R1R2R3

------------------------------

⎝⎠

⎛⎞

------------------------------------

VL1.25–

-----------------------51.25–

-------------------

+1.25

----------

7 of 13

Notice: The information in this document is subject to change without notice

ASM690A / 692A

ASM802L / 802M

ASM805L

µP Power Supply Supervisor With Battery Backup Switch

rev 1.0

October 2003

Monitoring Capabilities Of The Power-fail Input:

Although designed for power supply failure monitoring, the

PFI pin can be used for monitoring any voltage condition that

can be scaled by means of a resistive divider. An example is

the negative power supply monitor configured in Figure 8. In

this case a good negative supply will hold the PFI pin below

1.25V and the PFO pin will be at logic “0”. As the negative

voltage declines, the voltage at the PFI pin will rise until it

exceeds 1.25V and the PFO pin will go to logic “1”.

VCC

PFI

GND

V- V- = VTRIP

PFO

+5V

ASM690A

ASM692A

ASM802L

ASM802M

ASM805L

+5V

PFO

VTRIP

V-

51.25–

------------------- 1.25 VTRIP

–

-------------------------------

Figure 8: Using PFI To Monitor Negative Supply Voltage

8 of 13

Notice: The information in this document is subject to change without notice

ASM690A / 692A

ASM802L / 802M

ASM805L

µP Power Supply Supervisor With Battery Backup Switch

rev 1.0

October 2003

Absolute Maximum Ratings

Parameter Min Max Unit

Pin Terminal Voltage with Respect to Ground

VCC -0.3 6.0 V

VBATT -0.3 6.0 V

All other inputs * -0.3 VCC + 0.3 V

Input Current at VCC 200 mA

Input Current at VBATT 50 mA

Input Current at GND 20 mA

Output Current

VOUT Short circuit protected

All other inputs 20 mA

Rate of Rise: VBATT and VCC 100 V/µs

Continuous Power Dissipation

Plastic DIP (derate 9mW/°C above 70°C) 800 mW

SO (derate 5.9mW/°C above 70°C) 500 mW

CerDIP (derate 8mW/°C above 70°C) 650 mW

Operating Temperature Range (C Devices) 0 70 °C

Operating Temperature Range (E Devices) -40 85 °C

Storage Temperature Range -65 160 °C

Lead Temperature Soldering, (10 sec) 300 °C

* The input voltage limits on PFI and WDI may be exceeded if the current is limited to less than 10mA

Note: These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods

may affect device reliability.

9 of 13

Notice: The information in this document is subject to change without notice

ASM690A / 692A

ASM802L / 802M

ASM805L

µP Power Supply Supervisor With Battery Backup Switch

rev 1.0

October 2003

Electrical Characteristics:

Unless other wise noted, VCC = 4.75V to 5.5V for the ASM690A / ASM802L / ASM805L and VCC = 4.5V to 5.5V for the ASM692A / ASM802M;

VBATT = 2.8V; and TA = TMIN to TMAX.

Parameter Symbol Conditions Min Typ Max Unit

VCC, VBATT Voltage

Range (Note 1)

ASM69_AC, ASM802_C 1.1 5.5

VASM805LC 1.1 5.5

ASM69_AE, ASM80__E 1.1 5.5

Supply Current

Excluding IOUT

ASM69_AC, ASM80__E 35 100

µA

ASM69_AC, ASM802_C 35 100

ISUPPLY in Battery

Backup Mode

(Excluding IOUT)

VCC = 0V, VBATT=2.8V

TA = 25°C

TA = TMIN to TMAX

1.0

5.0 µA

VBATT Standby

Current (Note 2) 5.5V>VCC>VBATT-0.2V TA = 25°C

TA = TMIN to TMAX

-0.1

-1.0

0.02

0.02 µA

VOUT Output

IOUT = 5mA VCC-

0.025 VCC-0.010

IOUT = 50mA VCC-0.25 VCC-0.10

VOUT in Battery

Backup Mode IOUT=250µA, VCC < VBATT-0.2V VBATT-0.1 VBATT-0.001 V

Battery Switch

Threshold,

VCC to VBATT

VCC < VRT

Power Up

Power Down

-20 mV

Battery Switch over

Hysteresis 40 mV

Reset Threshold VRT

ASM690A/802L/805L 4.50 4.65 4.75

ASM692A, ASM802M 4.25 4.40 4.50

ASM802L, TA = 25°C, VCC falling 4.55 4.70

ASM802M, TA=25°C, VCC falling 4.30 4.45

Notes:

1. If VCC or VBATT is 0V, the other must be greater than 2.0V.

2. Battery charging-current is “-”. Battery discharge current is “+”.

3. WDI is guaranteed to be in an intermediate level state if WDI is floating and VCC is within the operating voltage range. WDI

input impedance is 50 kΩ. WDI is biased to 0.3VCC.

10 of 13

Notice: The information in this document is subject to change without notice

ASM690A / 692A

ASM802L / 802M

ASM805L

µP Power Supply Supervisor With Battery Backup Switch

rev 1.0

October 2003

Reset Threshold

Hysteresis 40 mV

Reset Pulse Width tRS 140 200 280 ms

Reset Output Volt-

age

ISOURCE = 800µA VCC - 1.5

ISINK = 3.2mA 0.4

ASM69_AC, ASM802_C, VCC=1.0V,

ISINK=50µA 0.3

ASM69_AE, ASM802_E, VCC=1.2V,

ISINK=100µA 0.3

ASM805LC, ISOURCE=4µA, VCC = 1.1V 0.8

ASM805LE, ISOURCE=4µA, VCC = 1.2V 0.9

ASM805L, ISOURCE=800µA VCC - 1.5

ASM805L, ISINK=3.2mA 0.4

Watchdog Timeout tWD 1.00 1.60 2.25 sec

WDI Pulse Width tWP VIL = 0.4V, VIH = 0.8VCC 50 ns

WDI Input Current

WDI = VCC 50 150 µA

WDI = 0V -150 -50 µA

WDI Input Thresh-

old

(Note 3)

VCC = 5V, Logic LOW 0.8 V

PFI Input Thresh-

old

ASM69_A,ASM805L, VCC = 5V 1.20 1.25 1.30

ASM802_C/E, VCC = 5V 1.225 1.250 1.275

PFI Input Current -25 0.01 25 nA

PFO Output Volt-

age

ISOURCE = 800µA VCC - 1.5

ISINK = 3.2mA 0.4

Parameter Symbol Conditions Min Typ Max Unit

Notes:

1. If VCC or VBATT is 0V, the other must be greater than 2.0V.

2. Battery charging-current is “-”. Battery discharge current is “+”.

3. WDI is guaranteed to be in an intermediate level state if WDI is floating and VCC is within the operating voltage range. WDI

input impedance is 50 kΩ. WDI is biased to 0.3VCC.

11 of 13

Notice: The information in this document is subject to change without notice

ASM690A / 692A

ASM802L / 802M

ASM805L

µP Power Supply Supervisor With Battery Backup Switch

rev 1.0

October 2003

Package Information

Inches Millimeters

Min Max Min Max

Plastic DIP (8-Pin) *

A - 0.210 - 5.33

A1 0.015 - 0.38 -

A2 0.115 0.195 2.92 4.95

b 0.014 0.022 0.36 0.56

b2 0.045 0.070 1.14 1.78

b3 0.030 0.045 0.80 1.14

D 0.355 0.400 0.80 1.14

D1 0.005 - 0.13 -

E 0.300 0.325 7.62 8.26

E1 0.240 0.280 6.10 7.11

e 0.100 - 2.54

eA 0.300 - 7.62

eB - 0.430 - 10.92

eC - 0.060

L 0.115 0.150 2.92 3.81

CerDIP (8-Pin)

A - 0.200 - 5.08

A1 0.015 0.070 0.38 1.78

b 0.014 0.023 0.36 0.58

B2 0.038 0.065 0.97 1.65

C 0.008 0.015 0.20 0.38

D - 0.405 - 10.29

D1 0.005 - 0.13 -

E 0.290 0.320 7.37 8.13

E1 0.220 0.310 5.59 7.87

e 0.100 2.54

L 0.125 0.200 3.18 5.08

SO (8-Pin) **

A 0.053 0.069 1.35 1.75

A1 0.004 0.010 0.10 0.25

B 0.013 0.020 0.33 0.51

C 0.007 0.010 0.19 0.25

e 0.050 1.27

E 0.150 0.157 3.80 4.00

H 0.228 0.244 5.80 6.20

L 0.016 0.050 0.40 1.27

D 0.189 0.197 4.80 5.00

Plastic DIP (8-Pin)

CerDIP (8-Pin)

SO (8-Pin)

12 of 13

Notice: The information in this document is subject to change without notice

ASM690A / 692A

ASM802L / 802M

ASM805L

µP Power Supply Supervisor With Battery Backup Switch

rev 1.0

October 2003

Ordering Information

Part Number Reset Threshold (V) Temperature Range (°C) Pins-Package

ASM690A

ASM690ACPA 4.5 TO 4.75 0 TO +70 8-Plastic DIP

ASM690ACSA 4.5 TO 4.75 0 TO +70 8-SO

ASM690AC/D 4.5 TO 4.75 25 DICE

ASM690AEPA -40 TO +85 8-Plastic DIP

ASM690AESA 4.5 TO 4.75 -40 TO +85 8-SO

ASM690AMJA 4.5 TO 4.75 Contact Factory 8-Cer DIP

ASM692A

ASM692ACPA 4.25 TO 4.50 0 TO +70 8-Plastic DIP

ASM692ACSA 4.25 TO 4.50 0 TO +70 8-SO

ASM692AC/D 4.25 TO 4.50 25 DICE

ASM692AEPA 4.25 TO 4.50 -40 TO +85 8-Plastic DIP

ASM692AESA 4.25 TO 4.50 -40 TO +85 8-SO

ASM692AMJA 4.25 TO 4.50 Contact Factory 8-Cer DIP

ASM802L

ASM802LCPA 4.5 TO 4.75 0 TO +70 8-Plastic DIP

ASM802LCSA 4.5 TO 4.75 0 TO +70 8-SO

ASM802LAEPA 4.5 TO 4.75 -40 TO +85 8-Plastic DIP

ASM802LESA 4.5 TO 4.75 -40 TO +85 8-SO

ASM802M

ASM802MCPA 4.25 TO 4.50 0 TO +70 8-Plastic DIP

ASM802MCSA 4.25 TO 4.50 0 TO +70 8-SO

ASM802MEPA 4.25 TO 4.50 -40 TO +85 8-Plastic DIP

ASM802MESA 4.25 TO 4.50 -40 TO +85 8-SO

ASM805L

ASM805LCPA 4.5 TO 4.75 0 TO +70 8-Plastic DIP

ASM805LCSA 4.5 TO 4.75 0 TO +70 8-SO

ASM805LC/D 4.5 TO 4.75 25 DICE

ASM805LEPA 4.5 TO 4.75 -40 TO +85 8-Plastic DIP

ASM805LESA 4.5 TO 4.75 -40 TO +85 8-SO

ASM805LMJA 4.5 TO 4.75 Contact Factory 8-Cer DIP

Alliance Semiconductor Corporation

2575, Augustine Drive,

Santa Clara, CA 95054

Tel: 408 - 855 - 4900

Fax: 408 - 855 - 4999

www.alsc.com

Part Number: ASM690A / 692A

ASM802L / 802M

ASM805L

Document Version: 1.0

registered trademarks of Alliance. All other brand and product names may be the trademarks of their respective companies. Alliance reserves the

right to make changes to this document and its products at any time without notice. Alliance assumes no responsibility for any errors that may

appear in this document. The data contained herein represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the

right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these

specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and

users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. Alliance does not assume any responsibility

or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale

and/or use of Alliance products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any

intellectual property rights, except as express agreed to in Alliance's Terms and Conditions of Sale (which are available from Alliance). All sales of

Alliance products are made exclusively according to Alliance's Terms and Conditions of Sale. The purchase of products from Alliance does not

convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of Alliance or third

parties. Alliance does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may

reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that

the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use.

ASM690A / 692A

ASM802L / 802M

ASM805L

October 2003

rev 1.0