2.4 GHz to 4 GHz,
Tunable Low-Pass Filter
Data Sheet
HMC881A
Rev. 0 Document Feedback
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Trademarks and registered trademarks are the property of their respective owners.
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Tel: 781.329.4700 ©2019 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
Amplitude settling time: 200 ns (typical)
Wideband rejection: ≥35 dB
Single-chip replacement for mechanically tuned designs
RoHS compliant, 32-lead, 5 mm × 5 mm LFCSP package
APPLICATIONS
Testing and measurement equipment
Military radar and electronic warfare/electronic
countermeasures (ECMs)
Satellite communication and space
Industrial and medical equipment
FUNCTIONAL BLOCK DIAGRAM
RFOUTRFIN
V
FCTL
GNDGND
17299-001
HMC881A
Figure 1.
GENERAL DESCRIPTION
The HMC881A is a monolithic microwave integrated circuit
(MMIC) low-pass filter that features a user-selectable cutoff
frequency. The cutoff frequency can be varied from 2.4 GHz to
4 GHz by applying a single analog tuning voltage between 0 V
and 14 V. This low-pass filter provides a low 3 dB insertion loss,
16.5 dB return loss, and 1.35 × f3dB stopband attenuation of
>20 dB. This tunable filter can be used as a much smaller
alternative to physically large switched filter banks and cavity
tuned filters. The HMC881A has excellent microphonics due to
the monolithic design, and provides a dynamically adjustable
solution in advanced communications applications. The low-
pass tunable filter is packaged in a RoHS compliant 5 mm ×
5 mm LFCSP package.
HMC881A Data Sheet
Rev. 0 | Page 2 of 11
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 4
ESD Caution .................................................................................. 4
Pin Configuration and Function Descriptions ............................. 5
Typical Performance Characteristics ..............................................6
Theory of Operation .........................................................................9
Applications Information .............................................................. 10
Typical Application Circuit ....................................................... 10
Evaluation PCB ........................................................................... 10
Outline Dimensions ....................................................................... 11
Ordering Guide .......................................................................... 11
REVISION HISTORY
4/2019—Revision 0: Initial Version
Data Sheet HMC881A
Rev. 0 | Page 3 of 11
SPECIFICATIONS
TA = 25°C, with tuning voltage (VFCTL) varying from 0 V to 14 V, unless otherwise noted.
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
FREQUENCY RANGE
Passband 0 4 GHz
Cutoff Frequency (f3dB) 2.4 4 GHz
REJECTION
Stopband Frequency 1.35 × f3dB GHz ≥20 dB attenuation
Re-Entry Frequency ≥30 GHz ≥35 dB wideband rejection
LOSS
Insertion Loss 3 dB
Return Loss 16.5 dB
DYNAMIC PERFORMANCE
Maximum Input Power for Linear
Operation
10 dBm
Input Third-Order Intercept 41 dBm Input power (PIN) = 20 dBm, two-tone
Group Delay 0.5 ns
Amplitude Settling 200 ns Time to settle to minimum insertion loss, within ≤0.5 dB of
static insertion loss
Drift Rate 0.6 MHz/°C
RESIDUAL PHASE NOISE
1 MHz Offset −170 dBc/Hz
TUNING
Voltage (V
FCTL
)
0
14
V
Current (IFCTL) ±1 µA Rated current for pin
HMC881A Data Sheet
Rev. 0 | Page 4 of 11
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Tuning
Voltage (VFCTL) −0.5 V to +15 V
Current (IFCTL) ±1 mA
RF Input Power 27 dBm
Temperature
Operating Temperature Range −40°C to +85°C
Storage Temperature Range
−65°C to +150°C
Junction Temperature for 1Million Mean
Time to Failure (MTTF)
175°C
Nominal Junction Temperature
(Exposed Pad Temperature (TEPAD) = 85°C,
PIN = 10 dBm)
90°C
Electrostatic Discharge (ESD) Rating
Human Body Model (HBM) 1500 V
Field Induced Charge Device Model
(FICDM)
1250 V
Moisture Sensitivity Level (MSL) Rating MSL3
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
Data Sheet HMC881A
Rev. 0 | Page 5 of 11
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NOTES
1. NI C = NOT INTE RNALLY CO NNE CTED. ALL DATA SHOWN
HEREI N WAS MEASURE D WITH T HE S E P INS CO NNE CTED
TO RF AND DC G ROUND EX TERNALLY.
2. EXPOSED PAD. THE PACKAGE BO TTOM HAS AN EXPOSED
PAD T H AT MUST BE CONNECT E D TO RF AND DC GRO UND.
24 NIC
23 NIC
22 NIC
21 NIC
20 GND
19 RFOUT
18 NIC
17 NIC
1
2
3
4
5
6
7
8
NIC
NIC
NIC
NIC
GND
RFIN
NIC
NIC
9
10
11
12
13
14
15
16
NIC
NIC
NIC
NIC
NIC
VFCTL
NIC
NIC
32
31
30
29
28
27
26
25
NIC
NIC
NIC
NIC
NIC
NIC
NIC
NIC
HMC881
A
TOP VIEW
(No t t o Scal e)
17299-002
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1 to 4, 7 to 13, 15 to
18, 21 to 32
NIC Not Internally Connected. These pins are not connected internally. All data shown herein was measured
with these pins connected to RF and dc ground externally.
5, 20
GND
Ground. Connect these pins to RF and dc ground.
6 RFIN Radio Frequency Input. This pin is dc-coupled and matched to 50 Ω. Do not apply an external voltage
to this pin.
14 VFCTL Tuning Voltage. This pin controls the cutoff frequency of the device.
19 RFOUT Radio Frequency Output. This pin is dc-coupled and matched at 50 Ω. Do not apply an external
voltage to this pin.
EPAD Exposed Pad. The package bottom has an exposed metal pad that must be connected to RF and dc
ground.
GND
17299-003
Figure 3. GND Interface Schematic
RFIN
1.0kΩ
17299-004
Figure 4. RFIN Interface Schematic
V
FCTL
34.5pF 6.1pF
15nH 500Ω
17299-005
Figure 5. VFCTL Interface Schematic
RFOUT
1.0kΩ
17299-006
Figure 6. RFOUT Interface Schematic
HMC881A Data Sheet
Rev. 0 | Page 6 of 11
TYPICAL PERFORMANCE CHARACTERISTICS
0
–80
–70
–60
–50
–40
–30
–20
–10
0510 15 20 25 30
INSERTION LOSS (dB)
BROADBAND RF FREQUENCY ( GHz)
14V
7V
0V
17299-007
Figure 7. Insertion Loss vs. Broadband RF Frequency at Various VFCTL Voltages
0
–12
–10
–8
–6
–4
–2
0 1 3
2 4 5
INSERTION LOSS (dB)
RF FREQ UE NCY ( GHz)
14V
7V
0V
17299-008
Figure 8. Insertion Loss vs. RF Frequency at Various VFCTL Voltages
0
–12
–10
–8
–6
–4
–2
0 1 32 4 5
INSERTION LOSS (dB)
RF FREQ UE NCY ( GHz)
+85°C
+25°C
–40°C
17299-009
Figure 9. Insertion Loss vs. RF Frequency at Various Temperatures, VFCTL = 7 V
0
–40
–30
–20
–10
0 5 15 2510 20 30
RET URN LOS S ( dB)
BROADBAND RF FRE QUENCY ( GHz)
S22, 14V
S22, 7V
S22, 0V
S11, 14V
S11, 7V
S11, 0V
17299-010
Figure 10. Return Loss vs. Broadband RF Frequency at Various VFCTL Voltages
0
–50
–40
–30
–20
–10
RET URN LOS S ( dB)
RF FREQ UE NCY ( GHz)
S22, 14V
S22, 7V
S22, 0V
S11, 14V
S11, 7V
S11, 0V
0 1 32 4 5
17299-011
Figure 11. Return Loss vs. RF Frequency at Various VFCTL Voltages
0
–60
–50
–40
–30
–20
–10
RET URN LOS S ( dB)
RF FREQ UE NCY ( GHz)
S22, –40°C
S22, + 25°C
S22, + 85°C
S11, –40°C
S11, + 25°C
S11, + 85°C
0 1 2 3 4 5
17299-012
Figure 12. Return Loss vs. RF Frequency at Various Temperatures, VFCTL = 7 V
Data Sheet HMC881A
Rev. 0 | Page 7 of 11
5
1
2
3
4
0 1 5 9 133 7 112 6 104 8 12 14
f
3dB
(GHz)
V
FCTL
(V)
+85°C
+25°C
–40°C
17299-013
Figure 13. Cutoff Frequency (f3dB) vs. VFCTL at Various Temperatures
1.5
1.0
1.1
1.2
1.3
1.4
0 1 5 9 1337112 6 104 8 12 14
REJECT IO N RATIO (dB)
VFCTL (V)
+85°C
+25°C
–40°C
17299-014
Figure 14. Rejection Ratio vs. VFCTL at Various Temperatures; Rejection Ratio Is the
Ratio of the Frequency of Which the Relative Insertion Loss Is 20 dB to f3dB
0
–5
–4
–3
–2
–1
0 1 5 9 133 7 112 6 104 8 12 14
INSERTION LOSS (dB)
VFCTL (V)
+85°C
+25°C
–40°C
17299-015
Figure 15. Insertion Loss vs. VFCTL at Various Temperatures
2
–30
–22
–14
–6
–26
–18
–10
–2
0 1 5 9 13
37112610
4 8 12 14
MAXIMUM RETURN LOSS (dB)
VFCTL (V)
+85°C
+25°C
–40°C
17299-016
Figure 16. Maximum Return Loss vs. VFCTL at Various Temperatures, 2 dB
Bandwidth
250
0
50
100
150
200
0 1 5 9 133 7 11
2 6 104 8 12 14
TUNING SENSITIVI T Y (MHz/V)
VFCTL (V)
+85°C
+25°C
–40°C
17299-017
Figure 17. Tuning Sensitivity vs. VFCTL at Various Temperatures
–100
–180
–160
–170
–150
–140
–130
–120
–110
10 100 10k 1M1k 100k 10M 100M
RESI DUAL PHAS E NOIS E ( dBc/ Hz )
OFF SET F REQUENCY (GHz)
14V
7V
0V
17299-018
Figure 18. Residual Phase Noise vs. Offset Frequency at
Various VFCTL Voltages
HMC881A Data Sheet
Rev. 0 | Page 8 of 11
17299-019
0
0.2
0.4
0.6
0.8
1.0
0.5 1.5 2.5 3.5 4.5 5.5 6.5
GROUP DELAY (nsec)
RF FREQ UE NCY ( GHz)
0V
7V
14V
Figure 19. Group Delay vs. RF Frequency at Various VFCTL Voltages
50
0
10
20
30
40
45
5
15
25
35
0 1 5 9 133 7 112 6 104 8 12 14
INPUT I P 3 ( dBm)
VFCTL (V)
+85°C
+25°C
–40°C
17299-020
Figure 20. Input IP3 vs. VFCTL at Various Temperatures, PIN = 20 dBm
25
–15
–5
5
15
20
–10
0
10
0 2 10 18614 22412 20
816 24 26
PHASE S HIF T (Deg rees)
INPUT POWE R ( dBm)
V
FCTL
= 0V
V
FCTL
= 3V
V
FCTL
= 7V
V
FCTL
= 10V
V
FCTL
= 14V
17299-021
Figure 21. Phase Shift vs. Input Power at Various VFCTL Voltages
HMC881A Data Sheet
Rev. 0 | Page 10 of 11
APPLICATIONS INFORMATION
TYPICAL APPLICATION CIRCUIT
Figure 22 shows the typical application circuit for the
HMC881A. The RFIN and RFOUT pins are DC-coupled and
require external, 100 pF series capacitors (C1 and C2).
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
PACKAGE
BASE
GND
C2
100pF
C1
100pF OUT
J2
IN
J1
V
FCTL
J3
HMC881A
17299-025
Figure 22. Typical Application Circuit
EVALUATION PCB
All RF traces are routed on Layer 1 (primary side) and the
remaining three layers are ground planes that provide a solid
ground for RF transmission lines, as shown in Figure 23. The
top dielectric material is Rogers 4350, which offers low loss
performance. The prepreg material in Layer 2 attaches the Isola
370HR core layer with copper traces layers above and below the
core layer. Both prepreg material and the Isola 370HR core layer
are used to achieve the required board finish thickness.
NOMINAL
FINISHED
BOARD
THI CKNE S S 0.062"
±10%
PRIMARY SILKSCREEN
PRIMARY SOLDER MASK
PRIMARY SIDE (LAYER 1)
L2_G ND P LANE ( LAYER 2)
L3_G ND P LANE ( LAYER 3)
SECO NDARY S IDE ( LAYER 4)
0.5o z Cu
ARLO N OR RO GERS CORE 10M ILS ± 1M IL ( CRIT ICAL)
0.5o z Cu
PREPREG AS REQUIRED
0.5o z Cu
370HR
0.5o z Cu
17299-026
Figure 23. Cross Sectional View of the EV1HMC881ALP5 PCB layers
The circuit board in this application uses RF circuit design
techniques. Signal lines must have 50 Ω impedance and the
package ground leads and exposed pad must be connected
directly to the ground plane (see Figure 23). Use a sufficient
number of via holes to connect the top and bottom ground
planes. The evaluation circuit board shown in Figure 24 is
available from Analog Devices, Inc., upon request.
Table 4. Bill of Materials for the EV1HMC881ALP5
Item Description
J1 to J2 PCB mount SRI Subminiature Version A (SMA)
Connector
J3 to J4 PCB mount Johnson SMA connector
C1, C2 Capacitor, 100 pF, 0402
U1
HMC881A
PCB1 08-0495982 evaluation PCB
1 Circuit board material is Arlon 25FR or Rogers 25FR
2 08-049598 is the raw, bare PCB identifier. Reference the EV1HMC881ALP5
when ordering the complete evaluation PCB.
17299-027
1.000
2 × 0.095
1.570
2.000
2 × R.032
Figure 24. Evaluation PCB Top Layer Outline Dimensions
Data Sheet HMC881A
Rev. 0 | Page 11 of 11
OUTLINE DIMENSIONS
0.50
0.40
0.30
09-12-2018-C
1
0.50
BSC
TOP VIEW
TOP VIEW
32
9
16
17
24
25
8
0.05 M AX
0.02 NO M
0.20 REF
COPLANARITY
0.08
0.30
0.25
0.18
5.10
5.00 SQ
4.90
0.80
0.75
0.70
0.20 M IN
3.75
3.60 SQ
3.55
COM P LIANT T O JEDEC S TANDARDS MO-220-WHHD-5
PKG-004570
PIN 1
IN DIC ATOR AR E A OP TIO NS
(SEE DETAIL A)
DETAIL A
(JEDEC 95)
PIN 1
INDICATOR
AREA
SEATING
PLANE
FOR PRO P E R CONNECT IO N OF
THE EXPOSED PAD, REFER TO
THE P IN CO NFIGURAT ION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
EXPOSED
PAD
Figure 25. 32-Lead Lead Frame Chip Scale Package [LFCSP]
5 mm × 5 mm Body and 0.75 mm Package Height
(CP-32-12)
Dimensions shown in millimeters
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option
HMC881ALP5E −40°C to +85°C 32-Lead Lead Frame Chip Scale Package [LFCSP] CP-32-12
HMC881ALP5ETR −40°C to +85°C 32-Lead Lead Frame Chip Scale Package [LFCSP] CP-32-12
EV1HMC881ALP5 Evaluation PCB
1 All models are RoHS compliant parts.
©2019 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D17299-0-4/19(0)
