International Rectifier PD-9.830 IRFI520G HEXFET Power MOSFET Description Third Generation HEXFETs from International Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low Isolated Package High Voltage isolation= 2.5KVRMS Sink to Lead Creepage Dist.= 4.8mm 175C Operating Temperature Dynamic dv/dt Rating Low Thermal Resistance Voss = 100V Rps(on) = 0.272 on-resistance and cost-effectiveness. The TO-220 Fullpak eliminates the need for additional insulating hardware in commercial-industrial applications. The moulding compound used provides a high isolation capability and a low thermal resistance between the tab and external heatsink. This isolation is equivalent to using a 100 micron mica barrier with standard TO-220 product. The Fullpak is mounted to a heatsink using a single clip or by a single screw fixing. TO-220 FULLPAK Absolute Maximum Ratings Parameter Max. Units lo @ Tc = 28C Continuous Drain Current, Vas @ 10 V 7.2 Ip @ Tc = 100C | Continuous Drain Current, Vas @ 10 V 51 A {fom Pulsed Drain Current 29 Pp @ Tc =25C_| Power Dissipation 37 WwW Linear Derating Factor 0.24 WC Vas Gate-to-Source Voltage +20 v Eas Single Pulse Avalanche Energy @ 36 mJ lan Avalanche Current 7.2 A Ear Repetitive Avalanche Energy 3.7 mJ dv/dt Peak Diode Recovery dv/dt @ 5.5 Vins Ty Operating Junction and -55 to +175 Tsta@ Storage Temperature Range C Soldering Temperature, for 10 seconds 300 (1.6mm from case) Mounting Torque, 6-32 or M3 screw 10 lbfein (1.1 Nem) Thermal Resistance Parameter Min. Typ. Max. Units Rec Junetion-to-Case = = 44 CW Raa | Junction-to-Ambient _ 65 569IRFI520G Electrical Characteristics @ Ty = 25C (unless otherwise specified) Parameter Min. | Typ. | Max. | Units Test Conditions Viarpss Drain-to-Source Breakdown Voltage 100 _ V__ | Ves=0V, In= 250A AVerypss/ATy| Breakdown Voltage Temp. Coefficient | 013 | -- | VC | Reference to 25C, Ip= 1mA Rosen) Static Drain-to-Source On-Resistance _ | 0.27 Q | Vas=10V, lp=4.3A @ Vasc) Gate Threshold Voltage 2.0 _ 4.0 V__| Vos=Ves, Ip= 250A Ots Forward Transconductance 2.3 _ _ S| Vos=50V, In=4.3A @ loss Drain-to-Source Leakage Current 25 BA Vne=100V, Vas-0V _ _ 250 Vos=80V, Vas=0V, Ty=150C lass Gate-to-Source Forward Leakage _ 100 nA Vas=20V Gate-to-Source Reverse Leakage _ | -100 Vas=-20V Qg Total Gate Charge _ _ 16 Ip=9.2A Qgs Gate-to-Source Charge | 44 | nC | Vpg=80V Qga Gate-to-Drain ("Miller") Charge _ _ 7.7 Vas=10V See Fig. 6 and 13 taon) Turn-On Delay Time _ 8.8 _ Vop=50V tr Rise Time _ 30 _ ns Ip=9.2A taosty Turn-Off Delay Time _ 19 _ Re=18Q th Fall Time _ 20 _ Rp=5.20 See Figure 10 Lo Internal Drain Inductance _ 4.5 _ e no. pend ) nH | from package (fs: Ls Internal Source Inductance | 75) and center of =f die contact 8 Ciss Input Capacitance _ 360 _ Ves=0V Coss Output Capacitance | 150) PF | Vog= 25V Crss Reverse Transfer Capacitance _ 34 _ f=1.0MHz See Figure 5 Cc Drain to Sink Capacitance _ 12 _ pF | f=1.0MHz Source-Drain Ratings and Characteristics i Parameter Min. | Typ. | Max. | Units Test Conditions iis Continuous Source Current _ _ 72 MOSFET symbol 5 (Body Diode) , A showing the Ism Pulsed Source Current _ _ 29 integral reverse & (Body Diode) p-n junction diode. s Vsp Diode Forward Voltage _ _ 25 Vs | Ty=25C, Is=7.2A, Ves=0V tr Reverse Recovery Time _ 130 | 260 ns | Ty=25C, Ir=9.2A Qn Reverse Recovery Charge | 0.65 | 1.3 | uC | di/dt=100A/us ton Forward Turn-On Time Intrinsic turn-on time is neglegible (turn-on is dominated by Ls+Lp) Notes: Repetitive rating; pulse width limited by Isps9.2A, di/dts110A/us, Vop<V(eR)Dss, t=60s, f=60Hz max. junction temperature (See Figure 11) Tys175C Vpp=25V, starting T3=25C, L=1.0mH Pulse width < 300 ps; duty cycle <2%. Ra@=25Q, las=7.2A (See Figure 12) 570Ip, Drain Current (Amps) Ip, Drain Current (Amps) 20us WIDTH To = 26C 107 Vps, Drain-to-Source Voltage (voits) Fig t. Typical Output Characteristics, Tc=25C Vpg = 5OV 20us PULSE WIDTH Vas, Gate-to-Source Voltage (volts) Fig 3. Typical Transfer Characteristics Roson) Drain-to-Source On Resistance Ip, Drain Current (Amps) (Normatized) nm eS ae IRFI520G 20us PULSE WIDTH To = 175C 10 Vos, Drain-to-Source Voltage (volts) Fig 2. Typical Output Characteristics, To=175C -40 9 Ty, Junction Temperature (C) Fig 4. Normalized On-Resistance Vs. Temperature 671IRFI520G Capacitance (pF) Isp, Reverse Drain Current (Amps) 750 20 Cgg + Cgg. Cys SHORTED Cgq Cag + bh a o in e o te a w S 3 Ves, Gate-to-Source Voltage (volts) Cogs FOR TEST CIRCUIT 0 0 SEE FIGURE 413 0 4 8 16 20 Vos, Drain-to-Source Voltage (volts) Qg, Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs. Drain-to-Source Voltage Gate-to-Source Voltage tot 103 5 OPERATION IN THIS AREA LIMITED Ros (ON) 2 BQ 102 Es = 2 2 10 5 10 Sos S Oo 2 a 1 5 Te=25C 2 TyH175C Vgg = OV SINGLE sovt O.1 . . . . . . 2 0.4 ? 6 4 2 5 40 2 5 402 2 5 403 Vsp, Source-to-Drain Voltage (volts) Vps, Drain-to-Source Voltage (volts) Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area Forward Voltage 572Ip, Drain Current (Amps) mo 8.0 n o B 0.0 26 Fig 9. 50 IRFI520G Vos WY D.U.T. . = "Vp YP 10V Pulse Width < ips Duty Factor < 0.1% as Fig 10a. Switching Time Test Circuit Vps 90% 10% 75 100 125 150 475 Ves Tc, Case Temperature (C) taon) tr tao) th Maximum Drain Current Vs. Fig 10b. Switching Time Waveforms Case Temperature Thermal Response (Ze jc) 10 4 O.4 Fr SINGLE PULSE Pp (THERMAL RESPONSE) jot etl eal NOTES: 4. DUTY FACTOR, D=ti/te 2, PEAK 15 =PoM x Zthyc tT, 10 195 1074 1093 10? 0.41 1 10 ty, Rectangular Pulse Duration (seconds) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 573IRFI520G Vary tp to obtain Vos > required las Ip TOP 2.94 5.4A BOTTOM 7.24 Eas, Single Pulse Energy (mJ) fp = 25V Vps___, / oo / 25 50 75 100 125 450 175 / Starting Ty, Junction Temperature(C) lag wee Fig 12c. Maximum Avalanche Energy Fig 12b. Unclamped Inductive Waveforms Vs. Drain Current Current Regulator Q tov 47 WO eb etestesae | It Qas ++ Sap Ves Ve ama []. | Charge Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit Appendix A: Figure 14, Peak Diode Recovery dv/dt Test Circuit - See page 1505 Appendix B: Package Outline Mechanical Drawing See page 1510 Appendix C: Part Marking Information See page 1517 International Rectifier 574