Control
CLK GPIOANDCONTROL
Oscillator
SPI
TestSignalsand
Monitors
PACE
SPI
RLD
Wilson
Terminal
WCT
Reference
REF
ADC7
ADC8
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
A7
A8
A1
A2
A3
A4
A5
A6
MUX
INPUTS
¼ ¼
¼
ToChannel
RESP
Resp
RESP
DEMOD
ADS129xR
ADS129xR
ADS1294, ADS1294R
ADS1296, ADS1296R
ADS1298, ADS1298R
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SBAS459I JANUARY 2010REVISED JANUARY 2012
Low-Power, 8-Channel, 24-Bit Analog Front-End for Biopotential Measurements
Check for Samples: ADS1294,ADS1294R,ADS1296,ADS1296R,ADS1298,ADS1298R
With its high levels of integration and exceptional
1FEATURES performance, the ADS1294/6/8/4R/6R/8R family
23Eight Low-Noise PGAs and Eight enables the development of scalable medical
High-Resolution ADCs (ADS1298, ADS1298R) instrumentation systems at significantly reduced size,
Low Power: 0.75mW/channel power, and overall cost.
Input-Referred Noise: 4μVPP (150Hz BW, G = 6) The ADS1294/6/8/4R/6R/8R have a flexible input
multiplexer per channel that can be independently
Input Bias Current: 200pA connected to the internally-generated signals for test,
Data Rate: 250SPS to 32kSPS temperature, and lead-off detection. Additionally, any
CMRR: 115dB configuration of input channels can be selected for
Programmable Gain: 1, 2, 3, 4, 6, 8, or 12 derivation of the right leg drive (RLD) output signal.
The ADS1294/6/8/4R/6R/8R operate at data rates as
Supports AAMI EC11, EC13, IEC60601-1, high as 32kSPS, thereby allowing the implementation
IEC60601-2-27, and IEC60601-2-51 Standards of software PACE detection. Lead-off detection can
Unipolar or Bipolar Supplies: be implemented internal to the device, either with a
AVDD = 2.7V to 5.25V, DVDD = 1.65V to 3.6V pull-up/pull-down resistor or an excitation current
sink/source. Three integrated amplifiers generate the
Built-In Right Leg Drive Amplifier, Lead-Off Wilson Central Terminal (WCT) and the Goldberger
Detection, WCT, PACE Detection, Test Signals Central Terminals (GCT) required for a standard
Integrated Respiration Impedance 12-lead ECG. The ADS1294R/6R/8R versions
Measurement (ADS1294R/6R/8R only) include a fully-integrated, respiration impedance
Digital PACE Detection Capability measurement function.
Built-In Oscillator and Reference Multiple ADS1294/6/8/4R/6R/8R devices can be
Flexible Power-Down, Standby Modes cascaded in high channel count systems in a
daisy-chain configuration.
SPI-Compatible Serial Interface Package options include a tiny 8mm ×8mm, 64-ball
Operating Temperature Range: BGA and a TQFP-64. The ADS1294/6/8 BGA version
40°C to +85°Cis specified over the commercial temperature range of
0°C to +70°C. The ADS1294R/6R/8R BGA and
APPLICATIONS ADS1294/6/8 TQFP versions are specified over the
Medical Instrumentation (ECG, EMG and EEG): industrial temperature range of 40°C to +85°C.
Patient monitoring; Holter, event, stress, and
vital signs including ECG, AED, telemedicine
Bispectral index (BIS), Evoked audio potential
(EAP), Sleep study monitor
High-Precision, Simultaneous, Multichannel
Signal Acquisition
DESCRIPTION
The ADS1294/6/8/4R/6R/8R are a family of
multichannel, simultaneous sampling, 24-bit,
delta-sigma (ΔΣ) analog-to-digital converters (ADCs)
with built-in programmable gain amplifiers (PGAs),
internal reference, and an onboard oscillator. The
ADS1294/6/8/4R/6R/8R incorporate all of the features
that are commonly required in medical
electrocardiogram (ECG) and electroencephalogram
(EEG) applications.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2SPI is a trademark of Motorola.
3All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright ©20102012, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
ADS1294, ADS1294R
ADS1296, ADS1296R
ADS1298, ADS1298R
SBAS459I JANUARY 2010REVISED JANUARY 2012
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
FAMILY AND ORDERING INFORMATION(1)
MAXIMUM OPERATING
PACKAGE NUMBER OF ADC SAMPLE RATE TEMPERATURE RESPIRATION
PRODUCT OPTION CHANNELS RESOLUTION (kSPS) RANGE CIRCUITRY
BGA 4 16 8 0°C to +70°C No
ADS1194 TQFP 4 16 8 0°C to +70°C No
BGA 6 16 8 0°C to +70°C No
ADS1196 TQFP 6 16 8 0°C to +70°C No
BGA 8 16 8 0°C to +70°C No
ADS1198 TQFP 8 16 8 0°C to +70°C No
ADS1294 BGA 4 24 32 0°C to +70°C External
ADS1294R BGA 4 24 32 40°C to +85°C Yes
ADS1294 TQFP 4 24 32 40°C to +85°C External
ADS1296 BGA 6 24 32 0°C to +70°C External
ADS1296R BGA 6 24 32 40°C to +85°C Yes
ADS1296 TQFP 6 24 32 40°C to +85°C External
ADS1298 BGA 8 24 32 0°C to +70°C External
ADS1298R BGA 8 24 32 40°C to +85°C Yes
ADS1298 TQFP 8 24 32 40°C to +85°C External
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com.
ABSOLUTE MAXIMUM RATINGS(1)
Over operating free-air temperature range, unless otherwise noted. ADS1294, ADS1296, ADS1298 UNIT
ADS1294R, ADS1296R, ADS1298R
AVDD to AVSS 0.3 to +5.5 V
DVDD to DGND 0.3 to +3.9 V
AVSS to DGND 3 to +0.2 V
VREF input to AVSS AVSS 0.3 to AVDD + 0.3 V
Analog input to AVSS AVSS 0.3 to AVDD + 0.3 V
Digital input voltage to DGND 0.3 to DVDD + 0.3 V
Digital output voltage to DGND 0.3 to DVDD + 0.3 V
Input current (momentary) 100 mA
Input current (continuous) 10 mA
Commerical Grade: ADS1294, ADS1296, ADS1298 0 to +70 °C
Operating
temperature Industrial grade: ADS1294I, ADS1296I, ADS1298I, 40 to +85 °C
range ADS1294RI, ADS1296RI, ADS1298RI
Human body model (HBM) ±2000 V
JEDEC standard 22, test method A114-C.01, all pins
ESD ratings Charged device model (CDM) ±500 V
JEDEC standard 22, test method C101, all pins
Storage temperature range 60 to +150 °C
Maximum junction temperature (TJ) +150 °C
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
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SBAS459I JANUARY 2010REVISED JANUARY 2012
ELECTRICAL CHARACTERISTICS
Minimum/maximum specifications apply for all commercial grade (0°C to +70°C) devices and from 40°C to +85°C for
industrial grades devices. Typical specifications are at +25°C. All specifications at DVDD = 1.8V, AVDD AVSS = 3V(1),
VREF = 2.4V, external fCLK = 2.048MHz, data rate = 500SPS, High-Resolution mode, and gain = 6, unless otherwise noted.
ADS1294, ADS1296, ADS1298
ADS1294R, ADS1296R, ADS1298R
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ANALOG INPUTS
Full-scale differential input voltage (AINP AINN) ±VREF/GAIN V
See the Input Common-Mode Range
Input common-mode range subsection of the PGA Settings and Input
Range section
Input capacitance 20 pF
TA= +25°C, input = 1.5V ±200 pA
Input bias current TA= 0°C to +70°C, input = 1.5V ±1 nA
TA=40°C to +85°C, input = 1.5V ±1.2 nA
No lead-off 1000 M
DC input impedance Current source lead-off detection 500 M
Pull-up resistor lead-off detection 10 M
PGA PERFORMANCE
Gain settings 1, 2, 3, 4, 6, 8, 12
Bandwidth See Table 6
ADC PERFORMANCE
Data rates up to 8kSPS, no missing codes 24 Bits
Resolution 16kSPS data rate 19 Bits
32kSPS data rate 17 Bits
fCLK = 2.048MHz, High-Resolution mode 500 32000 SPS
Data rate fCLK = 2.048MHz, Low-Power mode 250 16000 SPS
CHANNEL PERFORMANCE
DC Performance
Gain = 6(2), 10 seconds of data 5 μVPP
Gain = 6, 256 points, 0.5 seconds of data 4 7 μVPP
Input-referred noise Gain settings other than 6, data rates other See Noise Measurements section
than 500SPS
Full-scale with gain = 6, best fit 8 ppm
Full-scale with gain = 6, best fit, 40 ppm
Integral nonlinearity ADS1294R/6R/8R channel 1
20dBFS with gain = 6, best fit, 8 ppm
ADS1294R/6R/8R channel 1
Offset error ±500 µV
Offset error drift 2 µV/°C
Gain error Excluding voltage reference error ±0.2 ±0.5 % of FS
Gain drift Excluding voltage reference drift 5 ppm/°C
Gain match between channels 0.3 % of FS
(1) Performance is applicable for 5V operation as well. Production testing for limits is performed at 3V.
(2) Noise data measured in a 10-second interval. Test not performed in production. Input-referred noise is calculated with input shorted
(without electrode resistance) over a 10-second interval.
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SBAS459I JANUARY 2010REVISED JANUARY 2012
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ELECTRICAL CHARACTERISTICS (continued)
Minimum/maximum specifications apply for all commercial grade (0°C to +70°C) devices and from 40°C to +85°C for
industrial grades devices. Typical specifications are at +25°C. All specifications at DVDD = 1.8V, AVDD AVSS = 3V(1),
VREF = 2.4V, external fCLK = 2.048MHz, data rate = 500SPS, High-Resolution mode, and gain = 6, unless otherwise noted.
ADS1294, ADS1296, ADS1298
ADS1294R, ADS1296R, ADS1298R
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
CHANNEL PERFORMANCE (continued)
AC Performance
Common-mode rejection ratio (CMRR) fCM = 50Hz, 60Hz(3) 105 115 dB
Power-supply rejection ratio (PSRR) fPS = 50Hz, 60Hz 90 dB
Crosstalk fIN = 50Hz, 60Hz 126 dB
Signal-to-noise ratio (SNR) fIN = 10Hz input, gain = 6 112 dB
10Hz, 0.5dBFs 98 dB
ADS1294R/6R/8R channel 1, 10Hz, 0.5dBFs 70 dB
100Hz, 0.5dBFs(4) 100 dB
Total harmonic distortion (THD) ADS1294R/6R/8R channel 1, 68 dB
100Hz, 0.5dBFs(4)
ADS1294R/6R/8R channel 1, 86 dB
100Hz, 20dBFs(4)
DIGITAL FILTER
3dB bandwidth 0.262fDR Hz
Digital filter settling Full setting 4 Conversions
RIGHT LEG DRIVE (RLD) AMPLIFIER AND PACE AMPLIFIERS
RLD integrated noise BW = 150Hz 7 μVRMS
PACE integrated noise BW = 8kHz 20 µVRMS
PACE amplifier crosstalk Crosstalk between PACE amplifiers 60 dB
Gain bandwidth product 50k|| 10pF load, gain = 1 100 kHz
Slew rate 50k|| 10pF load, gain = 1 0.25 V/μs
Short-circuit to GND (AVDD = 3V) 270 μA
Short-circuit to supply (AVDD = 3V) 550 μA
PACE and RLD amplifier drive strength Short-circuit to GND (AVDD = 5V) 490 μA
Short-circuit to supply (AVDD = 5V) 810 μA
Peak swing (AVSS + 0.3V to AVDD + 0.3V) 50 μA
at AVDD = 3V
PACE and RLD current Peak swing (AVSS + 0.3V to AVDD + 0.3V) 75 μA
at AVDD = 5V
PACE amplifier output resistance 100 Ω
Total harmonic distortion fIN = 100Hz, gain = 1 70 dB
Common-mode input range AVSS + 0.7 AVDD 0.3 V
Common-mode resistor matching Internal 200kresistor matching 0.1 %
Short-circuit current ±0.25 mA
Quiescent power consumption Either RLD or PACE amplifier 20 μA
WILSON CENTRAL TERMINAL (WCT) AMPLIFIER
Integrated noise BW = 150Hz See Table 5 nV/Hz
Gain bandwidth product See Table 5 kHz
Slew rate See Table 5 V/s
Total harmonic distortion fIN = 100Hz 90 dB
Common-mode input range AVSS + 0.3 AVDD 0.3 V
Short-circuit current Through internal 30kΩresistor ±0.25 mA
Quiescent power consumption See Table 5 μA
(3) CMRR is measured with a common-mode signal of AVSS + 0.3V to AVDD 0.3V. The values indicated are the maximum of the eight
channels.
(4) Harmonics above the second harmonic are attenuated by the digital filter.
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SBAS459I JANUARY 2010REVISED JANUARY 2012
ELECTRICAL CHARACTERISTICS (continued)
Minimum/maximum specifications apply for all commercial grade (0°C to +70°C) devices and from 40°C to +85°C for
industrial grades devices. Typical specifications are at +25°C. All specifications at DVDD = 1.8V, AVDD AVSS = 3V(1),
VREF = 2.4V, external fCLK = 2.048MHz, data rate = 500SPS, High-Resolution mode, and gain = 6, unless otherwise noted.
ADS1294, ADS1296, ADS1298
ADS1294R, ADS1296R, ADS1298R
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
LEAD-OFF DETECT
Frequency See the Register Map section for settings 0, fDR/4 kHz
Current See the Register Map section for settings 6, 12, 18, 24 nA
Current accuracy ±20 %
Comparator threshold accuracy ±30 mV
RESPIRATION (ADS1294R/6R/8R Only)
Internal source 32, 64 kHz
Frequency External source 32 64 kHz
Phase shift See the Register Map section for settings 22.5 90 157.5 Degrees
Impedance range IRESP = 30μA 10 kΩ
0.05Hz to 2Hz brick wall filter, 32kHz
modulation clock, phase = 112.5,
Impedance measurement noise 20 mΩPP
using IRESP = 30μA with 2kΩbaseline load,
gain = 4 test condition
internal reference, signal path = 82kΩ,
Modulator current 29 µA
baseline = 2.21kΩ
EXTERNAL REFERENCE
3V supply VREF = (VREFP VREFN) 2.5 V
Reference input voltage 5V supply VREF = (VREFP VREFN) 4.0 V
Negative input (VREFN) AVSS V
Positive input (VREFP) AVSS + 2.5 V
Input impedance 10 k
INTERNAL REFERENCE
Register bit CONFIG3.VREF_4V = 0, 2.4 V
AVDD 2.7V
Output voltage Register bit CONFIG3.VREF_4V = 1, 4.0 V
AVDD 4.4V
VREF accuracy ±0.2 %
TA= +25°C 35 ppm/°C
Internal reference drift Commerical grade, 0°C to +70°C 35 ppm
Industrial grade, 40°C to +85°C 45 ppm
Start-up time 150 ms
SYSTEM MONITORS
Analog supply reading error 2 %
Digital supply reading error 2 %
From power-up to DRDY low 150 ms
Device wake up STANDBY mode 9 ms
Temperature sensor reading, voltage TA= +25°C 145 mV
Temperature sensor reading, coefficient 490 μV/°C
Test Signal
Signal frequency See Register Map section for settings Hz
fCLK/221, fCLK/220
Signal voltage See Register Map section for settings ±1, ±2 mV
Accuracy ±2 %
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ADS1298, ADS1298R
SBAS459I JANUARY 2010REVISED JANUARY 2012
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
Minimum/maximum specifications apply for all commercial grade (0°C to +70°C) devices and from 40°C to +85°C for
industrial grades devices. Typical specifications are at +25°C. All specifications at DVDD = 1.8V, AVDD AVSS = 3V(1),
VREF = 2.4V, external fCLK = 2.048MHz, data rate = 500SPS, High-Resolution mode, and gain = 6, unless otherwise noted.
ADS1294, ADS1296, ADS1298
ADS1294R, ADS1296R, ADS1298R
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
CLOCK
Internal oscillator clock frequency Nominal frequency 2.048 MHz
TA= +25°C±0.5 %
0°CTA+70°C±2 %
Internal clock accuracy 40°CTA+85°C, ±2.5 %
ADS1298I industrial grade version only
Internal oscillator start-up time 20 μs
Internal oscillator power consumption 120 μW
External clock input frequency CLKSEL pin = 0 1.94 2.048 2.25 MHz
DIGITAL INPUT/OUTPUT (DVDD = 1.65V to 3.6V)
Logic level
VIH 0.8DVDD DVDD + 0.1 V
VIL 0.1 0.2DVDD V
VOH IOH =500μA DVDD 0.4 V
VOL IOL = +500μA 0.4 V
Input current (IIN) 0V <VDigitalInput <DVDD 10 +10 μA
POWER-SUPPLY REQUIREMENTS
Analog supply (AVDD AVSS) 2.7 3.0 5.25 V
Digital supply (DVDD) 1.65 1.8 3.6 V
AVDD DVDD 2.1 3.6 V
SUPPLY CURRENT (RLD, WCT, and PACE Amplifiers Turned Off)
High-Resolution mode (ADS1298)
AVDD AVSS = 3V 2.75 mA
IAVDD AVDD AVSS = 5V 3.1 mA
DVDD = 3.0V 0.5 mA
IDVDD DVDD = 1.8V 0.3 mA
Low-Power mode (ADS1298)
AVDD AVSS = 3V 1.8 mA
IAVDD AVDD AVSS = 5V 2.1 mA
DVDD = 3.0V 0.5 mA
IDVDD DVDD = 1.8V 0.3 mA
POWER DISSIPATION (Analog Supply = 3V, RLD, WCT, and PACE Amplifiers Turned Off)
Quiescent power dissipation
High-Resolution mode 8.8 9.5 mW
ADS1298/8R Low-Power mode (250SPS) 6.0 7.0 mW
High-Resolution mode 7.2 7.9 mW
ADS1296/6R Low-Power mode 5.3 6.6 mW
High-Resolution mode 5.4 6 mW
ADS1294/4R Low-Power mode 4.1 4.4 mW
Power-down 10 μW
Standby mode 2 mW
Quiescent channel power PGA + ADC 818 μW
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ADS1298, ADS1298R
www.ti.com
SBAS459I JANUARY 2010REVISED JANUARY 2012
ELECTRICAL CHARACTERISTICS (continued)
Minimum/maximum specifications apply for all commercial grade (0°C to +70°C) devices and from 40°C to +85°C for
industrial grades devices. Typical specifications are at +25°C. All specifications at DVDD = 1.8V, AVDD AVSS = 3V(1),
VREF = 2.4V, external fCLK = 2.048MHz, data rate = 500SPS, High-Resolution mode, and gain = 6, unless otherwise noted.
ADS1294, ADS1296, ADS1298
ADS1294R, ADS1296R, ADS1298R
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER DISSIPATION (Analog Supply = 5V, RLD, WCT, and PACE Amplifiers Turned Off)
Quiescent power dissipation
High-Resolution mode 17.5 mW
ADS1298/8R Low-Power mode 12.5 mW
High-Resolution mode 14.1 mW
ADS1296/6R Low-Power mode 10 mW
High-Resolution mode 10.1 mW
ADS1294/4R Low-Power mode 8.3 mW
Power-down 20 μW
Standby mode 4 mW
Quiescent channel power PGA + ADC 1.5 mW
TEMPERATURE
Specified temperature range 0 +70 °C
Operating temperature range 0 +70 °C
Specified temperature range 40 +85 °C
(industrial grade only)
Operating temperature range 40 +85 °C
(industrial grade only)
Storage temperature range 60 +150 °C
THERMAL INFORMATION ADS1294/6/8/
ADS1294/6/8 4R/6R/8R
THERMAL METRIC(1) UNITS
PAG ZXG
64 PINS 64 PINS
θJA Junction-to-ambient thermal resistance 35 48
θJCtop Junction-to-case (top) thermal resistance 31 8
θJB Junction-to-board thermal resistance 26 25 °C/W
ψJT Junction-to-top characterization parameter 0.1 0.5
ψJB Junction-to-board characterization parameter 22
θJCbot Junction-to-case (bottom) thermal resistance
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
Copyright ©20102012, Texas Instruments Incorporated Submit Documentation Feedback 7
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NOISE MEASUREMENTS
NOTE
The ADS1294R/6R/8R channel performance differs from the ADS1294/6/8 in regards to
respiration circuitry found on channel one. Unless otherwise noted, ADS129x refers to all
specifications and functional descriptions of the ADS1294, ADS1296, ADS1298,
ADS1294R, ADS1296R, and ADS1298R.
The ADS129x noise performance can be optimized by adjusting the data rate and PGA setting. As the averaging
is increased by reducing the data rate, the noise drops correspondingly. Increasing the PGA value reduces the
input-referred noise, which is particularly useful when measuring low-level biopotential signals. Table 1 and
Table 2 summarize the noise performance of the ADS129x in the High-Resolution (HR) mode and Low-Power
(LP) mode, respectively, with a 3V analog power supply. Table 3 and Table 4 summarize the noise performance
of the ADS129x in the HR mode and LP mode, respectively, with a 5V analog power supply. The data are
representative of typical noise performance at TA= +25°C. The data shown are the result of averaging the
readings from multiple devices and are measured with the inputs shorted together. A minimum of 1000
consecutive readings are used to calculate the RMS and peak-to-peak noise for each reading. For the two
highest data rates, the noise is limited by quantization noise of the ADC and does not have a gaussian
distribution. Thus, the ratio between rms noise and peak-to-peak noise is approximately 10. For the lower data
rates, the ratio is approximately 6.6.
Table 1 to Table 4 show measurements taken with an internal reference. The data are also representative of the
ADS129x noise performance when using a low-noise external reference such as the REF5025.
Table 1. Input-Referred Noise (μVRMS/μVPP) in High-Resolution Mode
3V Analog Supply and 2.4V Reference(1)
DR BITS OF OUTPUT 3dB
CONFIG1 DATA RATE BANDWIDTH PGA PGA PGA PGA PGA PGA PGA
REGISTER (SPS) (Hz) GAIN = 1 GAIN = 2 GAIN = 3 GAIN = 4 GAIN = 6 GAIN = 8 GAIN = 12
000 32000 8398 335/3553 168/1701 112/1100 85/823 58/529 42.5/378 28.6/248
001 16000 4193 56/613 28/295 18.8/188 14.3/143 9.7/94 7.4/69 5.2/44.3
010 8000 2096 12.4/111 6.5/54 4.5/37.9 3.5/29.7 2.6/21.7 2.2/17.8 1.8/13.8
011 4000 1048 6.1/44.8 3.2/23.3 2.4/17.1 1.9/14.0 1.5/11.1 1.3/9.7 1.2/8.5
100 2000 524 4.1/27.8 2.2/15.4 1.6/11.0 1.3/9.1 1.1/7.3 1.0/6.5 0.9/6.0
101 1000 262 2.9/19.0 1.6/10.1 1.2/7.5 1.0/6.2 0.8/5.0 0.7/4.6 0.6/4.1
110 500 131 2.1/12.5 1.1/6.8 0.9/5.1 0.7/4.3 0.6/3.5 0.5/3.1 0.5/2.9
(1) At least 1000 consecutive readings were used to calculate the RMS and peak-to-peak noise values in this table.
Table 2. Input-Referred Noise (μVRMS/μVPP) in Low-Power Mode
3V Analog Supply and 2.4V Reference(1)
DR BITS OF OUTPUT 3dB
CONFIG1 DATA RATE BANDWIDTH PGA PGA PGA PGA PGA PGA PGA
REGISTER (SPS) (Hz) GAIN = 1 GAIN = 2 GAIN = 3 GAIN = 4 GAIN = 6 GAIN = 8 GAIN = 12
000 16000 4193 333/3481 166/1836 111/1168 84/834 56/576 42/450 28/284
001 8000 2096 56/554 28/272 19/177 14.3/133 9.7/85 7.4/64 5.0/42.4
010 4000 1048 12.5/99 6.5/51 4.5/35.0 3.4/25.9 2.4/18.8 2.0/14.5 1.5/11.3
011 2000 524 6.1/41.8 3.2/22.2 2.3/15.9 1.8/12.1 1.4/9.3 1.2/7.8 1.0/6.7
100 1000 262 4.1/26.3 2.2/14.6 1.6/9.9 1.3/8.1 1.0/6.2 0.8/5.4 0.7/4.7
101 500 131 3.0/17.9 1.6/9.8 1.1/6.8 0.9/5.7 0.7/4.2 0.6/3.6 0.5/3.4
110 250 65 2.1/11.9 1.1/6.3 0.8/4.6 0.7/4.0 0.5/3.0 0.5/2.6 0.4/2.4
(1) At least 1000 consecutive readings were used to calculate the RMS and peak-to-peak noise values in this table.
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Product Folder Link(s): ADS1294 ADS1294R ADS1296 ADS1296R ADS1298 ADS1298R
ADS1294, ADS1294R
ADS1296, ADS1296R
ADS1298, ADS1298R
www.ti.com
SBAS459I JANUARY 2010REVISED JANUARY 2012
Table 3. Input-Referred Noise (μVRMS/μVPP) in High-Resolution Mode
5V Analog Supply and 4V Reference(1)
DR BITS OF OUTPUT 3dB
CONFIG1 DATA RATE BANDWIDTH PGA PGA PGA PGA PGA PGA PGA
REGISTER (SPS) (Hz) GAIN = 1 GAIN = 2 GAIN = 3 GAIN = 4 GAIN = 6 GAIN = 8 GAIN = 12
000 32000 8398 521/5388 260/2900 173/1946 130/1403 87/917 65/692 44/483
001 16000 4193 86/1252 43/633 29/402 22/298 15/206 11/141 7/91
010 8000 2096 17/207 9/112 6/71 4/57 3/36 3/29 2/18
011 4000 1048 6.4/48.2 3.4/25.9 2.417.7 1.9/15.4 1.5/11.2 1.3/9.6 1.1/8.2
100 2000 524 4.2/29.9 2.3/15.9 1.6/11.1 1.3/9.3 1.0/7.5 0.9/6.6 0.8/5.8
101 1000 262 2.9/18.8 1.6/10.4 1.1/7.8 0.9/6.1 0.7/4.9 0.6/4.7 0.6/3.9
110 500 131 2.0/12.8 1.1/7.2 0.8/5.2 0.7/4.0 0.5/3.3 0.5/3.3 0.4/2.7
(1) At least 1000 consecutive readings were used to calculate the RMS and peak-to-peak noise values in this table.
Table 4. Input-Referred Noise (μVRMS/μVPP) in Low-Power Mode
5V Analog Supply and 4V Reference(1)
DR BITS OF OUTPUT 3dB
CONFIG1 DATA RATE BANDWIDTH PGA PGA PGA PGA PGA PGA PGA
REGISTER (SPS) (Hz) GAIN = 1 GAIN = 2 GAIN = 3 GAIN = 4 GAIN = 6 GAIN = 8 GAIN = 12
000 16000 4193 526/5985 263/2953 175/1918 132/1410 88/896 66/681 44/458
001 8000 2096 88/1201 44/619 29/411 22/280 15/191 11/139 7/83
010 4000 1048 17/208 9/103 6/62 4/52 3/37 2/25 2/16
011 2000 524 6.0/41.1 3.3/23.3 2.2/15.5 1.8/12.3 1.3/9.8 1.1/7.8 0.9/6.5
100 1000 262 4.1/27.1 2.3/14.8 1.5/10.1 1.2/8.1 0.9/6.0 0.8/5.4 0.7/4.4
101 500 131 2.9/17.4 1.6/9.6 1.1/6.6 0.9/5.9 0.7/4.3 0.6/3.4 0.5/3.2
110 250 65 2.1/11.9 1.1/6.6 0.8/4.6 0.6/3.7 0.5/3.0 0.4/2.5 0.4/2.2
(1) At least 1000 consecutive readings were used to calculate the RMS and peak-to-peak noise values in this table.
Table 5. Typical WCT Performance
ANY ONE ANY TWO ALL THREE
PARAMETER (A, B, or C) (A+B, A+C, or B+C) (A+B+C) UNIT
Integrated noise 540 382 312 nVRMS
Power 53 59 65 μW
3dB BW 30 59 89 kHz
Slew rate BW limited BW limited BW limited
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Product Folder Link(s): ADS1294 ADS1294R ADS1296 ADS1296R ADS1298 ADS1298R
1
2
3
4
5
6
7
8
HGFEDCBA
IN8P
IN7P
IN6PIN5P
IN4P
IN3P
IN2PIN1P
IN8N
IN7N
IN6NIN5N
IN4N
IN3N
IN2NIN1N
RLDIN
RLDOUT
RLDINV
WCT
TESTP_
PACE_OUT1
TESTN_
PACE_OUT2
VCAP4
VREFP
AVDDAVDDRLDREF
AVSSRESV1
RESP_
MODN
RESP_
MODP
VREFN
AVSSAVSSAVSSAVSS
GPIO4GPIO1
PWDN
VCAP1
AVDDAVDDAVDD
DRDY
GPIO3
DAISY_IN
RESET
VCAP2
AVDD1
VCAP3DGNDDGNDGPIO2
CS
START
DGND
AVSS1
CLKSEL
DVDD
DVDDDOUTSCLKCLK
DIN
ADS1294, ADS1294R
ADS1296, ADS1296R
ADS1298, ADS1298R
SBAS459I JANUARY 2010REVISED JANUARY 2012
www.ti.com
PIN CONFIGURATIONS
ZXG PACKAGE
BGA-64
(TOP VIEW, SOLDER BUMPS ON BOTTOM SIDE)
BGA PIN ASSIGNMENTS
NAME TERMINAL FUNCTION DESCRIPTION
IN8P(1) 1A Analog input Differential analog positive input 8 (ADS1298/8R)
IN7P(1) 1B Analog input Differential analog positive input 7 (ADS1298/8R)
IN6P(1) 1C Analog input Differential analog positive input 6 (ADS1296/8/6R/8R)
IN5P(1) 1D Analog input Differential analog positive input 5 (ADS1296/8/6R/8R)
IN4P(1) 1E Analog input Differential analog positive input 4
IN3P(1) 1F Analog input Differential analog positive input 3
IN2P(1) 1G Analog input Differential analog positive input 2
IN1P(1) 1H Analog input Differential analog positive input 1
IN8N(1) 2A Analog input Differential analog negative input 8 (ADS1298/8R)
IN7N(1) 2B Analog input Differential analog negative input 7 (ADS1298/8R)
IN6N(1) 2C Analog input Differential analog negative input 6 (ADS1296/8/6R/8R)
IN5N(1) 2D Analog input Differential analog negative input 5 (ADS1296/8/6R/8R)
IN4N(1) 2E Analog input Differential analog negative input 4
IN3N(1) 2F Analog input Differential analog negative input 3
IN2N(1) 2G Analog input Differential analog negative input 2
IN1N(1) 2H Analog input Differential analog negative input 1
(1) Connect unused terminals to AVDD.
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ADS1294, ADS1294R
ADS1296, ADS1296R
ADS1298, ADS1298R
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SBAS459I JANUARY 2010REVISED JANUARY 2012
BGA PIN ASSIGNMENTS (continued)
NAME TERMINAL FUNCTION DESCRIPTION
RLDIN(2) 3A Analog input Right leg drive input to MUX
RLDOUT 3B Analog output Right leg drive output
RLDINV 3C Analog input/output Right leg drive inverting input
WCT 3D Analog output Wilson Central Terminal output
TESTP_PACE_OUT1(2) 3E Analog input/buffer output Internal test signal/single-ended buffer output based on register settings
TESTN_PACE_OUT2(2) 3F Analog input/output Internal test signal/single-ended buffer output based on register settings
VCAP4 3G Analog output Analog bypass capacitor
VREFP 3H Analog input/output Positive reference voltage
AVDD 4A Supply Analog supply
AVDD 4B Supply Analog supply
RLDREF 4C Analog input Right leg drive noninverting input
AVSS 4D Supply Analog ground
RESV1 4E Digital input Reserved for future use; must tie to logic low (DGND).
ADS1294R/6R/8R: modulation clock for respiration measurement, negative
RESP_MODN 4F Analog output side.
ADS1294/6/8: leave floating.
ADS1294R/6R/8R: modulation clock for respiration measurement, positive
RESP_MODP 4G Analog output side.
ADS1294/6/8: leave floating.
VREFN 4H Analog input Negative reference voltage
AVSS 5A Supply Analog ground
AVSS 5B Supply Analog ground
AVSS 5C Supply Analog ground
AVSS 5D Supply Analog ground
GPIO4 5E Digital input/output GPIO4 in normal mode
GPIO1 5F Digital input/output General purpose input/output pin
PWDN 5G Digital input Power-down; active low
VCAP1 5H Analog input/output Analog bypass capacitor
AVDD 6A Supply Analog supply
AVDD 6B Supply Analog supply
AVDD 6C Supply Analog supply
DRDY 6D Digital output Data ready; active low
GPIO3 6E Digital input/output GPIO3 in normal mode
DAISY_IN 6F Digital input Daisy-chain input; if not used, short to DGND.
RESET 6G Digital input System reset; active low
VCAP2 6H Analog bypass capacitor
AVDD1 7A Supply Analog supply for charge pump
VCAP3 7B Analog bypass capacitor; internally generated AVDD + 1.9V.
DGND 7C Supply Digital ground
DGND 7D Supply Digital ground
GPIO2 7E Digital input/output General-purpose input/output pin
CS 7F Digital input SPI chip select; active low
START 7G Digital input Start conversion
DGND 7H Supply Digital ground
AVSS1 8A Supply Analog ground for charge pump
CLKSEL 8B Digital input Master clock select
DVDD 8C Supply Digital power supply
DVDD 8D Supply Digital power supply
DOUT 8E Digital output SPI data out
SCLK 8F Digital input SPI clock
CLK 8G Digital input/output External Master clock input or internal clock output.
DIN 8H Digital input SPI data in
(2) Connect unused terminals to AVDD.
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Product Folder Link(s): ADS1294 ADS1294R ADS1296 ADS1296R ADS1298 ADS1298R
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
DVDD
GPIO4
GPIO3
GPIO2
DOUT
GPIO1
DAISY_IN
SCLK
START
CLK
DIN
DGND
DRDY
CS
RESET
PWDN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
IN8N
IN8P
IN7N
IN7P
IN6N
IN6P
IN5N
IN5P
IN4N
IN4P
IN3N
IN3P
IN2N
IN2P
IN1N
IN1P
WCT
RLDOUT
RLDIN
RLDINV
RLDREF
AVDD
AVSS
AVSS
AVDD
VCAP3
AVDD1
AVSS1
CLKSEL
DGND
DVDD
DGND
TESTP_PACE_OUT1
TESTN_PACE_OUT2
AVDD
AVSS
AVDD
AVDD
AVSS
VREFP
VREFN
VCAP4
NC
VCAP1
NC
VCAP2
RESV1
AVSS
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
ADS1294, ADS1294R
ADS1296, ADS1296R
ADS1298, ADS1298R
SBAS459I JANUARY 2010REVISED JANUARY 2012
www.ti.com
PAG PACKAGE
TQFP-64
(TOP VIEW)
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Product Folder Link(s): ADS1294 ADS1294R ADS1296 ADS1296R ADS1298 ADS1298R