DCT OR DCU PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
1OE
1A
1B
GND
VCC
2OE
2B
2A
SN74CB3T3306
www.ti.com
SCDS119B –JANUARY 2003–REVISED AUGUST 2012
DUAL FET BUS SWITCH 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH
WITH 5-V TOLERANT LEVEL SHIFTER
Check for Samples: SN74CB3T3306
1FEATURES • VCC Operating Range From 2.3 V to 3.6 V
• Data I/Os Support 0- to 5-V Signaling Levels
• Output Voltage Translation Tracks VCC (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
• Supports Mixed-Mode Signal Operation • Control Inputs Can Be Driven by TTL or
on All Data I/O Ports 5-V/3.3-V CMOS Outputs
– 5-V Input Down to 3.3-V Output Level • Ioff Supports Partial-Power-Down Mode
Shift With 3.3-V VCC Operation
– 5-V/3.3-V Input Down to 2.5-V Output • Latch-Up Performance Exceeds 250 mA Per
Level Shift With 2.5-V VCC JESD 17
• 5-V Tolerant I/Os With Device Powered Up • ESD Performance Tested Per JESD 22
or Powered Down – 2000-V Human-Body Model
• Bidirectional Data Flow With Near-Zero (A114-B, Class II)
Propagation Delay – 1000-V Charged-Device Model (C101)
• Low ON-State Resistance (ron)
Characteristics (ron = 5 ΩTyp) • Supports Digital Applications: Level
Translation, USB Interface, Bus Isolation
• Low Input/Output Capacitance Minimizes
Loading (Cio(OFF) = 4.5 pF Typ) • Ideal for Low-Power Portable Equipment
• Data and Control Inputs Provide
Undershoot Clamp Diodes
• Low Power Consumption
(ICC = 20 μA Max)
DESCRIPTION/ORDERING INFORMATION
The SN74CB3T3306 is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron), allowing
for minimal propagation delay. The device fully supports mixed-mode signal operation on all data I/O ports by
providing voltage translation that tracks VCC. The SN74CB3T3306 supports systems using 5-V TTL, 3.3-V
LVTTL, and 2.5-V CMOS switching standards, as well as user-defined switching levels (see Figure 1).
The SN74CB3T3306 is organized as two 1-bit bus switches with separate ouput-enable (1OE, 2OE) inputs. It
can be used as two 1-bit bus switches or as one 2-bit bus switch. When OE is low, the associated 1-bit bus
switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE
is high, the associated 1-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright © 2003–2012, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
1A
1OE
SW 1B
2A
2OE
SW 2B
2
1
5
7
3
6
SN74CB3T3306
SCDS119B –JANUARY 2003–REVISED AUGUST 2012
www.ti.com
ORDERING INFORMATION
TAPACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING(2)
SSOP – DCT Tape and reel SN74CB3T3306DCTR WA6_ _ _
–40°C to 85°C VSSOP – DCU Tape and reel SN74CB3T3306DCUR WA6_
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging
current will not backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Figure 1. Typical DC Voltage-Translation Characteristics
Table 1. FUNCTION TABLE
(EACH BUS SWITCH)
INPUT INPUT/OUTPUT FUNCTION
OE A
L B A port = B port
H Z Disconnect
LOGIC DIAGRAM (POSITIVE LOGIC)
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Product Folder Links: SN74CB3T3306
A
EN(2)
B
Control
Circuit
VG(1)
(1) Gate voltage (VG) is approximately equal to VCC + VT when the switch is ON
and VI > VCC + VT.
(2) EN is the internal enable signal applied to the switch.
SN74CB3T3306
www.ti.com
SCDS119B –JANUARY 2003–REVISED AUGUST 2012
SIMPLIFIED SCHEMATIC, EACH FET SWITCH (SW)
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT
VCC Supply voltage range(2) –0.5 7 V
VIN Control input voltage range(2) (3) –0.5 7 V
VI/O Switch I/O voltage range(2) (3) (4) –0.5 7 V
IIK Control input clamp current VIN < 0 –50 mA
II/OK I/O port clamp current VI/O < 0 –50 mA
II/O ON-state switch current(5) ±128 mA
Continuous current through VCC or GND ±100 mA
DCT package 220
θJA Package thermal impedance(6) °C/W
DCU package 227
Tstg Storage temperature range –65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to ground, unless otherwise specified.
(3) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(4) VIand VOare used to denote specific conditions for VI/O.
(5) IIand IOare used to denote specific conditions for II/O.
(6) The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions(1)
MIN MAX UNIT
VCC Supply voltage 2.3 3.6 V
VCC = 2.3 V to 2.7 V 1.7 5.5
VIH High-level control input voltage V
VCC = 2.7 V to 3.6 V 2 5.5
VCC = 2.3 V to 2.7 V 0 0.7
VIL Low-level control input voltage V
VCC = 2.7 V to 3.6 V 0 0.8
VI/O Data input/output voltage 0 5.5 V
TAOperating free-air temperature –40 85 °C
(1) All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Copyright © 2003–2012, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: SN74CB3T3306
SN74CB3T3306
SCDS119B –JANUARY 2003–REVISED AUGUST 2012
www.ti.com
Electrical Characteristics(1)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(2) MAX UNIT
VIK VCC = 3 V, II= –18 mA –1.2 V
VOH See Figure 3 and Figure 4
IIN Control inputs VCC = 3.6 V, VIN = 3.6 V to 5.5 V or GND ±10 μA
VI= VCC – 0.7 V to 5.5 V ±20
VCC = 3.6 V, Switch ON,
IIVI= 0.7 V to VCC – 0.7 V –40 μA
VIN = VCC or GND VI= 0 to 0.7 V ±5
IOZ (3) VCC = 3.6 V, VO= 0 to 5.5 V, VI= 0, Switch OFF, VIN = VCC or GND ±10 μA
Ioff VCC = 0, VO= 0 to 5.5 V, VI= 0 10 μA
VI= VCC or GND 20
VCC = 3.6 V, II/O = 0,
ICC μA
Switch ON or OFF, VIN = VCC or GND VI= 5.5 V 20
VCC = 3 V to 3.6 V, One input at VCC – 0.6 V,
ΔICC (4) Control inputs 300 μA
Other inputs at VCC or GND
Cin Control inputs VCC = 3.3 V, VIN = VCC or GND 3 pF
VCC = 3.3 V, VI/O = 5.5 V, 3.3 V, or GND, Switch OFF,
Cio(OFF) 4.5 pF
VIN = VCC or GND VI/O = 5.5 V or 3.3 V 4
VCC = 3.3 V, Switch ON,
Cio(ON) pF
VIN = VCC or GND VI/O = GND 15
IO= 24 mA 5 8
VCC = 2.3 V, TYP at VCC = 2.5 V,
VI= 0 IO= 16 mA 5 8
ron (5) Ω
IO= 64 mA 5 7
VCC = 3 V, VI= 0 IO= 32 mA 5 7
(1) VIN and IIN refer to control inputs. VI, VO, II, and IOrefer to data pins.
(2) All typical values are at VCC = 3.3 V (unless otherwise noted), TA= 25°C.
(3) For I/O ports, the parameter IOZ includes the input leakage current.
(4) This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
(5) Measured by the voltage drop between A and B terminals at the indicated current through the switch. ON-state resistance is determined
by the lower of the voltages of the two (A or B) terminals.
Switching Characteristics
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 2)
VCC = 2.5 V VCC = 3.3 V
FROM TO ± 0.2 V ± 0.3 V
PARAMETER UNIT
(INPUT) (OUTPUT) MIN MAX MIN MAX
tpd (1) A or B B or A 0.15 0.25 ns
ten OE A or B 1 8.5 1 6.5 ns
tdis OE A or B 1 9 1 9 ns
(1) The propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load
capacitance, when driven by an ideal voltage source (zero output impedance).
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Product Folder Links: SN74CB3T3306
VOH
VOL
CL
(see Note A)
TEST CIRCUIT
S1 2 × VCC
Open
GND
RL
RL
tPLH tPHL
Output
Waveform 1
S1 at 2 × VCC
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
tPZL
tPZH
tPLZ
tPHZ
VCC
0 V
VOH
VOL
0 V
VOL + V∆
VOH − V∆
0 V
Output
Control
(VIN)
VCC
VCC
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (tpd(s))VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Output
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd(s). The tpd propagation delay is the calculated RC time constant of the typical ON-state resistance
of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance).
H. All parameters and waveforms are not applicable to all devices.
50 Ω
VG1
VCC
DUT
50 Ω
VIN
50 Ω
VG2 50 Ω
VI
TEST RL
S1 V∆
CL
2.5 V ± 0.2 V
3.3 V ± 0.3 V
VCC VI
tPHZ/tPZH
tPLZ/tPZL
tpd(s)
2.5 V ± 0.2 V
3.3 V ± 0.3 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
Open
Open
2 × VCC
2 × VCC
Open
Open
500 Ω
500 Ω
500 Ω
500 Ω
500 Ω
500 Ω
3.6 V or GND
5.5 V or GND
GND
GND
3.6 V
5.5 V
30 pF
50 pF
30 pF
50 pF
30 pF
50 pF
0.15 V
0.3 V
0.15 V
0.3 V
Output
Control
(VIN)
Input Generator
Input Generator
VCC/2 VCC/2
VCC/2 VCC/2
VCC/2 VCC/2 VCC/2
VCC/2
VO
SN74CB3T3306
www.ti.com
SCDS119B –JANUARY 2003–REVISED AUGUST 2012
PARAMETER MEASUREMENT INFORMATION
Figure 2. Test Circuit and Voltage Waveforms
Copyright © 2003–2012, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: SN74CB3T3306
0.0
1.0
2.0
3.0
4.0
V - Output Voltage - V
OUTPUT VOLTAGE
vs
INPUT VOLTAGE
O
VI - Input Voltage - V
OUTPUT VOLTAGE
vs
INPUT VOLTAGE
VI - Input Voltage - V
0.0 1.0 2.0 3.0 4.0 5.0 6.0
0.0
1.0
2.0
3.0
4.0
0.0 1.0 2.0 3.0 4.0 5.0 6.0
VCC = 3 V
IO = 1 µA
TA = 25°C
VCC = 2.3 V
IO = 1 µA
TA = 25°C
V - Output Voltage - V
O
SN74CB3T3306
SCDS119B –JANUARY 2003–REVISED AUGUST 2012
www.ti.com
TYPICAL CHARACTERISTICS
Figure 3. Data Output Voltage vs Data Input Voltage
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Product Folder Links: SN74CB3T3306
2.0
1.5
2.5
3.0
3.5
4.0
2.0
1.5
2.5
3.0
3.5
4.0
1.5
2.0
2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7
2.5
3.0
3.5
4.0
2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7
2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7
OUTPUT VOLTAGE HIGH
vs
SUPPLY VOLTAGE
VCC - Supply V oltage - V
VCC = 2.3 V ~ 3.6 V
VI = 5.5 V
TA = 85°C
OUTPUT VOLTAGE HIGH
vs
SUPPLY VOLTAGE
VCC - Supply V oltage - V
VCC = 2.3 V to 3.6 V
VI = 5.5 V
TA = 25°C
OUTPUT VOLTAGE HIGH
vs
SUPPLY VOLTAGE
VCC - Supply V oltage - V
VCC = 2.3 V to 3.6 V
VI = 5.5 V
TA = -40°C
V - Output Voltage High - V
OH
VOH - Output Voltage High - V
VOH - Output Voltage High - V
100 µA
8 mA
16 mA
24 mA
100 µA
8 mA
16 mA
24 mA
100 µA
8 mA
16 mA
24 mA
SN74CB3T3306
www.ti.com
SCDS119B –JANUARY 2003–REVISED AUGUST 2012
TYPICAL CHARACTERISTICS
Figure 4. VOH Values
Copyright © 2003–2012, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Links: SN74CB3T3306
SN74CB3T3306
SCDS119B –JANUARY 2003–REVISED AUGUST 2012
www.ti.com
REVISION HISTORY
Changes from Revision A (June 2005) to Revision B Page
• Updated graphic note and picture in figure 1. ...................................................................................................................... 2
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Product Folder Links: SN74CB3T3306
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74CB3T3306DCUR US8 DCU 8 3000 180.0 8.4 2.25 3.35 1.05 4.0 8.0 Q3
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74CB3T3306DCUR US8 DCU 8 3000 202.0 201.0 28.0
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 2
MECHANICAL DATA
MPDS049B – MAY 1999 – REVISED OCT OBER 2002
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DCT (R-PDSO-G8) PLASTIC SMALL-OUTLINE PACKAGE
ÇÇÇÇÇ
ÇÇÇÇÇ
ÇÇÇÇÇ
ÇÇÇÇÇ
0,60
0,20
0,25
0°– 8°
0,15 NOM
Gage Plane
4188781/C 09/02
4,25
5
0,30
0,15
2,90 3,75
2,70
8
4
3,15
2,75
1
0,10
0,00
1,30 MAX
Seating Plane
0,10
M
0,13
0,65
PIN 1
INDEX AREA
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion
D. Falls within JEDEC MO-187 variation DA.
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