EVALUATION KIT AVAILABLE MAX31953/MAX31963 General Description The MAX31953/MAX31963 translates eight current-sinking, 12V, 24V, or 48V industrial inputs to a galvanically isolated, SPI-compatible, serial output that interfaces with 3V to 5.5V logic. The galvanic isolation is certified to 500VRMS for 60 seconds, with creepage and clearance distances of 1.4 mm. The input side (field-side) of the device includes a 5V logic serial input for daisy-chaining data from other devices (such as the MAX31911/MAX31913) through the devices' isolated serial port, eliminating the need for additional isolators. The field-side of the devices requires a single 4.5V to 5.5V supply. This power is supplied either directly or through the integrated voltage regulator. The MAX31953 includes a linear voltage regulator, while the MAX31963 includes an efficient buck regulator that requires an external inductor. Both regulators accept input voltages from 7V to 36V. The logic-side of the devices operate from a single 3V to 5.5V supply, which also sets the SPI logic level. Applications Programmable Logic Controllers Industrial Automation Process Automation Building Automation Standard Compliance (Pending) UL1577 Ordering Information appears at end of data sheet. Octal Industrial Digital Input with Isolated SPI Interface Benefits and Features Reduced Power and Heat Dissipation * Accurate Input-Current Limiters * Energyless Field-Side LED Drivers * Integrated Buck Regulator (MAX31963) Configurability Enables Wide Range of Standard and Custom Applications * Eight High-Voltage Input Channels (36V Max) * Configurable IEC 61131-2 Type 1, 2, 3 Inputs * Configurable Input Current-Limiting From 0.5mA to 6mA * Selectable 0, 25s, 0.75ms, or 3ms Input Debounce Filtering * High-Speed, 2s Update Rate High Integration Reduces BOM Count and Board Space * Integrated 500VRMS Galvanic Isolation * Integrated 5V LDO (MAX31953) * Daisy-Chain Capability Eliminates Isolators * 48-Pin TSSOP Package * Integrated Overtemperature Monitor and Thermal Shutdown * Integrated Field-Supply Voltage Monitors * 5-Bit CRC Code Generation and Transmission For Error Detection * 15kV ESD HBM Immunity on IN1-IN8 * -40C to +125C Ambient Operating Temperature Operates Directly From Field Supply in 12V and 24V Systems * Integrated Voltage Regulator Accepts 7V to 36V * Option to Power Directly From a 5V Supply SPI Interface Flexibility * Compatible with 3.3V or 5V Logic * Daisy-Chain Data From the Field-Side 19-7684; Rev 0; 6/15 MAX31953/MAX31963 Octal Industrial Digital Input with Isolated SPI Interface Typical Application Circuit 2.2k IN1 LED1 2.2k GNDL IN2 LED2 INF (INPUT-FIELD) 0.1F INP (INPUT-PIN) 2.2k 3.0 TO 5.5V VDDL 1F IN8 1nF VDD LED8 DOUT MAX31953 MAX31963 15k IREF GNDF MODESEL 150 MISO CLK CLK CS GPO FAULT GPI OR INT DB0L GPO DB1L GPO C, ASIC, OR FPGA BACKPLANE INTERFACE VDD24F MAX31963 ONLY 10F 68H GND LX VDD5F 0.1F 10F DB0F DB1F DINF CLKO CSO FIELDSIDE DB0 DB1 SOUT CLK LOGICSIDE CS 5VOUT 15k RIREF GND VDD24VF 2.2k IN1 RT1 2.2k MAX31913 ISOLATION BARRIER 16-CHANNEL TYPE 1 OR 3 DIGITAL INPUT MODULE IN2 RT2 2.2k IN8 RT8 MODSEL www.maximintegrated.com SIN Maxim Integrated 2 MAX31953/MAX31963 Octal Industrial Digital Input with Isolated SPI Interface Absolute Maximum Ratings VDDL to GNDL ........................................................-0.3V to +6V VDD5F to GNDF......................................................-0.3V to +6V VDD24F to GNDF..................................................-0.3V to +45V GNDL to GNDF for 1 min..............................................500VRMS DB0L, DB1L, CS, CLK to GNDL..............................-0.3V to +6V DOUT, FAULT to GNDL...........................-0.3V to (VDDL + 0.3V) Short-circuit duration FAULT, DOUT to VDDL or GDL.....................................................Continuous DB0F, DB1F, DINF, MODESEL, CLKO, CSO, IREF to GNDF........... -0.3V to (VDD5F + 0.3V) Short-circuit duration CLKO, CSO to VDD5F or GNDF................................................Continuous IN1-IN8 to GNDF...................................................0.3V to +45V IN1-IN8 to GNDF with 2.2k series resistor..........-45V to +45V LED1 - LED8 to GNDF............................................-0.3V to +6V Continuous Power Dissipation (TA = +70C) 48-pin TSSOP (derate at 54.2mW/C above +70C).........................4333mW Operating Temperature Range Ambient Temperature...................................................+125C Junction Temperature...................................................+150C Storage Temperature Range............................. -65C to +150C Lead Temperature (soldering, 10s).................................. +300C Soldering (reflow).............................................................+260C Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Thermal Characteristics (Note 1) TSSOP Junction-to-Ambient Thermal Resistance (JA)......18.46C/W Junction-to-Case Thermal Resistance (JC).............1.82C/W Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. DC Electrical Characteristics VVDDL - VGNDL = +3.0V to +5.5V, VVDD5F - VGNDF = +4.5V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. CL = 15pF. Typical values are at VVDDL - VGNDL = +3.3V, VVDD5F - VGNDF = +5V, VDD24F connected to VDD5F, VGNDL - VGNDF = 0V, and TA = +25C. (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 5.5 V POWER SUPPLIES Logic Supply Voltage Logic Supply Current Field Supply Voltage VDDL IVDDL CS = GNDL, CLK = 2MHz VVDDL - VGNDL = +3.3V 6.2 9.5 VVDDL - VGNDL = +5V 7.2 11 mA VDDL24F When using the internal regulator in MAX31963. 7 36 V VDD24F When using the internal regulator in MAX31953 7 36 V VDD5F When powering the field-side directly from a 5V supply (Note 3) 4.5 5.5 V 3.2 7 mA 9.1 14 mA 8.8 14 mA Field Supply Current of VDD24F in MAX31963 IVDD24F Field Supply Current of VDD24F in MAX31953 IVDD24F Field Supply Current Powered From VDD5F IVDD5F www.maximintegrated.com 3.0 VDD24F = 24V VDD5F = 5V IN1-IN8 = 24V, LED1- LED8 = GNDF, CS = GNDL, CLK = 2MHz, (DB0F, DB1F, CSO, CLKO = unconnected, RIREF = 15k. Maxim Integrated 3 MAX31953/MAX31963 Octal Industrial Digital Input with Isolated SPI Interface DC Electrical Characteristics (continued) VVDDL - VGNDL = +3.0V to +5.5V, VVDD5F - VGNDF = +4.5V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. CL = 15pF. Typical values are at VVDDL - VGNDL = +3.3V, VVDD5F - VGNDF = +5V, VDD24F connected to VDD5F, VGNDL - VGNDF = 0V, and TA = +25C. (Note 2) PARAMETER SYMBOL VDD5F Undervoltage-Lockout Threshold VUVLO5F VDD5F Undervoltage-LockoutThreshold Hysteresis VUVHYST5F CONDITIONS VDD5F rising MIN TYP MAX UNITS 3.5 4 4.5 V 0.4 V MAX31953 Regulator Output Voltage VVDD5FL Max ILOAD = 50Ma TA = +25C 4.5 5 5.5 TA = -40C to 125C 4.5 5 5.5 MAX31963 Regulator Output Voltage VVDD5FB Max ILOAD = 50mA TA = +25C 4.5 5 5.5 TA = -40C to 125C 4.5 5 5.5 MAX31963 Regulator Efficiency V V VDD24F = 24V, Load = 50mA Inductor = 68H with R = 1.95, TA = 25C (e.g., inductor part number SD3814-680R) 82 % MAX31953 Line Regulation dVDD5FLINEL ILOAD = 50mA, including internal load, VDD24F = 7V to 24V 20 mV MAX31963 Line Regulation dVDD5FLINEB ILOAD = 50mA, including internal load, VDD24F = 7V to 24V 14 mV MAX31953 Load Regulation dVDD5FLOAD ILOAD = 1mA to 50mA CLOAD = 4.7F 20 mV MAX31963 Load Regulation dVDD5FLOAD ILOAD = 5mA to 50mA CLOAD = 4.7F 25 mV VDD24F = 24V, ILOAD = 50mA 469 Buck Regulator Frequency fBUCK VDD24F UV1 Alarm On/Off VALRMOFFUV1 Rising VDD24F VDD24F UV1 Alarm Off/On VALRMONUV1 Falling VDD24F VDD24F UV2 Alarm On/Off VALRMOFFUV2 Rising VDD24F VDD24F UV2 Alarm Off/On VALRMONUV2 Falling VDD24F 9 7 8 16.6 V V 18 V 15.7 V 155 C TALRM_HYS 7 C Thermal-Shutdown Threshold TSHDN 165 C Thermal-Shutdown Hysteresis TSHDN_HYS 10 C 2.4 mA 9.1 V Overtemperature Alarm TALRM Overtemperature Alarm Hysteresis 14 kHz 10 Junction temperature FIELD INPUTS LED On-State Current ILEDON Field-Input Threshold High-to-Low VINF- 2.2k external series resistor Field-Input Threshold Low-to-High VINF+ 2.2k external series resistor 10 VINFHYS 2.2k external series resistor 0.9 Field-Input Threshold Hysteresis www.maximintegrated.com RIREF = 15k, VDD24F = 18V to 30V 6.2 10.82 V V Maxim Integrated 4 MAX31953/MAX31963 Octal Industrial Digital Input with Isolated SPI Interface DC Electrical Characteristics (continued) VVDDL - VGNDL = +3.0V to +5.5V, VVDD5F - VGNDF = +4.5V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. CL = 15pF. Typical values are at VVDDL - VGNDL = +3.3V, VVDD5F - VGNDF = +5V, VDD24F connected to VDD5F, VGNDL - VGNDF = 0V, and TA = +25C. (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP 2.9 3.4 MAX UNITS Input Threshold High-to-Low (at IC pin) VTHP- IN1 - IN8 Input Threshold Low-to-High (at IC pin) VTHP+ IN1 - IN8 4.2 VINPHYS IN1 - IN8 0.8 V 200 kHz Input Threshold Hysteresis (at IC pin) Field-Input Data Rate fIN V 4.8 V Current-Limit Setting Resistor RIREF Nominal value 4.99 15 62 k Field-Input Current Limit IINLIM RIREF = 15k, VIN = 18V to 30V, TA = +25C to +125C (Note 4) 2.1 2.4 2.85 mA DB1L/DB0L = 0/0: no filtering Debounce Filter Time Constant (See Table 1) tBOUNCE 0 DB1L/DB0L = 0/1 0.008 0.025 0.038 DB1L/DB0L = 1/0 0.25 0.75 1.1 DB1L/DB0L = 1/1 1 3 4.5 ms INTERFACE LOGIC Input Logic-High Voltage Input Logic-Low Voltage Output Logic-High Voltage VIH VIL VOH Open-Drain Pullup Current Output Logic-Low Voltage Logic-Input Leakage Current CLK, CS relative to GNDL 0.7 x VVDDL DB0L, DB1L relative to GNDL 0.80 DINF, MODESEL relative to GNDF 0.7 x VVDD5F CLK, CS relative to GNDL 0.8 DB0L, DB1L relative to GNDL 0.5 DINF, MODESEL relative to GNDF 0.8 IIL Logic Input Capacitance V CLKO, CSO sourcing 4mA VVDD5F -0.4 V DOUT, FAULT sourcing 4mA VVDDL -0.4 V 30 DB0F, DB1F (from VDD5F) VOL V A CLKO, CSO sinking 4mA to GNDF 0.8 DOUT, FAULT sinking 4mA to GNDL 0.8 DB0F, DB1F sinking 4mA to GNDF 0.8 CS, CLK -1 1 V A CS, CLK (capacitance to GNDL) 2 pF VIN = VVDD_ or VGND_ (Note 6) 1.5 kV/s DYNAMIC CHARACTERISTICS Common-Mode Transient Immunity www.maximintegrated.com dVISO/dt Maxim Integrated 5 MAX31953/MAX31963 Octal Industrial Digital Input with Isolated SPI Interface AC Electrical Characteristics VVDDL - VGNDL = +3.0V to +5.5V, VVDD5F - VGNDF = +4.5V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. CL = 15pF. Typical values are at VVDDL - VGNDL = +3.3V, VVDD5F - VGNDF = +5V, VDD24F connected to VDD5F, VGNDL - VGNDF = 0V, and TA = +25C. (Note 2) PARAMETER Minimum Detectable Field Input Pulse Width SYMBOL tPW CONDITIONS MIN TYP No external capacitors on pins IN1-IN8 MAX UNITS 1.3 s CLK Pulse Duration tCLKPW See Figure 6 50 ns CS Pulse Duration tCSPW See Figure 3 50 ns DINF-to-CLKO Setup Time tSU1 (Note 8) See Figure 4 5 ns DINF-to-CLKO Hold Time tH1 (Note 8) See Figure 4 8 ns CS-to-CLK Setup Time tSU2 See Figure 5 12 ns CS-to-CLK Recovery Time tREC See Figure 5 16 ns Channel-to-Channel Skew (Notes 7, 8) 5 ns fCLK See Figure 6 10 MHz Propagation Delay, CLK-to-DOUT tP1 See Figure 6 80 ns Propagation Delay, CS-to-DOUT tP2 See Figure 3 80 ns Rise/Fall Time DOUT/FAULT tR/F (Note 8) See Figure 6 Clock Pulse Frequency 7 ns Propagation Delay CS-to-CSO 30 ns Propagation Delay CLK-to-CLKO 30 ns Note 2: All units are production tested at 25C. Specifications over temperature are guaranteed by design and characterization. Typical values are not guaranteed. All voltages on the logic side are referenced to GNDL. All voltages on the field-side are referenced to GNDF. Note 3: If a 24V supply is not available, the device can be powered through VDD5F. In this mode of operation, VDD24F must be connected to VDD5F. The field-supply UV1 and UV2 alarms will be activated (set to 1), indicating the absence of the 24V supply in this mode of operation. All other specifications remain identical. Note 4: External resistor RIREF is selected to set any desired current limit between 0.5mA and 6mA. Note 5: The isolation voltage is guaranteed for t = 60s, and tested at 120% of the guaranteed value for 1s. Note 6: Common mode voltage (VCM) = 250V. Guaranteed by design and characterization, not production tested. Note 7: Channel-to-channel difference in the time between assertion of CS and the input state being latched. Note 8: Design guaranteed by bench characterization. Limits are not production tested. www.maximintegrated.com Maxim Integrated 6 MAX31953/MAX31963 Octal Industrial Digital Input with Isolated SPI Interface Insulation Characteristics PARAMETER SYMBOL Maximum Repetitive Peak Isolation Voltage VIORM Maximum Working Isolation Voltage VIOWM Maximum Transient Isolation Voltage VIOTM Maximum Withstand Isolation Voltage VISO Maximum Surge Isolation Voltage VIOSM CONDITIONS VALUE UNITS 283 VP 200 VRMS t = 1s 840 VP f = 60Hz, duration = 60s 500 VRMS 1 kV Basic insulation Insulation Resistance RS TA = +150C VIO = 500V 109 Barrier Capacitance Input to Output CIO f = 1MHz 12 pF Minimum Creepage Distance CPG 1.4 mm Minimum Clearance Distance CLR 1.4 mm 0.0026 mm Internal Clearance Comparative Tracking Resistance Index Distance through insulation CTI Material Group II (IEC 60112) 550 Climatic Category 40/125/21 Pollution Degree (DIN VDE 0110, Table 1) 2 ESD Protection PARAMETER ESD www.maximintegrated.com SYMBOL CONDITIONS MIN TYP Human Body Model, all pins 2 Human Body Model, IN1-IN8 with respect to GNDF 15 MAX UNITS kV Maxim Integrated 7 MAX31953/MAX31963 Octal Industrial Digital Input with Isolated SPI Interface Typical Operating Characteristics (TA = +25C, RIREF = 15k, unless otherwise noted.) 10 10.5 10.0 9.5 9.0 8.5 0 6 12 18 24 30 4 2 3.7 3.5 toc04 0 6 ALL IN_ = 10V 3.1 2.9 2.7 -50 -25 0 25 50 75 30 ALL IN_ = 24V 9.6 9.5 ALL IN_ = 10V 9.4 9.3 9.2 9.0 36 -50 -25 0 100 125 150 toc05 3.0 0 6 12 18 24 30 36 8.0 7.0 6.0 5.0 4.0 3.0 0.0 0 13 26 39 52 65 RIREF (k) 4.0 RIREF = 15k VIN_ = 24V 3.8 3.6 2.30 toc06 1.0 toc07 2.40 100 125 150 2.0 2.9 2.50 75 9.0 VIN_ (V) IIN_ CURRENT LIMIT vs. TEMPERATURE 50 IIN_ CURRENT vs. RIREF 10.0 3.1 2.8 25 TEMPERATURE (C) 3.2 2.60 2.20 24 IIN_ CURRENT LIMIT (mA) IIN_ CURRENT LIMIT (mA) 2.70 18 MAX31963 CS = GNDL CLK = 2MHz ALL IN_ CONNECTED 3.3 TEMPERATURE (C) 2.80 12 FIELD-SUPPLY CURRENT vs. VIN_ 3.4 ALL IN_ = 24V 3.3 2.5 9.7 9.1 3.5 VDD24F SUPPLY CURRENT (mA) VDD24F SUPPLY CURRENT (mA) MAX31963 CS = GNDL CLK = 2MHz 9.8 VDD24F SUPPLY VOLTAGE (V) FIELD-SUPPLY CURRENT vs. TEMPERATURE toc03 MAX31953 CS = GNDL CLK = 2MHz 9.9 6 VDD24F SUPPLY VOLTAGE (V) 3.9 FIELD-SUPPLY CURRENT vs. TEMPERATURE 10.0 8 0 36 toc02 IIN CURRENT LIMIT (mA) 8.0 MAX31963 CS = GNDL CLK = 2MHz ALL IN_ = 24V 12 VDD24F SUPPLY CURRENT (mA) 11.0 FIELD-SUPPLY CURRENT vs. FIELD-SUPPLY VOLTAGE 14 MAX31953 CS = GNDL CLK = 2MHz ALL IN_ = 24V 11.5 VDD24F SUPPLY CURRENT (mA) toc01 VDD24F SUPPLY CURRENT (mA) FIELD-SUPPLY CURRENT vs. FIELD-SUPPLY VOLTAGE 12.0 IIN_ CURRENT LIMIT vs. VDD5F toc08 RIREF = 15k VIN_ = 24V VDD24F = VDD5F 3.4 3.2 3.0 2.8 2.6 2.4 2.2 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C) www.maximintegrated.com 2.0 4.5 4.6 4.7 4.8 4.9 5 5.1 5.2 5.3 5.4 5.5 VDD5F (V) Maxim Integrated 8 MAX31953/MAX31963 Octal Industrial Digital Input with Isolated SPI Interface Typical Operating Characteristics (continued) (TA = +25C, RIREF = 15k, unless otherwise noted.) RIN_ = 0 1.0 0.9 0.8 0.7 0.6 -50 -25 0 25 50 75 1.1 0.8 0.7 0.6 5.08 5.08 5.06 5.06 IVDD5F = 50mA 5.02 5.00 4.98 IVDD5F = 5mA 4.96 4.94 -50 -25 0 75 12 15 18 21 24 27 30 33 36 4.94 4.94 0 10 20 -50 -25 0 25 50 75 100 125 240 220 200 180 160 140 -50 -25 0 OUTPUT VOLTAGE (V) 5.04 75 100 125 150 toc16 5.00 4.98 4.96 4.94 120 4.92 VDD24F (V) 50 5.02 140 12 15 18 21 24 27 30 33 36 BUCK CONVERTER LOAD REGULATION 5.10 5.06 160 25 TEMPERATURE (C) 240 180 50 260 100 150 5.08 200 40 LDO SHORT-CIRCUIT CURRENT vs. TEMPERATURE toc14 TEMPERATURE (C) 220 30 120 260 www.maximintegrated.com 4.96 300 IVDD5F = 0A 280 9 4.98 toc13 LDO SHORT-CIRCUIT CURRENT vs. VDD24F toc15 6 5.00 LOAD CURRENT (mA) IVDD5F = 50mA 4.96 VDD24F (V) 100 5.02 4.90 100 125 150 4.98 4.90 SHORT-CIRCUIT CURRENT (mA) 50 5.00 4.90 300 5.04 280 5.02 4.92 9 25 LDO OUTPUT VOLTAGE vs. TEMPERATURE 5.04 4.92 6 5.06 4.92 5.10 LDO OUTPUT VOLTAGE (V) LDO OUTPUT VOLTAGE (V) toc12 toc11 5.08 TEMPERATURE (C) LDO LINE REGULATION 5.04 LDO LOAD REGULATION 5.10 0.9 TEMPERATURE (C) 5.10 toc10 RIN_ = 2.2k 1.0 0.5 100 125 150 INPUT VOLTAGE HYSTERESIS vs. TEMPERATURE SHORT-CIRCUIT CURRENT (mA) 1.1 0.5 1.2 INPUT VOLTAGE HYSTERESIS (V) INPUT VOLTAGE HYSTERESIS (V) toc09 LDO OUTPUT VOLTAGE (V) INPUT VOLTAGE HYSTERESIS vs. TEMPERATURE 1.2 4.90 0 10 20 30 40 50 LOAD CURRENT (mA) Maxim Integrated 9 MAX31953/MAX31963 Octal Industrial Digital Input with Isolated SPI Interface Typical Operating Characteristics (continued) (TA = +25C, RIREF = 15k, unless otherwise noted.) BUCK CONVERTER LINE REGULATION toc17 5.08 5.08 5.06 5.06 5.04 5.02 5mA LOAD 5.00 4.98 4.96 50mA LOAD 4.94 5.04 NO LOAD 5.02 F 4.98 50mA LOAD 4.96 IVDD24 3.2mA 10mA/div F 4.92 9 4.90 12 15 18 21 24 27 30 33 36 -50 -25 0 BUCK SHORT-CIRCUIT CURRENT vs. TEMPERATURE toc20 130 SHORT-CIRCUIT CURRENT (mA) 110 100 HARD SHORT 90 80 70 60 -50 -25 0 25 50 75 100 125 HARD SHORT 120 100 150 6 12 18 24 30 5 5 6 7 8 SPI CLOCK FREQUENCY (MHz) www.maximintegrated.com 7.85 7.80 7.75 7.70 7.65 7.60 -50 -25 0 25 9 10 50 75 100 125 150 TEMPERATURE (C) FIELD-SUPPLY CURRENT vs. DATA RATE 20 VDD24F SUPPLY CURRENT (mA) 6 4 7.90 7.50 36 toc24 CLK = 2MHz CS = GNDL ALL IN_ = 24V 18 7 toc22 CS = GNDL CLK = 2MHz 7.55 toc23 8 3 LOGIC SUPPLY CURRENT vs. TEMPERATURE VDD24F (V) 9 2 8.00 7.95 CS = GNDL 1 400s/div 150 10 LOAD 140 10 VDDL SUPPLY CURRENT (mA) 125 160 80 LOGIC SUPPLY CURRENT vs. DATA RATE 11 4 100 180 TEMPERATURE (C) 12 75 RLOAD = 10 L = 33H C = 10F 200 10 LOAD 120 50 BUCK SHORT-CIRCUIT CURRENT vs. VDD24F toc21 220 L = 68H C = 10F 140 25 TEMPERATURE (C) VDDL SUPPLY CURRENT (mA) 6 150 SHORT-CIRCUIT CURRENT (mA) 2V/div VDD5 5.00 VDD24F (V) 50 toc19 COUT FULLY DISCHARGED BEFORE STARTUP 4.94 4.92 4.90 BUCK CONVERTER STARTUP CURRENT BUCK CONVERTER OUTPUT VOLTAGE vs. TEMPERATURE toc18 5.10 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 5.10 16 14 MAX31953 12 10 8 6 MAX31963 4 2 0 1 2 3 4 5 6 7 8 9 10 SPI CLOCK FREQUENCY (MHz) Maxim Integrated 10 MAX31953/MAX31963 Octal Industrial Digital Input with Isolated SPI Interface Typical Operating Characteristics (continued) (TA = +25C, RIREF = 15k, unless otherwise noted.) FIELD-SUPPLY CURRENT vs. DATA RATE 16 14 36 34 32 tP1 (ns) 12 11 30 10 28 9 26 8 24 7 22 6 VDD24F = VDD5F = 5V FIGURE 7 38 CLK = 2MHz CS = GNDL 13 CLK-TO-DOUT PROPAGATION DLEAY vs. VDDL toc26 40 ALL IN_ = 24V VDD24F = VDD5F = 5V 15 VDD5F SUPPLY CURRENT (mA) toc25 1 2 3 4 5 6 7 8 9 20 10 3.0 3.5 4.0 SPI CLOCK FREQUENCY (MHz) CLK-TO-DOUT PROPAGATION DELAY vs. TEMPERATURE toc27 40 INPUT CURRENT (mA) 34 32 tP1 (ns) 5.5 toc28 3.5 36 30 28 26 24 3.0 2.5 2.0 1.5 1.0 0.5 22 20 5.0 IIN_ vs. VIN_ 4.0 VDD24F = VDD5F = 5V FIGURE 7 38 4.5 VDDL (V) -50 -25 0 25 50 75 100 TEMPERATURE (C) www.maximintegrated.com 125 150 0.0 0 6 12 18 24 30 36 INPUT VOLTAGE (V) Maxim Integrated 11 MAX31953/MAX31963 Octal Industrial Digital Input with Isolated SPI Interface Pin Configurations TOP VIEW 3 GNDL 4 ISOLATED LOGIC-SIDE 2 DB1L FIELD-SIDE DB0L + FIELD-SIDE 1 ISOLATED LOGIC-SIDE FAULT 48 DOUT 47 CS 46 CLK 45 VDDL N.C. 5 44 N.C. N.C. 6 43 N.C. N.C. 7 42 N.C. N.C. 8 41 N.C. N.C. 9 40 N.C. N.C. 10 39 N.C. GNDF 11 38 VDD5F DB1F 12 37 VDD24F DB0F 13 36 MODESEL 14 LX - MAX31963 N.C. - MAX31953 35 GNDF IN1 15 34 CLKO LED1 16 33 CSO IN2 17 32 IREF LED2 18 31 DINF IN3 19 30 LED8 LED3 20 29 IN8 MAX31953 MAX31963 IN4 21 28 LED7 LED4 22 27 IN7 IN5 23 26 LED6 LED5 24 25 IN6 TSSOP Pin Description PIN NAME FUNCTION LOGIC-SIDE PINS 1 FAULT Active-High Fault Indicator. A high state indicates low field-side supply voltage or an overtemperature condition. Read status bits for cause of fault. 2 DB0L This input controls debounce filter in conjunction with DB1L. See Table 1. 3 DB1L This input controls debounce filter in conjunction with DB0L. See Table 1. 4 GNDL Logic-Side Ground for Power and Signals 45 VDDL Logic-Side Supply 46 CLK Serial-Clock Input for the SPI interface 47 CS Chip-Select Input. Assert low to enable the SPI interface. 48 DOUT www.maximintegrated.com Serial Data Output of the SPI Interface. When CS is high DOUT is high. Maxim Integrated 12 MAX31953/MAX31963 Octal Industrial Digital Input with Isolated SPI Interface Pin Description (continued) PIN NAME FUNCTION ISOLATION/CREEPAGE PINS 5-10, 39-44 N.C. Not Connected. The space between these pins provides necessary creepage and clearance. The PWB area between these pins should be clear of traces. FIELD-SIDE PINS 11, 35 GNDF Field-Side Ground. Ground return for all data inputs and the field power supply 12 DB1F Isolated Open-drain Output of DB1L. Controls debounce filter in conjunction with DB0L. See Table 1. If daisy-chaining to MAX31911 or MAX31913, connect to DB1 of daisy-chained devices to control their debounce filter. 13 DB0F Isolated Open-Drain Output of DB0L. Controls debounce filter in conjunction with DB1L. See Table 1. If daisy-chaining to MAX31911 or MAX31913, connect to DB0 of daisy-chained devices to control their debounce filter. 14 MODESEL SPI Mode-Select Input. Tie MODESEL high for 8-bit data (IN1-IN8 states only). Tie MODESEL low for 16-bit data (IN1-IN8 plus CRC and status bits). 15,17,19,21, 23,25,27,28 IN1 - IN8, respectively Field inputs. For 24V type 1 and type 3 inputs, place a 2.2k resistor between the field input and IN_. 16,18,20,22, 24,26,28,30 LED1 - LED8, respectively 31 DINF Serial Data Input Field-Side. Data input for daisy-chaining. 32 IREF Current-Limit Reference Resistor. For 24V Type 1 and Type 3 inputs, place a 15k resistor from IREF to GNDF. 33 CSO Isolated Chip-Select Output for Daisy-Chain Applications. Connect to CS of all devices in the chain. 34 CLKO Isolated SPI Clock Output for Daisy-Chain Applications. Connect to CLK input of all devices in the chain. 36 LX (MAX31963) When using internal buck converter, connect 68FH inductor between LX and VDD5F. Connect a 10F capacitor in parallel with a 0.1F capacitor from VDD5F to GNDF. N.C. Energyless LED Driver Outputs. Connect to GNDF if LEDs are not used. (MAX31953) No connect. 37 VDD24F MAX31954 Field-Side Power Input for LDO. Connect to 24V field supply. MAX31963 Field-side Power Input for Buck Converter. Connect to 24V field supply. 38 VDD5F Output of Buck Converter or LDO. Power input for field-side circuit. Bypass to GNDF with 4.7F capacitor. If the integrated regulator is not used and if the field-side is powered using a 5V supply, connect an external 5V supply to VDD5F and VDD24F. EP -- www.maximintegrated.com Exposed Pad. Connect to GNDF. Solder entire exposed pad area (EP = exposed pad on back of package) to ground plane for best thermal performance. Maxim Integrated 13 MAX31953/MAX31963 Octal Industrial Digital Input with Isolated SPI Interface Functional (or Block) Diagram 68H MAX31963 ONLY RIREF IREF VDD24F N.C. IREF GENERATOR LX VDD5F DINF VDDL 3.3 TO 5.5V TEMP MONITOR 5V REGULATOR GNDL IREF SUPPLY MONITORS GNDF DB0F DB1F CRC GENERATOR VREF DEBOUNCE FILTER IN1 LED1 FAULT FAULT DETECT DOUT CURRENT LIMITER AND LED DRIVER IREF INPUT CHANNEL 1, TYPICAL OF 8 LATCH SERIAL INTERFACE CLK MAX31953 MAX31963 CS IN8 INPUT CHANNEL 8 LED8 TO DE BOUNCE 5V DB0L 30A PULLUPS DB1L DB1F www.maximintegrated.com DB0F CSO CLKO Maxim Integrated 14 MAX31953/MAX31963 Detailed Description The MAX31953/MAX31963 senses the state (on, high or off, low) of eight digital inputs. The input data is serialized and sent across the isolation barrier to an SPI interface. For compliance with IEC 61131-2 Type 1 and Type 3 digital inputs, a 15k current-setting resistor is connected from IREF to GNDF and a resistor (RINx) placed between each field input and the corresponding INx pin. Under these conditions, the current into INx rises linearly with an input voltage up to approximately 2.4mA and then remains constant. This constant-current mode significantly reduces power dissipation while maintaining compliance with the IEC61131-2 standard for digital inputs. The nominal thresholds plus the additional voltage drop across a 2.2k series resistor provides system thresholds that are compatible with both Type 1 and Type 3 inputs. Input current and system threshold voltage can be changed by changing the value of resistor RIREF and the value of the series input resistor (RINx). The input current limit is set by the value of RIREF and is adjustable over a range of 0.5mA to 6mA. IIN = 36/RIREF, where IIN is the nominal input current in mA and RIREF is the resistor value in k. RIREF sets the current limit for all eight inputs. The nominal threshold voltage at INx is not affected by changes in the input current. However, system threshold voltages will be affected due to the voltage drop across the series input resistor RINx. The following equation provides the transition threshold at the field input (RINx input). VINF = VTHP + RINx x 31.2/RIREF where, Octal Industrial Digital Input with Isolated SPI Interface upper-voltage alarm clears the SPI flag UV2 to 0 when VDD24F drops below VALRMONUV2. This indicates a problem with the 24V supply. It is not an indication that the devices is close to its functional limit. UV2 does not assert the FAULT pin. When VDD24F rises above VALRMOFFUV2, the UV2 flag is set again to 1. The lower VDD24F alarm (UV1) trips when VDD24F falls below VALRMONUV1 and indicates that VDD24F is approaching the dropout voltage of the VDD5F regulator. The alarm clears the SPI flag UV1 to 0 and asserts the FAULT pin. The SPI flag is set again to 1 and the FAULT pin de-asserted when VDD24F rises above VALRMOFFUV1. The overtemperature alarm trips when the nominal die temperature rises above TALRM. This sets the SPI flag OT to 1 and asserts the FAULT pin. The OT flag is cleared to 0 and the FAULT pin de-asserts when the die temperature drops below the alarm threshold and a hysteresis margin of TALRM_HYS. If the temperature continues to rise, thermal shutdown will occur above a die temperature of TSHDN. At this point, the device shuts down and all internal functions of the device are disabled, including the serializer and the LDO or the buck regulator. When powering the devices directly from a 5V supply, connect VDD24F directly to VDD5F. This is an automatic undervoltage condition for VDD24F, so both UV flags will be active and the FAULT pin asserts. The OT flag is still valid, but the FAULT output is no longer meaningful. See Figure 1 for a typical circuit powered using VDD5F on the field side. Consult the Electrical Characteristics table for detailed information on alarm thresholds. VINF is the field input threshold voltage, VTHP is the devices' threshold (VTHP+ for rising inputs and VTHP- for falling inputs, as shown in the Electrical Characteristics table), RINx is the k value of the resistor between the field input and the INx pin of the devices, and RIREF is the resistor from IREF to GNDF. Energyless LED Drivers When INx is determined to be on, its input current is diverted to the LEDx pin and flows from that pin to GNDF. Placing an LED between LEDx and GNDF provides an indication of the input state without increasing overall power dissipation. If the indicator LEDs are not used, connect LEDx to GNDF. Fault Detection and Monitoring The devices continually monitors die temperature and VDD24F. There are two alarm levels for VDD24F. The www.maximintegrated.com Figure 1. Powering Using VDD5F Maxim Integrated 15 MAX31953/MAX31963 Octal Industrial Digital Input with Isolated SPI Interface CRC generation The CRC code can be used to check data integrity during transfer from the device to an external microcontroller. In applications where the integrity of data transferred is not of concern, the CRC bits can be ignored. The CRC uses the following polynomial: P(x) = x5 + x4 + x2 + x0 Glitch Filter A digital glitch filter provides debouncing and filtering of noisy sensor signals. There are two galvanically isolated control inputs (DB0L and DB1L) that control the timeconstant of a debounce filter. The time-constant of this filter is programmable from 0 to 3ms. The same timeconstant is applied to all eight inputs. See Table 1 for debounce settings. cycles, the input change is not sent to the internal shift register. SPI Interface The state of each input is read from an SPI interface that is galvanically isolated from the field inputs. Asserting CS latches the state of all inputs and enables the SPI interface. CLK clocks data out in either the 8-bit or 16-bit format, depending on the state of the MODESEL input. If MODESEL is high, only the states of the eight inputs are clocked-out as an 8-bit word. If MODESEL is low, then a 16-bit word is clocked out. The first 8 bits indicate the state of each input, while the last 8 bits contain three diagnostic flags (two undervoltage levels and overtemperature) plus a 5-bit CRC code to verify data integrity. SPI Waveforms To provide the digital glitch filter, the device checks to see if an input is stable for at least three clock cycles. The duration of a clock cycle is 1/3 of the selected debounce time. If the input is not stable for at least three clock The serial output of the device adheres to the SPI protocol, running with CPHA = 0 and CPOL = 0. Input states on IN1-IN8 are latched in on the falling-edge of CS. The transfer of data out of the slave output (DOUT) starts Table 1. Debounce Settings Table 2. MODESEL Settings DB0L DB1L BINARY VALUE NOMINAL DEBOUNCE TIME MODESEL SETTING 0 0 0 0 0 1 1 25s 0 16-bit output; [IN8-IN1] [CRC (5 bit)] [UV1] [OT] [UV2] 1 0 2 0.75ms 1 8-bit output; [IN8-IN1] 1 1 3 3ms SPI DATA See Electrical Characteristics table for timing tolerance. FILTER CLOCK INPUT OUTPUT Figure 2. Debounce filter Example www.maximintegrated.com Maxim Integrated 16 MAX31953/MAX31963 Octal Industrial Digital Input with Isolated SPI Interface CLK DOUT IN8 IN7 IN6 IN5 IN4 IN3 IN2 IN1 CRC4 CRC3 CRC2 CRC1 CRC0 UV1 OT UV2 CS IN8-IN1 VALID Figure 3. SPI Communication Example tCSPW 1/fCLK tP2 tCLKPW CS CLK tR/F DOUT DOUT tP1 Figure 4. SPI Timing Diagram 1 tR/F Figure 7. SPI Timing Diagram 4 tSU1 tH1 CLK DINF DINF VALID IN SIN DINF MAX31913 MAX31913 MAX31953 MAX31963 DOUT DOUT DOUT TO CONTROLLER Figure 8. Daisy Chaining Figure 5. SPI Timing Diagram 2 tSU2 tREC CS CLK Figure 6. SPI Timing Diagram 3 www.maximintegrated.com Maxim Integrated 17 MAX31953/MAX31963 Octal Industrial Digital Input with Isolated SPI Interface immediately when CS is asserted (i.e., MSB is output onto DOUT independent of CLK). The remaining data bits are shifted out on the falling-edge of CLK. The data bits are shifted out through the output DOUT MSB first. When CS is high, DOUT is high. The resultant timing is shown in Figure 3. Note that all bits after IN1 are invalid if the 8-bit operation mode is selected using the MODESEL input. Figure 4 through Figure 7 illustrate the SPI timing specifications. Daisy Chaining For systems with more than eight sensor inputs, multiple devices can be daisy-chained to allow access to all data inputs through a single serial port. When using a daisychain configuration, connect DOUT of one of the devices to the SIN/DINF input of another upstream device. CS and CLK of all devices in the chain should be connected together in parallel (see Figure 4). In a daisy-chain configuration, external components used to enhance EMC robustness do not need to be duplicated for each device of a circuit board. Figure 5 illustrates a 24-input application. Applications Information EMC Standard Compliance The external components shown in Figure 9 allow the device to operate in harsh industrial environments. Components were chosen to assist in suppression of voltage burst and surge transients, allowing the system to meet or exceed international EMC requirements. Table 3 lists an example device for each component in Figure 9. The system shown in Figure 9, using the components shown in Table 3, is designed to be robust against IEC Fast Transient Burst, surge, RFI specifications, and ESD specifications (IEC 61000-4-4, -5, -6, and -2). The recommendations in Figure 8 also apply to the MAX31963. Power Supply Decoupling To reduce ripple and the chance of introducing data errors, bypass VDDL, VDD24F, and VDD5F with 0.1F ceramic capacitors to GNDL and GNDF, respectively. Place the bypass capacitors as close as possible to the power supply input pins. JUMPERS TO 5VOUT & GND OR TO C VDD5F C3 24V VDDL C4 DB0L D1 R1 DB1L VDD24VF C0 D0 C1 RINX fIN1-8 C6 MODESEL C5 MAX31953 EARTH 5V IN1-8 DINF GNDL CLK CINX CS DOUT LED1-8 IREF C, ASIC OR FPGA FAULT GND RIREF 0V C0 EARTH Figure 9. Typical EMC Protection Circuitry for the MAX319153 www.maximintegrated.com Maxim Integrated 18 MAX31953/MAX31963 Octal Industrial Digital Input with Isolated SPI Interface Table 3. Recommended Components COMPONENT DESCRIPTION REQUIRED/RECOMMENDED/OPTIONAL C0 4,7nF, 2kV polypropylene capacitor Recommended C1 10F, 60V ceramic capacitor Required C3 100nF, 10V ceramic capacitor Recommended C4 4,7F, 10V low ESR ceramic capacitor Required C5 100nF, 100V ceramic capacitor Recommended CINX 1nF, 100V ceramic capacitor Required C6 100nF, 10V ceramic capacitor Required D0 36V fast zener diode (ZSMB36) Recommended D1 General-purpose rectifier (IN4007) Optional: For reverse-polarity protection. This diode can alternatively be placed in series with the field supply (24V) LED1-LED8 LEDs for visual input status indication Optional R1 150, 1/3W MELF resistor Required RINX 2,2k, 1/4W MELF resistor Required 15k, 1/8W resistor Required RIREF www.maximintegrated.com Maxim Integrated 19 MAX31953/MAX31963 Octal Industrial Digital Input with Isolated SPI Interface Ordering Information PART REGULATOR TYPE TEMP RANGE PIN-PACKAGE CARRIER MAX31953AUM+ LINEAR -40C to +125C 48 TSSOP-EP Bulk MAX31953AUM+T LINEAR -40C to +125C 48 TSSOP-EP Tape and Reel MAX31963AUM+ BUCK -40C to +125C 48 TSSOP-EP Bulk MAX31963AUM+T BUCK -40C to +125C 48 TSSOP-EP Tape and Reel +Denotes a lead(Pb)-free/RoHS-compliant package. T = Tape and reel. Chip Information PROCESS: BiCMOS www.maximintegrated.com Maxim Integrated 20 MAX31953/MAX31963 Octal Industrial Digital Input with Isolated SPI Interface Package Information For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a "+", "#", or "-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 48 TSSOP U48EM+3 21-0767 90-100004 www.maximintegrated.com Maxim Integrated 21 MAX31953/MAX31963 Octal Industrial Digital Input with Isolated SPI Interface Revision History REVISION NUMBER REVISION DATE 0 6/15 DESCRIPTION Initial release PAGES CHANGED -- For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated's website at www.maximintegrated.com. Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. (c) 2015 Maxim Integrated Products, Inc. 22 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Maxim Integrated: MAX31953AUM+ MAX31953AUM+T MAX31963AUM+T