DM74S241N - Fairchild Semiconductor

August 1986

Revised May 2000

DM74S240 • DM74S241 • DM74S244 Octal 3-STATE Buffer/Line Driver/Line Receiver

DM74S240 • DM74S241 • DM74S244

Octal 3-STATE Buffer/Line Driver/Line Receiver

General Description

These buffers/line drivers are designed to improve both the

performance and PC board density of 3-STATE buffers/

drivers employed as memory-address drivers, clock driv-

ers, and bus-oriented transmitters/receivers. Featuring 400

mV of hysteresis at each low current PNP data line input,

they provi de improve d nois e re jection and h igh fanout out-

puts, and can be used to drive terminated lines down to

133Ω.

Features

■3-STATE outputs drive bus lines directly

■PNP inputs redu ce DC loading on bus l ines

■Hysteresis at data inputs improves noise margins

■Typical IOL (sink current) 64 mA

■Typical IOH (source current) −15 mA

■Typical propagation delay times

Inverting 4.5 ns

Noninverting 6 ns

■Typical enable/disable times 9 ns

■Typical power dissipation (enabled)

Inverting 450 mW

Noninverting 538 mW

Ordering Code:

Connection Diagrams

DM74S240N DM74S241N

DM74S244N

Order Number Package Number Package Description

DM74S240N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

DM74S241N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

DM74S244N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

www.fairchildsemi.com 2

DM74S240 • DM74S241 • DM74S244

Absolute Maximum Ratings(Note 1) Note 1: The “A bsolute Maxim um Ratin gs” are those v alues beyon d which

the saf ety of the device cannot be gu aranteed. Th e device shoul d not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum ratings.

The “Re comme nded Oper ating Co ndition s” tab le will define the cond itions

for actu al device operation.

Recommended Operating Conditions

Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)

Note 2: All typi c al valu es are at VCC = 5V, TA = 25°C.

Note 3: Not more tha n one out put shoul d be shorte d at a t im e and duration sh ould not ex ce ed one s ec ond.

Supply Voltage 7V

Input Voltag e 5.5 V

Operating Free Air Temperature Range 0°C to +70°C

Storage Temperature Range −65°C to +150°C

Symbol Parameter Min Typ Max Units

VCC Supply Voltage 4.75 5 5.25 V

VIH HIGH Level Input Voltage 2 V

VIL LOW Level Input Voltage 0.8 V

IOH HIGH Level Output Current −15 mA

IOL LOW Level Output Current 64 mA

TAFree Air Operating Temperature 0 70 °C

Symbol Parameter Conditions Min Typ Max Units

(Note 2)

VIInput Clamp Voltage VCC = Min, II = −18 mA −1.2 V

Hys Hysteresis (VT+ − VT−)V

CC = Min 0.2 0.4 V

(Data Inputs Only)

VOH HIGH Level VCC = 4.75V, VIH = 2V 2.7

Output Voltage VIL = 0.8V, IOH = −1 mA

VCC = Min, VIH = 2V 2.4 3.4

VIL = 0.8V, IOH = −3 mA

VCC = Min, VIH = 2V 2

VIL = 0.5V, IOH = Max

VOL LOW Level VCC = Min IOL = Max 0.55 V

Output Voltage VIL = 0.8V, VIH = 2V

IOZH Off-State Output Current, VCC = Max VO = 2.4V 50 µA

HIGH Level Voltage Applied VIL = 0.8V

IOZL Off-State Output Current, VIH = 2V VO = 0.5V −50 µA

LOW Level Voltage Applied

IIInput Current at Maximum VCC = Max VI = 5.5V 1 mA

Input Voltage

IIH HIGH Level Input Current VCC = Max VI = 2.7V 50 µA

IIL LOW Level Input Current VCC = Max VI = 0.5V Any A −400 µA

Any G −2mA

IOS Short Circuit Output Current VCC = Max (Note 3) −50 −225 mA

ICC Supply Outputs HIGH DM74S240 80 135

Current DM74S241, DM74244 95 160

Outputs LOW DM74S240 100 150

DM74S241, DM74244 120 180

Outputs Disabled DM74S240 100 150

DM74S241, DM74S244 120 180

3 www.fairchildsemi.com

DM74S240 • DM74S241 • DM74S244

Switching Characteristics

VCC = 5V, TA = 25°C

Symbol Parameter Conditions Min Max Units

tPLH Propagation Delay Time CL = 45 pF DM74S240 2 7 ns

LOW-to-HIGH Level Output RL = 90ΩDM74S241, DM74244 2 9

tPHL Propagation Delay Time CL = 45 pF DM74S240 2 7 ns

HIGH-to-LOW Level Output RL = 90ΩDM74S241, DM74244 2 9

tPZL Output Enable Time to CL = 45 pF DM74S240 3 15 ns

LOW Level RL = 90ΩDM74S241, DM74244 3 15

tPZH Output Enable Time to CL = 45 pF DM74S240 2 10 ns

HIGH Level RL= 90ΩDM74S241, DM74244 3 12

tPLZ Output Disable Time CL = 5 pF DM74S240 4 15 ns

from Low Level RL = 90ΩDM74S241, DM74244 2 15

tPHZ Output Disable Time CL = 5 pF DM74S240 2 9 ns

from High Level RL = 90ΩDM74S241, DM74244 2 9

tPLH Propagation Delay Time CL = 150 pF DM74S 240 3 10 ns

LOW-to-HIGH Level Output RL = 90ΩDM74S241, DM74244 4 12

tPHL Propagation Delay Time CL = 150 pF DM74S240 3 10 ns

HIGH-to-LOW Level Output RL = 90ΩDM74S241, DM74244 4 12

tPZL Output Enable Time to CL = 150 pF DM74S240 6 21 ns

LOW Level RL = 90ΩDM74S241, DM74244 6 21

tPZH Output Enable Time to CL = 150 pF DM74S240 4 12 ns

HIGH Level RL = 90ΩDM74S241, DM74244 4 15

www.fairchildsemi.com 4

DM74S240 • DM74S241 • DM74S244 Octal 3-STATE Buffer/Line Driver/Line Receiver

Physical Dimensions inches (millimeters) unless otherwise noted

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Package Number N20A

Fairchild does not assu me any responsibility for use of any circuitry de scribed, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life suppor t de vices o r syste ms are devices or syste ms

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical compon ent i n any compon ent of a lif e supp ort

device or system whose failure to perform can be rea-

sonabl y ex pect ed to ca use the fa ilu re of the li fe su pp ort

device or system, or to affect its safety or effectiveness.