Microchip PIC1654S FEATURES + 32 8-bit RAM registers * 512 x 12-bit program ROM Arithmetic Logic Unit Real Time ClockCounter Self contained oscillator for crystal or ceramic resonator Access to RAM registers inherent to instruction Available in three temperature ranges: 0' to 70C, -40 to 85C and -40 to 110C + 18 pin package + 2 level stack for subroutine nesting Open drain option on all lO lines 12 bi-directional I/O lines 2 usec instruction execution time DESCRIPTION The PIC 1654S microcontroller is a MOS/LSI device con- taining RAM, I/O. and a central processing unit as well as customer-defined ROM ona single chip. This com- bination produces a /ow cost solution for applications which require sensing individual inputs and controlling individual outputs. Keyboard scanning, display driving, and other system control functions can be done at the same time due to the power of the 8-bit CPU. The internal ROM contains a customer-defined program using the PIC's powerful instruction set to specify the overall functional characteristics of the device. The 8-bit input/output registers provide latched lines for interfac- ing to a limitless variety of applications. The PIC can be used to scan keyboards, drive displays. control elec- tronic games and provide enhanced capabilities for motor control, telecommunication equipment. radios, television, consumer appliances, industrial timing and control applications. The 12-bit instruction word format provides a powerful yet easy to use instruction repertoire emphasizing single bit manipulation as well as logical and arithmetic operations using bytes. 1990 Microchip Technology Inc. 8-Bit Microcontroller PIN CONFIGURATION 18 Lead Dual In Line 18 Lead SOIC | Top View OORA2 G1 189 RAIS > RAB 2 17 RAO RICC 3 16 OSC1< MCLR 4 15] OSC2 > GND (5 14 VoD < RBO [6 1310 RB? <> oRBI (17 121) RB6 <> RB2 78 411] RBS << i <3 RB3 9 1019 RB4 | The PIC1654S is fabricated with N-Channel Silicon Gate technology resulting in a high performance prod- uct with proven reliability and production history. Only a single wide range power supply is required for opera- tion. and an on-chip oscillator provides the operating clock with an external crystal or ceramic resonator to establish the frequency. inputs and outputs are TTL- compatible. Extensive hardware and software support is available to aid the user in developing an application program and to verify performance before committing to mask tooling. Programs can be assembled into machine language using PICALC, a powerful macroassembler. PICALC is available in various versions that can be run on many popular computer systems. Once the application pro- gram is developed several options are available to insure proper performance. The PICES li real time In- Circuit Emulation System, PiC Field Demo boards (PFD), and the ROM-less version of the PIC 1654S, the PIC1664, provide all required development and debugging tools. DS33013A-1PIC 1654S PIC1654S BLOCK DIAGRAM W REGISTER FILE SELECT 5 GENERAL REGISTER | REGISTER -_ [ (F4) FILES (F10s-F378) c 8 T ) STANDARD 2) OSCILLATOR __f 8 Fose/8 , 4 Y PROGRAM | ~ ROM 51 1 RTCC MCLA OM 512% 12 osci osc I | J ARCHITECTURAL DESCRIPTION The firmware architecture of the PIC series microcon- troller is based on a register file concept with simple yet powerful commands designed to emphasize bit, byte, and register transfer operations. The instruction set also supports computing functions as well as these control and interface functions. Internally, the PIC is composed of three functional ele- ments connected together by a single bidirectional bus: the Register File composed of 32 addressable 8-bit registers, an Arithmetic Logic Unit, and a user-defined Program ROM composed of 512 words each 12 bits in width. The Register File is divided into two functional groups: operational registers and general registers. The operational registers include, among others, the Real Time Clock/Counter (RTCC)}, the Program Counter (PC), the Status Register, and the I/O Registers. The general purpose registers are used for data and control informa- tion under command of the instructions. The Arithmetic Logic Unit contains one temporary work- ing register (W Register) and gating to perform Boolean functions between data held in the working register and any file register. The Program ROM contains the operational program for the rest of the logic within the controller. Sequencing of microinstructions is controlled via the Program Counter (PC) which automatically increments to execute in-line programs. Program control operations can be performed by Bit Test and Skip instructions, Jump instructions, Calt instructions, or by loading computed addresses into the PC. In addition, an on-chip two-level stack is employed to provide easy to use subroutine nesting. Activating the MCLR input on power up initializes the ROM program to address 7778. 0S33013A-2 4-38 1990 Microchip Technology Inc.PIC1654S PIN FUNCTION TABLE Signal Definition OSC1 (input), OSC2 (Output) RTCC (Input) RAO-3 (Input/Output) RBO-7 (Input/Output) MCLA (Input) Vob Vss These pins are the time base inputs to which a crystal. ceramic resonator, or external single phase clock may be connected. The frequency of oscillation is 8 times the instruction cycle frequency. Real Time Clock/Counter. Used by the microprogram to keep track of elapsed time between events. The Real Time Clock;Counter Register increments on falling edges applied to this pin. This register (F1) can be loaded and read by the program. This is a Schmitt trigger input. A mask option will allow an internal clock signal whose period is equal to the instruction execution time to_ drive the real time clock counter register. In this mode, transitions in the RTCC pin will be disregarded. However. the pin must be tied to either Vss ar VoD to avoid unintended test mode activation. 4 user programmable {/O lines (F5). The four MSB's are always read as logic 0's. All inputs and outputs are under direct contro! of the program. A mask option will allow any I/O pin at the time of ROM pattern definition to be open drain. 8 user programmable 1/O lines (F6). All inputs and outputs are under direct control of the program. A mask option will allow any |/O pin at the time of ROM pattern definition to be open drain. Master Clear. Used to initialize the internal ROM program to address 7778 and latch all lO registers high. Should be held law 10 - 75ms past the time when Vop 2 4.5V depending on the crystal start up time. This is a Schmitt trigger input. Power supply. Ground pin. 1990 Microchip Technology Inc. 4-39 DS33013A-3PIC1654S REGISTER FILE ARRANGEMENT File (Octal) Function FO Not a physically implemented register. FO calls for the contents of the File Select Register (low order 5 bits) to be used to select a file register. FO is thus useful as an indirect | address pointer. For example, W + FO W will add the contents of the file register painted to by the FSR {F4) to W and place the result in W. FA Real Time ClockCounter Register. This register can be loaded and read by the microprogram. The RTCC register keeps counting up after zero is reached. The counter increments on high-to- low transitions on the RTCC input. However, if data is being stored in the RTCC register simultaneously with a negative transition on the RTCC pin, the RTCC register will contain the new stored value and the external transition will be ignored by the microcomputer. Fe Program Counter (PC}. The nine bit wide PC is automatically incremented during each instruction cycle, unless It is written into under program control (MOVWF F2, GOTO, CALL, ADDWF Fe, | RETLW). CALL, MOVWF2. ADDWF2 instructions write only the 8 low order bits of the PC, while | the MSB ts made to zero. Only the 8 low order bits of Fe can be read under program control. F3 Status Word Register. F3 can be altered under program control only via bit set, bit clear. or MOVWF F3 instruction. (7) (6) (5) (4) 3) (2A) ep tt pte |e] | C (Carry): For ADD and SUB instructions, this bit is set if there is a carry out from the most significant bit of the resultant. For ROTATE instructions, this bit is loaded with either the high or low order bit of the source. DC (Digit Carry): For ADD and SUB instructions, this bit is set if there is a carry out from the 4th low order bit of the resultant. Note that a subtraction os always executed as an addition of the two's complement of the second operand. Z (Zero): Set if the result of an Arithmetic operation is zero. Bits: 3-7 These bits are defined as logic ones. F4 File Select Register (FSR). Low order 5 bits only are used. The FSR is used in generating effective file register addresses under program control. When accessed as a directly addressed file, the upper 3 bits are read as ones. F5 VO Register A (RAO-RA3} (RA4 - RA7 defined as zeros). F6 'O Register B (RBO-RB7). F7-F378 General Purpose Registers. | D$33013A-4 4-40 1990 Microchip Technology Inc.PIC1654S BASIC INSTRUCTION SET SUMMARY Each PIC instruction is a 12-bit word divided into an OP For bit oriented instructions. b represents a bit field code that specifies the instruction type and one or more designator that selects the number of the bit affected by operands specifying the operation of the instruction. the operation, while f" represents the number of the file The following PIC instruction summary lists byte-ori- in which the bit is located. ented. btt-oriented, and literal and controi operations. For {literal and control operations, k" represents an For byte-oriented instructions. "f" represents a file regis- eight- or nine-bit constant or literal value. ter designator and "d" represents a destination designa- tor. The file register designator specifies which one of For an oscillator frequency of 4MHz the instruction the 32 PIC file registers is to be utilized by the instruction. execution time is 2 usec, unless a conditional testis true The destination designator specifies where the result of or the program counter is changed as a result of an the operation performed by the instruction is to be instruction*. In these two cases. the instruction execu- placed. If "d" is zero. the result is placed in the PIC W tion time is 4 usec. register. If "d" is one, the result is returned to the file register specified in the instruction. 1GOTO. CALL, RETLW. MOVWF2. ADDWF2). BYTE-ORIENTED FILE REGISTER 111-6) (5) (4-0) Ford =0.f W(PICAL accepts d = 0 ord = Win the mnemonic) | OP CODE| TAFE # | | d=1.ff iifdis omitted, assembler assigns d = 1}. OT | Instruction- Mnemonic, . | Status | L. Binary (Octal) | Name , Operands = Operation | Affected ee ee {____ | 000 000 000 000 (0000) ; No Operation NOP - - None 000 6000) stiff fff (0040) | Mave W tof (Note 1) MOVWF - Wt None | 000 001 000 000 (0100) | ClearW | CLRW - | 0-Ww Zz | ocO 001 = iff fff (0140; | Clear f | CLRF f | Ot i Z c00 010 aff fff (0200) | Subtract W from f SUBWF sf. | f-W-ad [f + W + 1d] C.DC.Z 000 011 diff ff (0300) | Decrement f DECF fd | f1d 2 000 6100 aff fff 10400) | Inclusive OR W and f IORWF std | Wfad Zz 000 101 aff ff = (0800) | ANDbWanct | ANDWE td | Weld 2 | 000 6110 = dff fff (0600) | Exclusive OR W and f | XORWF f.d | Wfod | Z 000 111 aff fff {0700} | Add Wand ft ADDWF fd | W+Fd | C.DC.Z 001 000 aff fff 11000) | Move f MOVF fd | fod zZ 001 001 aff ftf 11100) | Compiement f COMF fd | fod | Zz 001 O11 dff fff (1200) | Increment f INCF fd | f+17d 2 ' 901 O11 aff fff {1300} | Decrement f. Skip to Zero| DECFSZ fid | f- 1~+d. skip if Zero None | 001 100 aff ff (1400) | Rotate Right f RRF fa | f(nydin-1), Cd(7). 10)4C] CC 001 101 diff fff 11500, | Rotate Left i RLF fd | f(npdin + 1), Crdi0v. c | | | | * FIC ' 001 110 dff tft (1600) | Swap halves f | SWAPF f.d | {(0-3)eof(4-7) 9d None | 001 111 dff fff (1700) [ncrement f, Skip if Zero INCFSZ = fid f + 1d. skip if Zero Nore | 1990 Microchip Technology Inc. 4-4} DS33013A-5PIC1654S (11-8) (7-5) (4-0) BIT-ORIENTED FILE REGISTER OPERATIONS OP CODE | b (BIT #)| {FILE 4) Instruction- Mnemonic . Status . Name Operation Binary (Octal) Operands P Affected 010 Obb bff fff (2000) | Bit Clear f BCF fb | 0-f(b) None 010 1ibb bff fff (2400) | Bit Set f BSF fb | 1-f(b) None 011 Obb = bff fff (3000) | Bit Test f. skip :f Clear BTFSC fib | Bit Test fib}: skip if clear None 011 1Ibb bff fff (3400) | Bit Test f. skip if Set BTFSS fio | Bit Test fib): skip if set None | (11-8) (7-0) : LITERAL AND CONTROL OPERATIONS OP CODE | KULITERAL | | Instruction- Name Mnemonic, Operation Status Binary (Octal) Operands Affected 100 Okk = kkk kkk (4000) | Return and place Literal in W RETLW k kw, Stack->PC None 100 1tkk = kkk kkk (4400) | Call subroutine (Note 1) CALL k PC+1-Stack. k->PC None 101. kkk = kkk kkk (5000) | Go to address {k is 9 bits) GOTO k k->PC None 110 Okk kkk kkk = (6000) | Move Literal to W MOVLW k kW None 110 kk kkk kkk (6400) | Inclusive OR Literat and W IORLW ik kVWW Zz 111. OkkK = kkk kkk (7000) ; AND Litera! and W ANDLW k keWoW Z 111 tkk =okkk kkk = (7400) L Exclusive OR Literal and W XORLW k k@W3W Zz NOTES: 1. The 9th bit of the program counter in the PIC is zero fora CALL and a MOVWF F2. Therefore, subroutines must be located in program memory locations 0-3778. However, subroutines can be called from anywhere in the program memory since the Stack is 9 bits wide. 2. When an I/O register is modified as a function of itself, the value used will be that value present on the output pins. For example, an output pin which has been latched high but is driven low by an external device, will be relatched in the low state. DS33013A-6 4-42 1990 Microchip Technology inc.PIC1654S SUPPLEMENTAL INSTRUCTION SET SUMMARY The following supplemental instructions summarized tion BCF 3.0 ("Bit Clear, File 3, Bit 0"). These instruction below represent specific applications of the basic PIC mnemonics are recognized by the PIC Crass Assembler instructions. For example, the "CLEAR CARRY" sup- (PICAL). plemental instruction is equivalent to the basic instruc- | SUPPLEMENTAL INSTRUCTION SET SUMMARY | Instruction- Mnemonic, . Status Binary (Octal) Name Operands Operation Affected 010 000 ooo 011 (2003) | Clear Carry CLRC BCF 3,0 010 100 OQ0CO 011 (2403) | Set Carry SETC BSF 3, 0 010 000 #100 ~= O11 {2043) | Clear Digit Carry CLRDC BCF 3, 1 010 100 100 O11 (2443) | Set Digit Carry SETDC BSF 3. 1 010 001 oO0 O11 (2103) | Clear Zero CLRZ BCF 3, 2 010 101 O00 O71 (2503) | Set Zero SETZ BSF 3, 2 - Ott 100 oad OTT (3403) | Skip on Carry SKPC BTFSS 3,0 - ! 011 000 900 O11 (3003) | Skip on No Carry SKPNC BTFSC3. 0 i 011 100 100 011 (3443) | Skip on Digit Carry SKPDC BTFSS 3, 1 011 000 100 O11 (3043) | Skip on No Digit Carry SKPNDC BTFSC 3,1 Ott 101 OGO 8 OrT (3503} | Skip on Zero SKPZ BTFSS 3. 2 011 001 OOO 011 (3103) | Skip on No Zero SKPNZ BTFSC3, 2 - 001 000 {ff fff (1040) | Test File TSTF ft MOVF f, 1 Zz 001 900 Off fff (1000) | Move File to W MOVEFW f MOVE f. 0 Z | 001 001 1ff fff (1140) | Negate File NEGF f.d COMF f, 1 | 001 O10 dff ttt (1200) NCFfd Z 011 000 OOO O11 (3003) | Add Carry to File ADDCF f,d BTFSC 3.0 | 007 010 dif fff (1200) INCF fd | Zz 011 000 o00 OdQt1 (3003} | Subtract Carry from File SUBCF f.d BTFSC 3, 0 000 O11 dff tff (0300) DECF t.d Z 011 000 100 = O11 (3043) | Add Digit Carry to File ADDDCF f.d BTFSG 3. 4 | 001 O10 dff ff (1200) INCF f.d Z | 011 000 100 O11 (3043) | Subtract Digit Carry from File SUBDCF f.d BTFSC 3, 1 Goo O11 aff ttf (0300) DECF td Zz 101. kkk kkk kkk (5000) | Branch Bk GOTO k 011 900 O00 011 (3003) | Branch on Carry BC k BTFSC 3, 0 101. kkk = kkk kkk (5000) GOTO k 011 100 ooo O11 (3403) | Branch on No Carry BNC k BTFSS 3, 0 101 kkk = kkk kkk (5000) GOTO k 011 100 100 O11 (3043) | Branch on Digit Carry BDC k BTFSC 3, 1 404 kkk kkk kkk (5000) GOTO k 011. 001 OOO O11 (3443) | Branch on No Digit Carry BNDC k BTFSS 3. 1 101. kkk = kkk kkk (5000) GOTO k 014 #101 GOO 011 (3103) | Branch on Zero BZ k BTFSC 3. 2 101 kkk = kkk kkk (5000) GOTO k 011 101 O00 011 (3503) | Branch on No Zero BNZ k BTFSS 3, 2 101 kkk = kkk kkk (5000) GOTO k | - | | 1990 Microchip Technology Inc. 4-43 DS33013A-7PIC1654S V/O INTERFACING The equivalent circuit for an I/O port bit is shown below as it would interface with either the input of a TTL device (PIC is outputting) or the output of an open collector TTL device (PIC is inputting). Each 1O port bit can be individually time multiplexed between input and output functions under software control. When outputting through a PIC IO Port, the data is latched at the port and the pin can be connected directly to a TTL gate input. When inputting data through an I/O Port. the port latch must first be set to a high level under program control. This turns off Q,, allowing the TTL open collector device to drive the pad, pulled up by Q,, which can source a minimum of 100uA. Care. however, should be exer- cised when using open collector devices due to the potentially high TTL leakage current which can exist in the high logic state. TYPICAL INTERFACE-BIDIRECTIONAL I/O LINE Dy (INTERNAL D J DATA BUS} Vpp t | | WRITE Q : (INTERNAL $ SIGNAL) [ oo Ce READ (INTERNAL SIGNAL} NOTE: TRANSISTOR GQ CAN BE REMOVED PER MASK OPTION TO FORM AN OPEN-DRAIN OUTPUT. PICLOBIT | | Om DEVICE OUTPUT L (OPEN COLLECTOR) PROGRAMMING CAUTIONS The use of the bidirectional 1/O ports are subject to certain rules of operation. These rules must be carefully followed in the instruction sequences written for lO operation. BIDIRECTIONAL I/O PORTS The bidirectional ports may be used for both inut and output operations. For input operations these ports are nan-latching. Any input must be present until read by an input instruction. The outputs are latched and remain unchanged until the output latch is rewritten. For use as an input port the output latch must be set in the high state. Thus the external device inputs to the PIC circuit by forcing the latched output line to the low state or keeping the latched output high. This principle is the same whether operating on individual bits or the entire port. Some instructions operate internally as input fallowed by output operations. The BCF and BSF instructions, for example. read the entire port into the CPU. execute the bit operation. and re-output the result. Caution must be used when using these instructions. As an example a BSF operation on bit 5 of F6 (port RB) will cause all eight bits of F6 to be read into the CPU. Then the BSF operation takes place on bit 5 and F6 is re-output to the output latches. {f another bit of F6 is used as an inut (say bit 0) then bit 0 must be latched high. If during the BSF instruction on bit 5 an external device is forcing bit 0 to the low state then the input/output nature of the BSF instruction will leave bit O latched low after execution. In this state bit O cannot be used as an input until it is again latched high by the programmer. Refer to the examples on the next page. DS33013A-8 4-44 1990 Microchip Technology Inc.Successive Operations on Bidirectional VO Ports Care must be exercised if successive instructions oper- ate on the same 1/O port. The sequence of instructions should be such to allow the pin voltage to stabilize (load dependent) before the next instruction which causes EXAMPLE 1 t | OUTPUT INPUT What is thought to be happening: BSF 6.5 Read into CPU: 00001111 Set bit 5: 00101111 Write to F6: 00101111 If no inputs were low during the instruction execution, there would be no problem. PIC1654S that file to be read into the CPU (MOVF, BIT SET, BIT CLEAR, and BIT TEST) is executed. Otherwise, the previous state of that pin may be read into the CPU rather than the new state. This will happen if tpd (See I: O Timing Diagram) is greater than 1/4tcy (min). When in doubt. it 's better to separate these instructions with a NOP or other instruction. EXAMPLE 2 OUTPUT INPUT What could happen #f an input were low: BSF 6.5 Read into CPU: 00001110 Set bit 5: 00101110 Write to F6: 00101110 {n this case bit 0 is now iatched low and is no longer useful as an input until set high again 1990 Microchip Technology Inc. 4-45 DS33013A-9PIC1654S ELECTRICAL CHARACTERISTICS Maximum Ratings* Ambient temperature under biaS..............60 Storage Temperature Voltage on any pin with respect to Vss (except open CAIN) eee ccc eeeseeeneteteteeiseenteeeeseeecaees -0.3V to + 9.0V Voltage on any pin with respect to Vss (open drain) cesesceetesasatenucscesssessesesseanasseneececeetensetineateneares -0.3V to + 13V Power Dissipation (Note 1)... eee 800mW Exceeding these ratings could cause permanent dam- age to the device. This is a stress rating only and functional operation of this device at these conditions is not implied. Operating ranges are specified in Standard Conditions. Exposure to absolute maximum rating conditions for extended periods may affect device relia- bility. Data labeled typical is presented for design guidance only and is not guaranteed. DC CHARACTERISTICS - PIC16C54S Operating temperature Ta = 0C to + 70C Characteristic Sym Min Typt | Max Units Conditions Power Supply Voltage VDD 45 : 7.0 Vv Primary Supply Current IDD - 30 50 mA All 'O pins @ VoD (See Primary Supply Current | Chart far additional information). Input Low Voltage VIL -0.2 - 0.8 Vv Input High Voltage (except MCLR, RTCC & OSC1) VIH 2.4 Vpb Vv Input High Voltage (MCLR, RTCC & OSC1) ViH2 Vop - 1 - VbD Vv (Note 4) Output High Voltage VOH 2.4 Vopb Vv IOH = -100uA provided by internal pullups (Note 2) Output Low Voltage Vout - 0.45 Vv IOL = -1.6mA, (Note 3) (/O only) Input RTCC Current IRTCC : 7 20 pA Vss < Vin < VoD Input Leakage Current (MCLR) | lic -5 +5 pA Vss < VIN < VbD Output Leakage Current lov - 10 pA Vss < VPIN< 12V (open drain pins) Input Low Current Iie -0.2 - -1.6 mA VIL = 0.4V (internal pullup) (all I/O ports) Input High Current IIH -0.1 -0.4 | - mA VIH = 2.4V (all /O ports) + Typical data is at Ta = 25C, Vpb = 5.0V. NOTES: 1. Total power dissipation for the package is calcu- 3. Total lou for all output pins must not exceed 175 lated as follows: mA. _ _ Pp = (Vpp) (IDD) + E{VbD - VIL) (1loHI) + Z(VOL) 4. Instantaneous voltage on the RTCC and MCLR (lov). input must not exceed VDD + 1V otherwise the test The term I/O refers to all interface pins; input. mode may be entered. Ifthe RTCC pinis notused | output or I/O. in an application it must be tied to Vss or Vop. 2. Positive current indicates current into pin. Negative current indicates current out of pin. 0533013A-10 4-46 1990 Microchip Technology Inc.PIC1654S DC CHARACTERISTICS-P1C1654S-| Operating temperature Ta = -40C to + 85C Characteristic Sym Min Typt | Max | Units Conditions Power Supply Voltage Vop 45 : 7.0 Vv Primary Supply Current IDD - 30 54 mA All I/O pins @ Vop (See Primary Supply Current Chart for additional information). input Low Voltage VIL -0.2 0.8 Vv input High Voltage (except MCLR, ATCC & OSC1) ViH 2.4 - Vob V Input High Voltage (MCLR, RTCC & OSC1) Vin2 Voo- 1 Vobb Vv (Note 4} Output High Voltage VOH 2.4 VDD Vv OH = -100uA provided by internal pullups (Note 2) Output Low Voltage VoL: - - 0.45 Vv lo. = -1.6mA (Note 3) (VO only) input RTCC Current IRTCC - 7 20 HA Vss < Vin. < VDD Input Leakage Current (MCLR) | Itc -5 - +5 pA Vss < VIN. < VOD Output Leakage Current lou - - 10 HA Vss s VPIN < 9V (open drain pins) Input Low Current (all /O ports) | lit - 0.2 -1.6 mA Vit = 0.4V(internal pullup) TA = 0C to 85C Input High Current (ail (O ports} | [tH , -0.1 0.4] - mA VIH = 2.4V | L L t Typical data is at Ta = 25C, VoD = 5.0V. NOTES: | 1. Total power dissipation for the package is calcu- 3. Total lou for ail output pins must not exceed 175 lated as follows: mA. Pp =(VDp) (IDD) + 3 (Vp - Vit) (lit) + E(VoD - Vou) 4. Instantaneous voltage on the RTCC and MCLR (ilOH1) + X(Vor) (lov). input must not exceed VoD + 1V otherwise the test 2. Positive current indicates current into pin. mode may be entered. If the RTCC pinis not used Negative current indicates current out of pin. in an application, it must be tied to Vss or VoD. 1990 Microchip Technology Inc. 4-47 DS33013A-11PIC1654S DC CHARACTERISTICS - PIC1654S-H Operating temperature TA = -40C to+ 110C lated as follows: Pp = (VoD) (IDD) + &(VbD - VIL) (iliL1) + (Vbo - Vou) (OHH) + X(VOL) (lOL). 2. Positive current indicates current into pin. Negative current indicates current out of pin. Characteristic Sym Min Typt | Max | Units Conditions Power Supply Voltage Vpb 45 - 5.5 Vv Primary Supply Current lop - 35 58 mA All /O pins @ VoD (See Primary Supply Current Chart for additional information). Input Low Voltage Vit -0.2 0.8 Vv Input High Voltage (except MCLR. RTCC & OSC1) VIH 2.4 VDD V Input High Voltage (MCLR, ATCC & OSC1) VIH2 VoD - Vbb v (Note 4) Ouiput High Voltage VOH 2.4 Vpo Vv lou = -100nA provided by internal pullups (Note 2) Output Low Voltage (I/O only) VoL - 0.45 Vv lo. = -1.6mA (Note 3) Input RTCC Current IRTCC - 7 20 pA Vss < VIN < VpD Input Leakage Current (MCLR) ILc -5 +5 HA Vss < VIN < VbD Output Leakage Current lo - 20 HA Vss < VPIN < 9V (open drain I/O pins) Input Low Current (all l/O ports) | tit - 0.2 -1.6 mA Vic = 0.4V(internal pullup) TA=0C ta 110C Input High Current (all VO ports) | IIH -0.1 -0.4 | - mA VIH = 2.4V t Typical data is at Ta = 25C. Vop = 5.0V. NOTES: 1. Total power dissipation for the package is calcu- 3. Total lou for all output pins must not exceed 17 5mA. . Instantaneous voltage on the RTCC and MCLR input must not exceed Vop + 1V otherwise the test mode may be entered. If the RTCC pin is not used in an application, it must be tied to Vss or VoD. DS33013A-12 4-48 1990 Microchip Technology Inc.PIC1654S AC CHARACTERISTICS - PIC1654S Operating temperature Ta = 0C to + 70C -40C to +85C and -40C to + 110C 1. Instruction cycle period (tcy) equals eights times the input oscillator time base period. time base element. 1 1 f =_ = _____ imax) tATiminy - tCY (min) + 0.2us 1 For example: if tcy = 4us. fimax) =>- = 238KHz. 4.2us Characteristic sym Min Typ Max Units Conditions Instruction Cycle Time tcy 2 - 10 us | 0.8 MHz - 4.0MHz external time base (Notes 1 and 2) RTCC Input Period tRT tcy = 0.2us-| - - ~ Note 3 High Pulse Width tATH 1/2 IAT - - - Low Pulse Width {RTL 1/2 tAT - Lo NOTES: 2. The oscillator frequency may deviate to 4.08MHz to allow for tolerance of a crystal or ceramic resonator 3. The maximum frequency which may be input to the RTCC pin is calculated as follows: RTCC TIMING k tprH >k__- "ato >| Ay 1) fi \ / \ tap ___ > | 1 1990 Microchip Technology Inc. 4-49 DS33013A-13PIC1654S OSCILLATOR OPTIONS (TYPICAL CIRCUITS) (Cont.) CRYSTAL INPUT OPERATION 20pF bee OSC1 (PIN 16) +-10M XTAL* PARALLEL == RESONANT) 1 V\._ OSC2 (PIN 15) 20pF 1K * Or ceramic resonator EXTERNAL CLOCK INPUT OPERATION Voo 1K S CLOCK FROM = EXTERNAL SYSTEM OSC1 (PIN 16) NC __~__---5 OSC2 (PIN 15) PRIMARY SUPPLY CURRENT AT SELECTED TEMPERATURES PIC1654S PIC1654S-H PIC1654S-I 6545 Characteristic Sym | Typ Max Typ Max Units Conditions Primary Supply Current Ipp | 40 54 48 58 mA -40C, All /O pins at Voo 35 50 44 54 mA 0C, All lO pins at Vop 24 45 39 49 mA 70C. All I/O pins at VDD 22 42 36 46 mA 85C. All l/O pins at VoD 30 40 mA 110C, All lO pins at Voo DS33013A-14 4-50 1990 Microchip Technology Inc.PIC1654S MASTER CLEAR (TYPICAL CIRCUIT) Yop Rext 3 R< 100K < _ Typical Values meme MCLR (PIN4) = R= 100K Cext 0.1pF C=0.tuf ft The MCLR pin must be pulsed tow fer a minimum of one complete instruction cycle (tcy) for the master clear function to be guaranteed, assuming that power is applied and the oscillator is running. For initial power application, a delay is required for the external oscillator time base element to start up before MCLR is brought high. To achieve this, an external RC configuration. as shown, can be used. This provides approximately a 10ms delay (assuming Vpp i's applied as a step function), which may be insufficient for some time base elements. Consult the manufacturer of the time base element for the soecific start-up times. OUTPUT SINK CURRENT GRAPH (TYPICAL) 20 15 lon (mA; 10 5 VOL (volts) lon vS VOL Ta = 28C, Vop = 5.0V Vob = 5.0V 1990 Microchip Technology Inc. 4-51 DS33013A-15PIC1654S SALES AND SUPPORT To order or to obtain information. e.g., on pricing or delivery, please use the listed part numbers, and refer to the factory or the listed sales offices. PART NUMBERS PIC1654S -H /P X | Pattern 3-Digit Package P SO *L Temperature Blank Range [ H |__| Device PIC 1654S Notes: SOIC and PLCC available in Commercial Temperature (0C to +70C) only Pattern Code Plastic DIP SOIC (Gull Wing Lead) PLCC (J Lead) 0C to +70C -40C to +85C -40C to +110C DS33013A-16 4-52 1990 Microchip Technology Inc