June 9, 2011 22142F11 Am29BL162C 25
DATA SHEET
RY/BY#: Ready/Busy#
The RY/BY# is a dedicated, open-drain output pin that
indicates whether an Embedded Algorithm is in prog-
ress or complete. The RY/BY# st atus is valid after the
rising edge of the final WE# pulse in the command se-
quence . Since R Y/BY# is an open-drain output, se ver al
RY/BY# pins can be tied together in parallel with a
pull-up resistor to VCC. (The R Y/BY# pin is not available
on the 44-pin SO package.)
If the output is lo w (Busy), the de vice is activ ely erasing
or programming. (This includes programming in the
Erase Suspend mode.) If the output is high (Ready),
the device is ready to read arr ay data (including during
the Erase Suspend mode), or is in the standby mode.
Table 10 shows the outputs for R Y/BY#. Figures 15, 17,
18 and 19 shows RY/BY# f or read, reset , progr am, and
erase operations, respectively.
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded
Progr am or Erase algo rithm is in progress or comple te,
or whether the device has entered the Erase Suspend
mode. Toggle Bit I may be read at any address, and is
valid after the rising edge of the final WE# pulse in the
command sequence (prior to t he pr ogram or erase op-
eration), and during the sector erase time-out.
During an Embedded Program or Erase algorithm op-
eration, successive read cycles to any address cause
DQ6 to toggle. (The system may use either OE# or
CE# to control the read cycles.) When the operation is
complete, DQ6 stops toggling.
After an er ase command sequen ce is written, if all sec-
tors selected for erasing are protected, DQ6 toggles f or
approximately 100 µs, then returns to reading array
data. If not all selected sectors are protected, the Em-
bedded Erase algorithm erases the unprotected sec-
tors, and ignores the selected sectors that are protected.
The system can use DQ6 and DQ2 together to deter-
mine whether a sector is actively erasing or is erase-
suspended. When the de vice is actively erasing (that is,
the Embedded Erase algorithm is in progress), DQ6
toggles. When the device enters the Erase Suspend
mode, DQ6 stops toggling. However, the system must
also use DQ2 to deter mine which sectors are erasing
or erase-suspended. Alternatively, the system can use
DQ7 (see the subsection on “DQ7: Data# Polling”).
If a program address falls within a protected sector,
DQ6 toggles for approximately 1 µs after the program
command sequence is written, then retur ns to reading
array data.
DQ6 also toggles during the erase-suspend-program
mode, and stops toggling once the Embedded Pro-
gram algorithm is complete.
Table 10 shows the outputs for Toggle Bit I on DQ6.
Figure 8 shows the toggle bit algorithm in flowchart
for m, and the section “Reading Toggle Bits DQ6/DQ2”
e xplains the alg orithm. Figure 21 in the “A C Char acter-
istics” section shows the toggle bit timing diagrams.
Figure 22 shows the differences between DQ2 and
DQ6 in graphical form. See also the subsection on
“DQ2: Toggle Bit II”.
DQ2: Toggle Bit II
The “Toggle Bit II” on DQ2, when used with DQ6, indi-
cates whether a particular sector is actively erasing
(that is , the Em bedded Er ase algorithm is in prog ress),
or whether that sector is erase-suspended. Toggle Bit
II is va lid af ter t he rising edge of the fina l WE# pulse in
the command sequence.
DQ2 toggles when the system reads at addresses
within those sectors that have been selected for era-
sure. (The system may use either OE# or CE# to con-
trol the read cycles.) But DQ2 cannot distinguish
whether the sector is actively erasing or is erase-sus-
pended. DQ6, by comparison, indicates whether the
device is actively erasing, or is in Erase Suspend, but
cannot distinguish which sectors are selected for era-
sure. Thus, both status bits are required for sector and
mode information. Refer to Table 10 to compare out-
puts for DQ2 and DQ6.
Figure 8 shows the toggle bit algorithm in flowchart
for m, and the section “Reading Toggle Bits DQ6/DQ2”
explains the algor ithm. See also the DQ 6: Toggle Bit I
subsection. Figure 21 shows the toggle bit timing dia-
gram. Figure 22 shows the differences between DQ2
and DQ6 in graphical form.
Reading Toggle Bits DQ6/DQ2
Refer to Figure 8 for the following discussion. When-
ever the system initially begins reading toggle bit sta-
tus, it must read DQ7–DQ0 at least twice in a r ow to
determine whether a toggle bit is toggling. Typically,
the system would note a nd store the value of the tog-
gle bit after the first read. After the second read, the
system would compare the new v alue of the toggle bit
with the first. If the toggle bit is not toggling, the device
has completed the program or erase operation. The
system can read array data on DQ7–DQ0 on the fol-
lowing read cycle.
However, if after the initia l two read cycles, the system
determines that the toggle bit is still toggling, the sys-
tem also should note whether the value of DQ5 is high
(see the section on DQ5). If it is, the system should
then determine again whether t he toggle bit is togglin g,
since the toggle bit may have stopped toggling just as
DQ5 went high. If the toggle bit is no longer toggling,
the device has successfully completed the program or
erase opera tion. If it is still toggling, the device did not
complete the operation successfully, and the system