Rev.2.00 Mar 30, 2006 page 1 of 9
HD74HC564, HD74HC574
Octal D-type Flip-Flops (with 3-state outputs) REJ03D0630-0200
(Previous ADE-205-5 10)
Rev.2.00
Mar 30, 2006
Description
These devices are positive edge triggered flip-flops. The difference between HD74HC564 and HD74HC574 is only
that the former has inverting outputs and the latter has noninvertering outputs.
Data at the D inputs, meeting the set-up and hold time requirements, are transferred to the Q or Q outputs on positive
going transitions of the clock (CK) inp ut. When a high logic level is app lied to the output control (OC) input, all
outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the
storage elements.
Features
• High Speed Operation: tpd (Clock to Output) = 13 ns typ (CL = 50 pF)
• High O utput Curre nt: Fanout of 15 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max ( Ta = 25°C)
• Ordering Information
Part Name Package Type Package Code
(Previous Code) Package
Abbreviation Taping Abbreviation
(Quantity)
HD74HC564P
HD74HC574P DILP-20 pin PRDP0020AC-B
(DP-20NEV) P —
HD74HC564FPEL
HD74HC574FPEL SOP-20 pin (JEITA) PRSP0020DD-B
(FP-20DAV) FP EL (2,000 pcs/reel)
HD74HC564RPEL SOP-20 pin (JEDEC) PRSP0020DC-A
(FP-20DBV) RP EL (1,000 pcs/reel)
Note: Please consult the sales office for the above package availability.
Function Table
Inputs Outputs
Output Control Clock Data HD74HC564 HD74HC574
L H L H
L L H L
L L X Q0 Q
0
H X X Z Z
Q0 : level of Q before the indicated Steady-sate input conditions were established.
Q0 : complement of Q0 or level of Q before the indicated Steady-state input Conditions were established.
HD74HC564, HD74HC574
Rev.2.00 Mar 30, 2006 page 2 of 9
Pin Arrangement
HD74HC564
1
2
3
4
5
6
7
8
9
10
(Top view)
11
12
13
14
15
16
17
18
19
20
Output
Control
1D
2D
3D
4D
5D
6D
7D
8D
GND
V
CC
DQ
Clock
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
OE
DQ
OE
DQ
OE
DQ
OE
DQ
OE
DQ
OE
DQ
OE
DQ
OE
HD74HC574
1
2
3
4
5
6
7
8
9
10
(Top view)
11
12
13
14
15
16
17
18
19
20
Output
Control
1D
2D
3D
4D
5D
6D
7D
8D
GND
VCC
DQ
Clock
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
OE
DQ
OE
DQ
OE
DQ
OE
DQ
OE
DQ
OE
DQ
OE
DQ
OE
HD74HC564, HD74HC574
Rev.2.00 Mar 30, 2006 page 3 of 9
Logic Diagram
HD74HC564
1D D
C
C
Q
D
C
C
Q
D
C
C
Q
D
C
C
Q
D
C
C
Q
D
C
C
Q
D
C
C
Q
D
C
C
Q
2D
3D
4D
5D
6D
7D
8D
8
Q
7
Q
6
Q
5
Q
4
Q
3
Q
2
Q
1
Q
CLK
OC
HD74HC564, HD74HC574
Rev.2.00 Mar 30, 2006 page 4 of 9
HD74HC574
1D D
C
C
Q
D
C
C
Q
D
C
C
Q
D
C
C
Q
D
C
C
Q
D
C
C
Q
D
C
C
Q
D
C
C
Q
2D
3D
4D
5D
6D
7D
8D
8Q
7Q
6Q
5Q
4Q
3Q
2Q
1Q
CLK
OC
HD74HC564, HD74HC574
Rev.2.00 Mar 30, 2006 page 5 of 9
Absolute Maximum Ratings
Item Symbol Ratings Unit
Supply voltage range VCC –0.5 to 7.0 V
Input / Output voltage VIN, VOUT –0.5 to VCC +0.5 V
Input / Output diode current IIK, IOK ±20 mA
Output current IO ±35 mA
VCC, GND current ICC or IGND ±75 mA
Power dissipation PT 500 mW
Storage temperature Tstg –65 to +150 °C
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
Recommended Operating Conditions
Item Symbol Ratings Unit Conditions
Supply voltage VCC 2 to 6 V
Input / Output voltage VIN, VOUT 0 to VCC V
Operating temperature Ta –40 to 85 °C
0 to 1000 VCC = 2.0 V
0 to 500 VCC = 4.5 V
Input rise / fall time*1 t
r, tf 0 to 400 ns VCC = 6.0 V
Note: 1. This item guarantees maximum limit when one input switches.
Waveform: Refer to test circuit of switching characteristics.
Electrical Characteristics
Ta = 25°C Ta = –40 to+85°C
Item Symbol VCC (V) Min Typ Max Min Max Unit Test Conditions
2.0 1.5 — — 1.5 —
4.5 3.15 — — 3.15 —
VIH
6.0 4.2 — — 4.2 —
V
2.0 — — 0.5 — 0.5
4.5 — — 1.35 — 1.35
Input voltage
VIL
6.0 — — 1.8 — 1.8
V
2.0 1.9 2.0 — 1.9 —
4.5 4.4 4.5 — 4.4 —
6.0 5.9 6.0 — 5.9 —
IOH = –20 µA
4.5 4.18 — — 4.13 — IOH = –6 mA
VOH
6.0 5.68 — — 5.63 —
V Vin = VIH or VIL
IOH = –7.8 mA
2.0 — 0.0 0.1 — 0.1
4.5 — 0.0 0.1 — 0.1
6.0 — 0.0 0.1 — 0.1
IOL = 20 µA
4.5 — — 0.26 — 0.33 IOL = 6 mA
Output voltage
VOL
6.0 — — 0.26 — 0.33
V Vin = VIH or VIL
IOL = 7.8 mA
Off-state output
current IOZ 6.0 — — ±0.5 — ±5.0 µA Vin = VIH or VIL,
Vout = VCC or GND
Input current Iin 6.0 — — ±0.1 — ±1.0 µA Vin = VCC or GND
Quiescent su pply
current ICC 6.0 — — 4.0 — 40 µA Vin = VCC or GND, Iout = 0 µA
HD74HC564, HD74HC574
Rev.2.00 Mar 30, 2006 page 6 of 9
Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = 25°C Ta = –40 to +85°C
Item Symbol VCC (V) Min Typ Max Min Max Unit Test Conditions
2.0 — — 6 — 5
4.5 — — 30 — 24
Maximum clock
frequency fmax
6.0 — — 35 — 28
MHz
2.0 — — 155 — 195
4.5 — 13 31 — 39
Propagation delay
time tPLH
tPHL 6.0 — — 26 — 33
ns Clock to output
2.0 — — 150 — 190
4.5 — 13 30 — 38
Output enable
time tZH
tZL 6.0 — — 26 — 33
ns
2.0 — — 150 — 190
4.5 — 15 30 — 38
Output disable
time tHZ
tLZ 6.0 — — 26 — 33
ns
2.0 — — 100 — 125
4.5 — 1 20 — 25
Setup time tsu
6.0 — — 17 — 21
ns
2.0 5 — — 5 —
4.5 5 0 — 5 —
Hold time th
6.0 5 — — 5 —
ns
2.0 80 — — 100 —
4.5 16 4 — 20 —
Pulse width tw
6.0 14 — — 17 —
ns
2.0 — — 60 — 75
4.5 — 4 12 — 15
Output rise/fall
time tTLH
tTHL 6.0 — — 10 — 13
ns
Input capacitan ce Cin — — 5 10 — 10 pF
Test Circuit
VCC
OPEN
GND
C =
50 pF
OC
Zout = 50 Ω
1 kΩ
VCC
VCC
VCC
S1
L
TEST S1
t / t
PLH PHL OPEN
GND
t / t
ZH HZ
t / t
ZL LZ
1D to 8D
1Q to 8Q
or
1Q to 8Q
Clock
Zout = 50 Ω
Note : 1. CL includes probe and jig capacitance.
See Function Table
Pulse Generator
Output
Input
Pulse Generator
Input
HD74HC564, HD74HC574
Rev.2.00 Mar 30, 2006 page 7 of 9
Waveforms
Input Clock
0 V
tPLH
10 %
90 %
trtf
10 %
50 % 50 %
50 %
50 %
50 %
50 %
50 %
50 %
10 %
tr
90 %
10 %
tf
0 V
tPHL
VOH
VCC
VCC
VCC
VOL
Input Data
Output Q
90 %
90 %
90 %
10 %
tZL tLZ
tZH tHZ
tftr
90 %
10 %
90 %
10 %
VOH
VOL
0 V
Input OC
Waveform - A
Waveform - B
VOH
VOL
•
Waveform – 2
•
Waveform – 1
Output Q
Notes : 1.
Input waveform : PRR ≤ 1
MHz, duty cycle 50%,
tr ≤ 6 ns, tf ≤ 6 ns
2. Waveform - A is for an output with internal conditions such that the
output is low except when disabled by the output control.
3. Waveform - B is for an output with internal conditions such that the
output is high except when disabled by the output control.
4.
The output are measured one at a time with one transition per measurement.
HD74HC564, HD74HC574
Rev.2.00 Mar 30, 2006 page 8 of 9
Package Dimensions
7.62
MaxNomMin
Dimension in Millimeters
Symbol
Reference
24.50
6.30
5.08
A
1
Z
b
3
D
E
A
b
p
c
θ
e
L
e
1
0.51
0.56
1.30
0.19 0.25 0.31
2.29 2.54 2.79
0° 15°
25.40
7.00
0.40 0.48
1.27
2.54
1
p
1
3
110
20 11
e
b
A
LA
Z
e c
E
D
b
0.89
θ
( Ni/Pd/Au plating )
P-DIP20-6.3x24.5-2.54 1.26g
MASS[Typ.]
DP-20NEVPRDP0020AC-B
RENESAS CodeJEITA Package Code Previous Code
0.80
0.15
1.27
7.50 8.00
0.400.34
A
1
13.0
MaxNomMin
Dimension in Millimeters
Symbol
Reference
2.20
0.900.700.50
5.50
0.200.100.00
0.46
0.250.200.15
7.80
8°0°
0.12
1.15
12.60
L
1
Z
H
E
y
x
θ
c
b
p
A
2
E
D
b
1
c
1
e
e
L
A
20 11
10
F
*1
*2
*3
pMx
y
1
E
Index mark
D
E
H
b
Z
A
Terminal cross section
( Ni/Pd/Au plating )
p
c
b
1
1
Detail F
L
L
A
θ
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
P-SOP20-5.5x12.6-1.27 0.31g
MASS[Typ.]
FP-20DAVPRSP0020DD-B
RENESAS CodeJEITA Package Code Previous Code
HD74HC564, HD74HC574
Rev.2.00 Mar 30, 2006 page 9 of 9
0.935
0.15
1.27
10.00 10.65
0.400.34
A
1
13.2
MaxNomMin
Dimension in Millimeters
Symbol
Reference
2.65
1.270.700.40
7.50
0.300.200.10
0.46
0.300.250.20
10.40
8°0°
0.12
1.45
12.80
L
1
Z
H
E
y
x
θ
c
b
p
A
2
E
D
b
1
c
1
e
e
L
A
1120
10
F
*1
*2
*3
pMx
y
1
E
Index mark
E
H
D
Zb
A
Terminal cross section
( Ni/Pd/Au plating )
p
c
b
1
1
Detail F
L
L
A
θ
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
@ DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
@ INCLUDE TRIM OFFSET.
P-SOP20-7.5x12.8-1.27 0.52g
MASS[Typ.]
FP-20DBVPRSP0020DC-A
RENESAS CodeJEITA Package Code Previous Code
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