TPS3514NE4 - Texas Instruments High-Performance Analog

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FEATURES DESCRIPTION

PGI

GND

FPO

PSON

IS12

PGO

VDD

VS5

VS33

VS12

IS33

IS5

3.3V

12V

TPS3514

560Ω

56kΩ

R2Ω

R1Ω470kΩ1kΩ

820Ω

1.5kΩ

0.01Ω

0.01ΩIO

5V VSB

12V

3.3V

5V VSB

From Transformer

System Side Power Supply

Output Side

TPS3514

SLVS422C – JUNE 2002 – REVISED DECEMBER 2006

PC POWER-SUPPLY SUPERVISORS

•Over-Voltage Protection and

The TPS3514 is a PC switching power-supplyLockout: 12V, 5V, and 3.3V Supplies

system monitor with minimum external components.It provides under-voltage lockout (UVLO),•Over-Current Protection and

over-voltage (OV), under-voltage (UV), over-currentLockout: 12V, 5V, and 3.3V Supplies

(OC) protection circuits, power-good indicator, and•Under-Voltage Protection and

on/off control.Lockout: 12V Supplies

UVLO thresholds are 4.45V (on) and 3.65V (off).•Under-Voltage Detect: 5V and 3.3V Supplies

Over-current protection (OCP) and over-voltage•Fault-Protection Output with Open-Drain

protection (OVP) monitor 3.3V, 5V, and 12VOutput Stage

supplies. When an OC or OV condition is detected,the power-good output (PGO) is asserted low and•Open-Drain, Power-Good Output Signal:

the fault protection output ( FPO) is latched high.Monitors Power-Good Signal Input 3.3V and

PSON from low-to-high resets the latch. The OCP5V Supplies

function will be enabled 75ms after PSON goes LOW•300ms Power-Good Delay

with PGI HIGH and a debounce of typically 38ms. A•75ms Delay: 5V, 3.3V Power-Supply

built-in 2.3ms delay with 38ms debounce from PSONto FPO output is enabled at turn-off.Short-Circuit Turn-On Protection•2.3ms PSON Control To FPO Turn-Off Delay

An external resistor is connected between the RI pinand the GND pin. This will program a precise I

(REF)•38ms PSON Control Debounce

for OCP function. The programmable I

(REF)

range is•Wide Supply Voltage Range: 4.5V to 15V

from 12.5 µA to 62.5 µA. Three OCP comparators andthe I

(REF)

section are supplied by VS12. The currentdraw from the VS12 pin is less than 1mA.

The power-good feature monitors PGI, the 3.3V and5V supplies, and issues a power-good signal whenthe output is ready.

The TPS3514 is characterized for operation from–40 °C to +85 °C. The TPS3514 is available in DIP-14and SO-14 packages.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Copyright © 2002–2006, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.

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ABSOLUTE MAXIMUM RATINGS

TPS3514

SLVS422C – JUNE 2002 – REVISED DECEMBER 2006

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled withappropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may bemore susceptible to damage because very small parametric changes could cause the device not to meet its publishedspecifications.

PACKAGE/ORDERING INFORMATION

SPECIFIEDPACKAGE PACKAGE ORDERING TRANSPORTPRODUCT PACKAGE-LEAD TEMPERATUREDESIGNATOR

(1)

MARKING NUMBER MEDIA, QUANTITYRANGE

TPS3514D Rails, 50SO-14 DTPS3514 40 °C to +85 °C TPS3514 TPS3514DR Tape and Reel, 2500

DIP-14 N TPS3514N Rails, 25

(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TIweb site at www.ti.com .

over operating free-air temperature range (unless otherwise noted)

(1) (2)

UNIT

Supply Voltage, VDD 16VVoltage on PSON, IS5, IS33, PGI 8VVoltage on VS33, VS5 16VVoltage on FPO 16VVoltage on PGO 8VAll Other Pins –0.3V to 16VContinuous Total Power Dissipation See Dissipation Ratings TableOperating Free-Air Temperature Range, T

–40 °C to +85 °CStorage Temperature Range, T

stg

–65 °C to +150 °CSoldering Temperature 260 °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under Recommended OperatingConditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) All voltage values are with respect to GND.

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RECOMMENDED OPERATING CONDITIONS

DISSIPATION RATINGS TABLE

OVER-CURRENT PROTECTION

TPS3514

SLVS422C – JUNE 2002 – REVISED DECEMBER 2006

At specified temperature range.

PARAMETER MIN MAX UNIT

Supply Voltage V

4.5 15 VInputs V

PSON, VS5, VS33, IS5, IS33 7 VVS12, IS12 15 VPGI VDD + 0.3V (max = 7V) VOutputs V

FPO 15 VPGO 7 VSink Current I

O(SINK)

FPO 20 mAPGO 10 mASupply Voltage Rising Time t

(1)

1 msOCP Reference Source I

(REF)

12.5 62.5 µAOperating Free-Air Temperature Range T

–40 +85 °C

(1) V

rising and falling slew rate must be less than 14V/ms.

≤+25 °C DERATING FACTOR T

= +70 °C T

= +85 °CPACKAGE

POWER RATING ABOVE T

= +25 °C POWER RATING POWER RATING

D 956mW 7.65mW/ °C 612mW 497mWN 1512mW 12.1mW/ °C 968mW 786mW

MAX OUTPUT CURRENT OVER-CURRENT PROTECTION TRIP POINT

(1)

12V 6A 9.2A5V 16A 24.6A3.3V 9A 13.5A

(1) Over-current protection trip point can be programmable.

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ELECTRICAL CHARACTERISTICS

TPS3514

SLVS422C – JUNE 2002 – REVISED DECEMBER 2006

Limits apply over operating free-air temperature range, T

= –40 °C to +85 °C, unless otherwise noted.

TPS3514

PARAMETER CONDITIONS MIN TYP MAX UNIT

OVER-VOLTAGE AND OVER-CURRENT PROTECTION

Over-Voltage ThresholdVS33 3.7 3.9 4.1 VVS5 5.7 6.1 6.5 VVS12 13.2 13.8 14.4 VRatio of Current Sense Sink

Resistor at RI = 30k Ω, 0.1%Current to Current Sense Setting C 7.6 8 8.4ResistorPin (RI) Source Current, I

(REF)

Leakage Current ( FPO) I

lkg

(FPO)

= 5V 5 µALow-Level Output Voltage ( FPO) V

(SINK)

= 20mA, V

= 5V 0.7 VNoise Deglitch Time (OVP) V

= 5V 35 73 110 µsCurrent Source Reference

(RI)

= 5V 1.1 1.15 1.2 VVoltage

UNDER-VOLTAGE LOCKOUT

Start Threshold Voltage 4.45 VMinimum Operating Voltage After Start-Up 3.65 V

PGI AND PGO

Input Threshold V

IT(PGI)

0.9 x typ 1.15 1.01 x typ VUnder-Voltage ThresholdVS33 2 2.2 2.4 VVS5 3.3 3.5 3.7 VVS12 8.5 9 9.5 VInput Offset Voltage for OCP Comparators 5 mVLeakage Current (PGO) l

lkg

PGO = 5V 5 µALow-Level Output Voltage (PGO) V

(SINK)

= 10mA, V

= 4.5V 0.4 VShort-Circuit Protection Delay 3.3V, 5V 49 75 114 msDelay Time t

(d)(1)

PGI to PGO V

= 5V 200 300 450 msPGI to FPO V

= 5V 3.2 4.8 7.2 msNoise Deglitch TimePGI to PGO V

= 5V 88 150 225 µs12V UVP to FPO V

= 5V 88 150 225 µs

PSON CONTROL

Input Pull-Up Current I

PSON = 0V –120 µAHigh-Level Input Voltage V

2.4 VLow-Level Input Voltage V

1.2 VDebounce Time ( PSON) t

(b)

= 5V 24 38 50 msDelay Time ( PSON to FPO) t

(d)(2)

= 5V t

+ 1.1 t

+ 2.3 t

+ 4 ms

TOTAL DEVICE

Supply Current I

PSON = 5V 1 mA

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PIN CONFIGURATION

Top View SO, DIP

TPS3514

SLVS422C – JUNE 2002 – REVISED DECEMBER 2006

PIN ASSIGNMENTSPIN NAME FUNCTION

3 FPO Inverted Fault Ptotection output. Open-drain output stage.

2 GND Ground

5 IS12 12V Over-Current Protection Input

8 IS5 5V Over-Current Protection Input

9 IS33 3.3V Over-Current Protection Input

7 NC No Internal Connection

1 PGI Power-Good Input

14 PGO Power-Good Output. Open-drain output stage.

4 PSON On/Off Control Input

6 RI OCP Reference Source

13 V

Supply Voltage

10 VS12 12V Over-Voltage/Under-Voltage Protection Input

11 VS33 3.3V Over-Voltage/Under-Voltage Protection Input

12 VS5 5V Over-Voltage/Under-Voltage Protection Input

FUNCTION TABLE

(1)

UV CONDITION UV CONDITION 12VPGI PSON OV CONDITIONS

FPO

(2)

PGO

(3)3.3V/5V OC CONDITIONS

< 0.9V L No No No L L

< 0.9V L No No Yes L L

< 0.9V L No Yes No H L

< 0.9V L No Yes Yes H L

< 0.9V L Yes No No L L

< 0.9V L Yes No Yes L L

< 0.9V L Yes Yes No H L

< 0.9V L Yes Yes Yes H L

> 1.2V L No No No L H

> 1.2V L No No Yes H L

> 1.2V L No Yes No H L

> 1.2V L No Yes Yes H L

> 1.2V L Yes No No H L

> 1.2V L Yes No Yes H L

> 1.2V L Yes Yes No H L

> 1.2V L Yes Yes Yes H L

x H x x x H L

(1) x = Don’t Care.(2) For FPO, L = Fault is not latched. H = Fault is latched.(3) For PGO, L = Fault. H = No Fault.

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TIMING DIAGRAMS

38ms

PSON

300ms

PSON Off

PGO Off

2.3ms 300ms

OVP

Occurs

38ms 300ms

VDD

(SB5V)

PSON

PFO

PGI

3.3V/5V

12V

PGO

OCP Occurs

300ms

3.3V or 5V Drop

300ms

38ms

300ms

12V UVP

Occurs

38ms

300ms

VDD

PSON

FPO

PGI

3.3V/5V

12V

PGO

TPS3514

SLVS422C – JUNE 2002 – REVISED DECEMBER 2006

Figure 1. AC Turn-On and Over-Voltage Protect

Figure 2. Over-Current and Under-Voltage Detect/Protect

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SCHEMATIC

+73µs

Debounce

POR

2.3ms

Delay

75ms

Delay

38ms

Debounce

VDD

150µs

Debounce 300ms

Delay

VDD

Band-Gap

Reference

1.153V

12V OV

5V OV

3.3V OV

3.3V UV

5V UV

PGI1

12V UV

Iref x 8

VS12

VDD

VS5

VS33

PGI

IS12

IS5

IS33

FPO

PSON

PGO

UVLO

150µs

Debounce

I(REF) OCP Reference Source

TPS3514

SLVS422C – JUNE 2002 – REVISED DECEMBER 2006

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TYPICAL CHARACTERISTICS

TPS3514

SLVS422C – JUNE 2002 – REVISED DECEMBER 2006

= +25 °C, unless otherwise noted.

SUPPLY CURRENT INPUT CURRENT ( PSON)vs vsSUPPLY VOLTAGE INPUT VOLTAGE ( PSON)

LOW-LEVEL OUTPUT VOLTAGE ( FPO) LOW-LEVEL OUTPUT VOLTAGE ( FPO)vs vsLOW-LEVEL OUTPUT CURRENT ( FPO) LOW-LEVEL OUTPUT CURRENT ( FPO)

LOW-LEVEL OUTPUT VOLTAGE ( PGO) LOW-LEVEL OUTPUT VOLTAGE ( PGO)vs vsLOW-LEVEL OUTPUT CURRENT ( PGO) LOW-LEVEL OUTPUT CURRENT ( PGO)

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DETAILED DESCRIPTION

Power-Good and Power-Good Delay

t5t4

5V/3.3V

Output

PSON

PGO

Off

75%

10%

TPS3514

SLVS422C – JUNE 2002 – REVISED DECEMBER 2006

TYPICAL CHARACTERISTICS (continued)T

= +25 °C, unless otherwise noted.

NORMALIZED SENSE THRESHOLD VOLTAGE CURRENT RATIOvs vsFREE-AIR TEMPERATURE AT V

FREE-AIR TEMPERATURE

Although there is no requirement to meet specifictiming parameters, the following signal timings arerecommended:A PC power supply is commonly designed to providea power-good signal, which is defined by the

2ms ≤t

≤20ms, 100ms < t

< 2000ms, t

>computer manufacturers. Power-Good Output (PGO)

1ms, t

≤10msis a power-good indicator and should be asserted

Furthermore, motherboards should be designed tohigh by the PC power supply to indicate that the

comply with the above recommended timing. If5VDC and 3.3VDC outputs are above the

timings other than these are implemented orunder-voltage threshold limit. At this time, the supply

required, this information should be clearly specified.should be able to provide enough power to assurecontinuous operation within the specification.

The TPS3514 family of power-supply supervisorsprovides a PGO for the 3.3V and 5V supply voltageConversely, when either the 5VDC or the 3.3VDC

rails and a separate Power-Good Input (PGI). Anoutput voltages fall below the under-voltage

internal timer is used to generate a 300msthreshold, or when main power has been removed

power-good delay.for a sufficiently long time so that power-supplyoperation is no longer assured, PGO should bedeasserted to a low state. The power-good, DCenable ( PSON), and the 5V/3.3V supply rails areshown in Figure 3 .

Figure 3. Timing of PSON and PGO

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Over-Current Protection (OCP)

Power-Supply Remote On/Off ( PSON) And

Over-Voltage Protection (OVP)

Under-Voltage Protection (UVP)

TPS3514

SLVS422C – JUNE 2002 – REVISED DECEMBER 2006

If the voltage signals at PGI, VS33, and VS5 riseabove the under-voltage threshold, the open-drain

In bridge, or forward type, off-line switching powerPGO will go high after a delay of 300ms. When the

supplies, usually designed for medium to largePGI voltage or any of the 3.3V/5V rail drops below

power, the overload protection design needs to bethe under-voltage threshold, PGO will be disabled

very precise. Most of these types of power suppliesimmediately.

sense the output current for an overload condition.The trigger-point needs to be set higher than themaximum load in order to prevent false turn-on.Fault Protect Output ( FPO)

The TPS3514 provides Over-Current ProtectionSince the latest personal computer generation

(OCP) for the 3.3V, 5V, and 12V rails. When anfocuses on easy turn-on and power-saving functions,

over-current condition appears at the OCPthe PC power supply will require two characteristics.

comparator input pins for more than 73 µs, the FPOOne is a DC power-supply remote on/off function;

output goes high and PGO goes low. Also, this faultthe other is standby voltage to achieve very low

condition will be latched until PSON is toggled frompower consumption of the PC system. Thus,

low to high or V

is removed.requiring the main power supply to be shut down.

The resistor connected between the RI pin and theThe power-supply remote on/off ( PSON) is an

GND pin will create a precise I

(REF)

for the OCPactive-low signal that turns on all of the main power

function. The formula for choosing the RI resistor israils including the 3.3V, 5V, –5V, and –12V power

(RI)

(REF)

. The I

(REF)

range is from 12.5 µA to 62.5 µA.rails. When this signal is held high by the PC

Three OCP comparators and the I

(REF)

section aremotherboard or left open-circuited, the signal of the

supplied through the V12 pin. Current drawn fromFault Protect Output ( FPO) also goes high. In this

the VS12 pin is less than 1mA.condition, the main power rails should not delivercurrent and should be held at 0V. Following is an example on calculating OCP for the12V rail:When the FPO signal is held high due to an

RI = V

(RI)

(REF)

= 1.15V/20 µA = 56k Ωoccurring fault condition, the fault status will be

(REF)

•C•R

(IS12)

= R

(SENSE)

⋅I

(OCP_TRIP)latched and the outputs of the main power railsshould not deliver current and should be held at 0V.

(OCP_TRIP)

= 20 µA•8•560 Ω/0.01 Ω= 9.2AToggling PSON from low to high will reset the fault

C = Current Ratio (typically = 8)protection latch. During this fault condition, only thestandby power is not affected.

When PSON goes from high to low or low to high,

The Over-Voltage Protection (OVP) of the TPS3514the 38ms debounce block will prevent a glitch on the

monitors 3.3V, 5V, and 12V. When an over-voltageinput from disabling/enabling the FPO output. During

condition appears at one of the 3.3V, 5V, or 12Vthe HIGH to LOW transition, the under-voltage

input pins for more than 73 µs, the FPO output goesfunction is disabled to prevent turn-on failure.

high and PGO goes low. Also, this fault condition willbe latched until PSON is toggled from low-to-high orPower should be delivered to the rails only if the

is removed.PSON signal is held at ground potential, thus, FPO isactive low. The FPO pin can be connected to 5VDC

During fault conditions, most power supplies have(or up to 15VDC) through a pull-up resistor.

the potential to deliver higher output voltages thanthose normally specified or required. In unprotectedequipment, it is possible for output voltages to behigh enough to cause internal or external damage ofThe TPS3514 provides Under-Voltage Protection

the system. To protect the system under these(UVP) for the 12V rail and Under-Voltage Detect

abnormal conditions, it is common practice to provide(UVD) for the 3.3V and 5V rails. When an

over-voltage protection within the power supply.under-voltage condition appears at the VS12 inputpin for more than 150 µs, the FPO output goes highand PGO goes low. Also, this fault condition will belatched until PSON is toggled from low to high or V

DDis removed.

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PACKAGING INFORMATION

Orderable Device Status (1) Package

Type Package

Drawing Pins Package

Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)

TPS3514D ACTIVE SOIC D 14 50 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS3514DG4 ACTIVE SOIC D 14 50 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS3514DR ACTIVE SOIC D 14 2500 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS3514DRG4 ACTIVE SOIC D 14 2500 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS3514N ACTIVE PDIP N 14 25 Pb-Free

(RoHS) CU NIPDAU N / A for Pkg Type

TPS3514NE4 ACTIVE PDIP N 14 25 Pb-Free

(RoHS) CU NIPDAU N / A for Pkg Type

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS

compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

PACKAGE OPTION ADDENDUM

www.ti.com 29-Nov-2006

Addendum-Page 1

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

A0 (mm) B0 (mm) K0 (mm) P1

(mm) W

(mm) Pin1

Quadrant

TPS3514DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 19-Mar-2008

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

TPS3514DR SOIC D 14 2500 333.2 345.9 28.6

PACKAGE MATERIALS INFORMATION

www.ti.com 19-Mar-2008

Pack Materials-Page 2

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