EN pin dimming:
serial pulse train input
VEN
IOUT
PWM pin dimming:
digital PWM input
IOUT
VPWM
IOUT
VAPWM
APWM pin dimming:
analog PWM input
FSET
COMP
ISET
RISET
RFSET
APWM
LED1
LED3 LED5 LED7 LGND
SKIP
CC
VIN SW SW OVP
COUT
VIN
ROVP
D1
VIN
5 V ±10%
VBAT
5 to 25 V
CBAT
1 F/ 25 V
CIN
0.1 F/ 10 V
2.2 F
50 V
L1
10 H
A8500
LED8 LED6 LED4
LED2
SEL1
SEL2
SEL3
EN
PWM AGND
PGND
Approximate Scale 1:1
Typical Application
Description
The A8500 is a multi-output WLED driver for medium display
backlighting. The A8500 integrates a boost converter and eight
current-sinks to provide a flexible WLED/RGB backlight
driver. The boost converter can provide output voltage up to
47 V. The flexible channel selection control and high voltage
capability allow a wide range of LED backlight applications.
The A8500 can support any application requiring 4 to 96
WLEDs. The boost converter is a constant frequency current-
mode converter.
Each LED channel can sink 25 mA, and channels can be
paralleled for higher currents. Flexible dimming allows output
channels to either run at an adjustable DC value or with
externally controlled PWM duty cycles.
The A8500 is available in a 26 pin, 4 mm × 4 mm QFN/MLP
package that is only 0.75 mm nominal in height. Applications
include:
Thin notebook displays
LCD TV
RGB backlight
GPS systems
Portable DVD players
8500P-DS
Features and Benefits
Active current sharing between LED strings for ±1.5%
typical current matching and ±1.2% typical accuracy
Drive up to 12 series × 8 parallel = 96 LEDs
(Vf = 3.2 V, If = 20 mA)
Flexible dimming, using alternative methods:
LED duty cycle control (PWM pin)
DC current using serial programming (EN pin)
DC current using external PWM signal (APWM pin)
An external resistor
Boost converter with integrated 50 V, 2 A DMOS
LED sinks rated for 25 mA
200 kHz to 2 MHz switching frequency
Open LED disconnect
Boost current limit, thermal shutdown, and soft start
No audible ceramic capacitor noise during PWM dimming
Adjustable overvoltage protection (OVP)
No pull-up resistors required for LED modules that use
ESD capacitors
Flexible WLED/RGB Backlight Driver for Medium Size LCDs
Package: 26 pin QFN/MLP (suffix EC)
A8500
Figure 1. LCD monitor backlight, driving 96 LEDs. LED Vf = 3.2 V, 20 mA per LED string. Overvoltage
protection set to 45 V nominal (40.5 V minimum). Alternative dimming control pulse trains illustrated
for EN, PWM, and APWM control. See also: Recommended Components table, page 14.
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
2
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Selection Guide
Part Number Ambient Temperature, TAPackage Packing*
A8500EECTR-T –40 to 85 4 mm × 4 mm
QFN/MLP 1500 pieces / 7-in. reel
A8500GECTR-T –40 to 105
*Contact Allegro for additional packing options
Absolute Maximum Ratings
Characteristic Symbol Notes Rating Units
SW and OVP Pins –0.3 to 50 V
LED1 through LED8 Pins –0.3 to 23 V
VIN Pin VIN –0.3 to 6 V
Remaining Pins –0.3 to VIN+ 0.3 V
Operating Ambient Temperature TA
Range E –40 to 85 ºC
Range G –40 to 105 ºC
Maximum Junction Temperature TJ(max) 150 ºC
Storage Temperature Tstg –55 to 150 ºC
Package Thermal Characteristics*
Characteristic Symbol Note Rating Units
Package Thermal Resistance RJA Measured on 3 in. × 3 in., 2-layer PCB 48.5 °C/W
*Additional information is available on the Allegro website
Device package is lead (Pb) free, with 100% matte tin leadframe plating.
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
3
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
LGND PGND
COMP
CC
CIN
ISET
APWM
LED1
Current Sinks
PGND
LED3
LED5
LED7
LGND
SKIP
FSET
RFSET
RISET
VIN
L1
10 H
SW
CBAT SW
OVP
ROVP
VOUT
D1
COUT
VIN
5 V ±10%
VBAT
5 to 25 V
LED8
LED6
LED4
LED2
SEL1
SEL2
SEL3
PWM
OSC
100 k
EN
100 k
100 k
100 k
AGND
+
+
+
Q
S
R
Reference
and
Soft Start
On/Off
Serial Interface
PWM Generator
IOUT_SET
Amp
Feedback
Loop
Functional Block Diagram
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
4
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
ELECTRICAL CHARACTERISTICS, valid at TA = –40°C to 85°C, typical values at TA = 25°C, VIN = 5 V, unless otherwise noted
Characteristics Symbol Test Conditions Min. Typ. Max. Units
Input Voltage Range VIN 4.2 5.5 V
Undervoltage Lockout Threshold VUVLO VIN falling 4 V
UVLO Hysteresis Window VUVLOhys 0.2 V
Supply Current ISUP
Switching at no load 5 mA
Shutdown EN = PWM = APWM = VIL, TA = 25°C 0.1 1 A
APWM Frequency Range fAPWM 20 2000 kHz
Error Amplifier
Error Amplifier Open Loop Gain AVEA –60– dB
Error Amplifier Unity Gain Bandwidth UGBEA –3–MHz
Error Amplifier Transconductance GmEA ICOMP = ±10 A 850 A/V
Error Amplifier Output Sink Current IEAsink VLED1-8 = 1 V 280 A
Error Amplifier Output Source Current IEAsource VLED1-8 = 0 V –280 A
Boost Controller
Switching Frequency fSW
RFSET = 13 k, SKIP = VIL1.8 2 2.2 MHz
RFSET = 26.1 k, SKIP = VIL–1–MHz
RFSET = 32.4 k, SKIP = VIH 200 kHz
Minimum Switch Off-Time tOFFmin –70– ns
Logic Input Levels (APWM , EN, MODE, PWM, SELx, and SKIP pins unless otherwise specified)
Input Voltage Level Low VIL 0.4 V
Input Voltage Level High VIH 1.5 V
Input Leakage Current (APWM, EN,
PWM, and SKIP pins) IIleak VI(pin) = 5 V, TA = 25°C 100 A
Input Leakage Current (SELx pins) ISELleak ––1 A
Over Voltage Protection (OVP)
Output Overvoltage Rising Limit VOVP ROVP = 0 28 34 V
OVP Sense Current IOVPH 54.9 A
OVP Release Current IOVPL 47.8 A
OVP Leakage Current IOVPleak VVOP = 21 V 0.1 A
Boost Switch
Switch On Resistance Rds(on) ISW = 1.5 A 225 m
Switch Leakage Current ISWleak
VSW = 5 V, TA = 25°C 1 A
VSW = 21 V 1 A
Switch Current Limit ISWlim 1.8 2 A
Continued on the next page…
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
5
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
LED Current Sinks
LEDx Regulation Voltage VLEDx 500 mV
ISET to ILEDx Current Gain AISET ISET = 100 A 210
Voltage on ISET Pin VISET 1.23 V
ISET Allowable Current Range ISET 40 120 A
LEDx Accuracy ErrLEDx
RISET = 12 k; 100% current ratio,
measured as average of LED1 to LED8;
LED1 to LED8 = 0.5 V
±1.2 %
LEDx Matching LEDxISET = 100 A , 100% current ratio;
LED1 to LED8 = 0.5 V ±1.5 %
LEDx Switch Leakage Current ILSleak5 VLEDx= 5 V, EN = PWM = APWM = 0, TA = 25°C 1 A
LEDx Switch Leakage Current ILSleak21 VLEDx= 21 V, EN = PWM = APWM=0 1 A
Serial Pulse Timing (see figure 4 for further explanation)
EN Pulse Low Time tLO 0.5 100 s
EN Pulse High Time tHI 0.5 100 s
Initial EN or APWM Pulse High Time (rela-
tive to switching period) tHI(init)
First EN or APWM pulse after
shutdown
SKIP = Low 256 Switching
Pulses
SKIP = High 64 Switching
Pulses
Level Change Delay (relative to switching
period) tHID
SKIP = Low 256 Switching
Pulses
SKIP = High 64 Switching
Pulses
Shutdown Delay (relative to switching
period on EN or APWM) tSHDN
Falling edge of EN or APWM
pulse
SKIP = Low 256 Switching
Pulses
SKIP = High 64 Switching
Pulses
Soft Start
Soft Start Boost Current Limit ISWSS Initial soft start current for boost switch - 1 - A
Soft Start LEDx Current Limit ILEDSS
Current through enabled LEDx pins during soft
start, RISET=12 k- 1.25 - mA
Thermal Shutdown Threshold TSHDN 40°C hysteresis 165 °C
ELECTRICAL CHARACTERISTICS (continued), valid at TA = –40°C to 85°C, typical values at TA = 25°C, VIN = 5 V, unless
otherwise noted
Characteristics Symbol Test Conditions Min. Typ. Max. Units
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
6
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
V
BAT
(V)
5
8.5
17.6
I
LED
(mA)
1
10
20
95
90
85
80
75
70
95
90
85
80
75
70
0 20406080100
Eff (%)
Duty Cycle (%)
95
90
85
80
75
70
65
4.5 4.7 4.9 5.1 5.3 5.5
Eff (%)
V
IN
(%)
V
BAT
(V)
5
8.5
17.6
100
90
80
70
60
50
40
30
0 20406080100
Eff (%)
Duty Cycle (%)
V
BAT
(V)
5
8.5
17.6
100
90
80
70
60
50
40
30
0 20406080100
Eff (%)
Duty Cycle (%)
V
BAT
(V)
5
8.5
17.6
0 20406080100
Eff (%)
Duty Cycle (%)
APWM Efficiency
VIN
= 5 V, 6 ch. with 7 LEDs per ch., 20 mA per ch., fSW = 1 MHz
APWM Efficiency
VIN
= 5 V, 6 ch. with 7 LEDs per ch., 20 mA per ch., fSW = 2 MHz
Efficiency versus Input Voltage with EN Dimming
VIN
= VBAT, 8 ch. with 8 LEDs per ch., fSW = 1 MHz
Performance Characteristics
Efficiency with EN dimming is similar to that with APWM dimming. APWM light load
efficiency can be improved by reducing boost switching frequency with SKIP set high.
PWM Efficiency
VIN
= 5 V, 6 ch. with 7 LEDs per ch., 20 mA per ch., fSW = 1 MHz
PWM Efficiency
VIN
= 5 V, 6 ch. with 7 LEDs per ch., 20 mA per ch., fSW = 2 MHz
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
7
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
EN Pin Turn On
VIN
= VBAT
= 5 V; 8 ch., 8 LEDs per ch.
EN Pin Turn Off
VIN
= VBAT
= 5 V; 8 ch., 8 LEDs per ch.
Performance Characteristics
Symbol Parameter Units/Division
C1 EN 5 V
C2 IOUT 100 mA
C3 VOUT 10 V
C4 IIN 1 A
t time 500 s
EN
C3
C1
C2
C4
IOUT
VOUT
IIN
Symbol Parameter Units/Division
C1 EN 5 V
C2 IOUT 100 mA
C3 VOUT 10 V
C4 IIN 1 A
t time 100 s
EN
C3
C1
C2
C4
IOUT
VOUT
IIN
PWM Turn On at 50% Duty Cycle
VIN
= VBAT
= 5 V; 8 ch., 8 LEDs per ch.
PWM Turn On at 5% Duty Cycle
VIN
= VBAT
= 5 V; 8 ch., 8 LEDs per ch.
Symbol Parameter Units/Division
C1 PWM 5 V
C2 IOUT 100 mA
C3 VOUT 10 V
C4 IIN 1 A
t time 5 ms
PWM
C3
C1
C2
C4
IOUT
VOUT
IIN
Symbol Parameter Units/Division
C1 PWM 5 V
C2 IOUT 100 mA
C3 VOUT 10 V
C4 IIN 1 A
t time 10 ms
PWM
C3
C1
C2
C4
IOUT
VOUT
IIN
APWM Turn On at 50% Duty Cycle
FAPWM=100 kHz
Symbol Parameter Units/Division
C1 APWM 5 V
C2 IOUT 100 mA
C3 VOUT 10 V
C4 IIN 1 A
t time 200 s
APWM
C3
C1
C2
C4
IOUT
VOUT
IIN
t t
t t
t
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
8
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
The A8500 is a multioutput WLED driver for medium display
backlighting. The A8500 works with 4.2 to 5.5 V input supply,
and it has an integrated boost converter to boost a 5 V battery
voltage up to 47 V, to drive up to 12 WLEDs in 6 series (Vf =
3.2 V, If = 20 mA), or 8 WLEDs in 8 series at 20 mA per LED
string. For higher LED power or more LEDs, an inductor can be
connected to a separate power supply, VBAT
, from 5 to 25 V, with
the A8500 IC powered from a 5 V source. The LED sinks can
sink up to a 25 mA current.
The boost converter is a constant frequency current-mode con-
verter. The integrated boost DMOS switch is rated for 50 V at
2 A. This switch has pulse-by-pulse current limiting, with the cur-
rent limit independent of duty cycle. The switch also has output
overvoltage protection (OVP), with the OVP level adjustable,
typically from 30 to 47 V, as described in the Device Internal
Protection section.
The A8500 has individual open LED detection. If any LED
opens, the corresponding LED pin is removed from regulation
logic. This allows the remaining LED strings to function nor-
mally, without excessive power dissipation.
The switching frequency, fSW, can be set from 600 kHz to 2 MHz
by a single resistor, RFSET, connected across the FSET and
AGND pins, and with the SKIP pin set to logic low (see figure 2).
The switching frequency is set as:
fSW = 26.03 / RFSET ,
where fSW is in MHz and RFSET is in kΩ When the SKIP pin is
connected to logic low, switching frequency is as set by RFSET.
When the SKIP pin is connected to logic high, the switching
frequency is divided by 4. The SKIP pin can be used to reduce
switching frequency in order to reduce switching losses and
improve efficiency at light loads.
The IC offers a wide-bandwidth transconductance amplifier with
external COMP pin. External compensation offers optimum per-
formance for the desired application.
The A8500 has eight well-matched current sinks to provide regu-
lated current through LEDs for uniform display brightness. The
quantity of LEDx pins used is determined by the SELx pins. Refer
to table 1 for further description.
The boost converter is controlled such that the minimum voltage
on any LEDx pin is 500 mV. In a typical application, the LEDx
pin connected to the LED string with the maximum voltage drop
controls the boost loop, so the remaining pins will also have the
higher voltage drop. All LED sinks are rated for 21 V, to allow
PWM dimming control.
LED Current Setting
The maximum LED current can be set at up to 25 mA per chan-
nel, by using the ISET pin. To set the reference current, ISET
,
connect a resistor, RISET, between this pin and ground, valued
according to the following formula:
ISET = 1.23 / RISET ,
where ISET is in mA and RISET is in kΩ.
Functional Description
Table 1. LEDx Channel Enable Table
SEL1 SEL2 SEL3 LEDx Outputs
0 0 0 Only LED1 on
1 0 0 LED1 through LED2 on
0 1 0 LED1 through LED3 on
1 1 0 LED1 through LED4 on
0 0 1 LED1 through LED5 on
1 0 1 LED1 through LED6 on
0 1 1 LED1 through LED7 on
1 1 1 LED1 through LED8 on
2.5
2.0
1.5
1.0
0.5
0
010 20304050 60 70
RFSET (k)
fSW (MHz)
Figure 2. Switching frequency setting by value of RFSET.
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
9
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
This current is multiplied internally with a gain of 210, and then
mirrored on all enabled LEDx pins. This sets the maximum cur-
rent through the LEDs, referred to as “100% current.” The effects
of the value of RISET are shown in figure 3.
The LED current can be reduced from 100% by any of three
alternative methods. These modes are:
serial dimming through the EN pin,
on/off control (PWM) with an external PWM signal on the
PWM pin, and
analog dimming with an external PWM signal on the APWM pin .
Note: Only one dimming technique can be used at a time.
Serial Dimming Through the EN Pin. When the EN pin is pulled
high with PWM, and the APWM pin is low, the A8500 starts
up in serial programming mode. In this mode, series of pulses
applied to the EN pin are used to adjust the output current level,
ILEDx, to a proportion of the ISET current, in equal increments, as
listed in table 2.
As shown in the timing diagram in figure 4, serial dimming is
disabled during startup, for the tHI(init) period. After that, the
A8500 begins evaluating pulse patterns applied on the EN pin.
Until a valid series is evaluated, the count remains 0 and the
default ILEDx level remains at “100% current.” A count in the
range 1 to 15 is evaluated proportionately; for example, when
a series of 12 pulses is evaluated, ILEDx is set to 25% (100% ×
4/16) of 100% current. At a 16th pulse, the counter resets to 0 and
continues to count if additional pulses are applied.
I
LEDX
EN
Pulses 01234 123
100% as set by R
ISET
75% 81.2%
t
HI
t
LO
tHI(init)
tSHDN
Shutdown
100%
×1/16 level
Dimming
Counter
Reset
Dimming
Counter
Reset
Dimming
Counter
Reset
t
HID
t
HID
Figure 3. Effect of value of RISET on (A) “100% current” level, and
(B) LEDx gain.
25
20
15
10
5
0
010 20304050 60 70
RISET (k)
IOUT (mA)
212
211
210
209
208
207
206
205
204
203
202
010 20304050 60 70
RISET (k)
VIN (V)
4.5
5.0
5.5
Gain
Table 2. Serial Dimming Levels
Pulse Count ILEDx Pulse Count ILEDx
0 100% 8 100%×8/16
1 100%×15/16 9 100%×7/16
2 100%×14/16 10 100%×6/16
3 100%×13/16 11 100%×5/16
4 100%×12/16 12 100%×4/16
5 100%×11/16 13 100%×3/16
6 100%×10/16 14 100%×2/16
7 100%× 9/16 15 100%×1/16
16* 100%
*The counter resets on the sixteenth pulse.
Figure 4. Timing diagram for serial dimming.
(A)
(B)
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
10
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Figure 5. Serial dimming response. The numbers indicate the
quantity of EN pulses at each step.
Shutdown (0 μA)
PWM
ILEDx
6μs
100% Current level
Figure 6. Timing diagram for dimming using the PWM pin.
Symbol Parameter Units/Division
C1 VOUT 5.00 V
C2 IOUT 100 mA
C3 VPWM 1.00 V
t time 1.00 ms
t
C1
C2
VPWM
VOUT
C3
IOUT
180
160
140
120
100
80
60
40
20
0
0 20406080
fPWM (Hz)
100
Duty Cycle (%)
IOUT (mA)
100
500
Figure 8. PWM pin dimming linearity.
To indicate the end of a programming sequence, set the EN pin
high for a period, tHID, which is either (a) greater than 256 oscil-
lator periods when the SKIP pin is high, or (b) greater than 64
oscillator periods when SKIP is low. When the A8500 evaluates
the end of a programming sequence, it changes the current level
to match the existing count (per table 2). The counter is then reset
to 0 and begins counting pulses again at the next valid pulse.
If the EN pin, along with the PWM and APWM pins, is pulled
low for period greater than tSHDN, the A8500 shuts down. When
the IC enters shutdown, LED1 through LED8 and the boost
switch turn off after the tSHDN period. During tSHDN , the con-
verter continues to work in normal fashion.
When enabled through the EN pin, internal references ramp up
during the tHI(init) period. The boost converter starts with soft
start to limit input inrush current. During soft start, the boost
stage is peak current limited to 1 A. All enabled LEDx sinks are
set to 1/16 of the set 100% current level, as VOUT and the volt-
age on the LEDx pins increases. When all LEDx pins reach the
regulation level of 0.5 V, the IC comes out of soft start, resuming
normal operation with 2 A current limit on boost and 100% cur-
rent through LEDx pins. A typical step response in steady state is
shown in figure 5.
On/off Control (PWM) with an External PWM Signal on the
PWM Pin. When the PWM pin is pulled high with the EN and
APWM pins low, the A8500 turns on and all enabled LEDx pins
sink 100% current. When the PWM pin is pulled low, the IC
shuts down with the LEDx pins disabled. External PWM applied
to the PWM pin should be in the range of 100 to 400 Hz for
optimal accuracy.
IOUT
EN
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 151
Figure 7. PWM pin dimming fPWM = 200 Hz, Duty Cycle =10%.
Waveform is captured with AC coupling. DC value is zero.
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
11
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
At startup, the output capacitor is discharged and the IC enters
soft start. The boost current is limited to 1 A, and all active LEDx
pins sink 1/16 of the set 100% current until all of the enabled
LEDx pins reach 0.5 V. After the IC comes out of soft start, the
boost current and the LEDx pin currents are set to 100% current.
The output capacitor charges to the voltage level required to sup-
ply full LEDx current within a few cycles. The IC is shut down
immediately when PWM goes low.
Analog Dimming with an External PWM Signal on the APWM
Pin. When the APWM pin is pulled high, with the EN and PWM
pins low, the A8500 turns on in this mode. The first pulse after
shutdown should be greater than tHI(init). The logic level PWM
signal applied to the APWM pin multiplies ISET by the duty cycle
to set the reference current level for the LED pins. The typical
range for the APWM signal frequency is 20 kHz to 2 MHz. The
output current ripple at 20 kHz, 50% duty cycle, is less than 5%
of the set value. The LED current accuaracy at 2 MHz, 50% duty
cycle, is less than 3%. In this mode, the A8500 goes through a
soft start routine similar to serial dimming.
Device Internal Protection
Overcurrent Protection (OCP). The A8500 has a pulse-by-pulse
current limit of 2 A on the boost switch. This current limit is
independent of duty cycle.
Thermal Shutdown Protection (TSD). The IC shuts down when
junction temperature exceeds 165°C and restarts when the junc-
tion temperature falls by 40°C.
Overvoltage Protection (OVP). The A8500 has overvoltage
protection to protect the IC against output overvoltage. The over-
voltage level can be set, from 30 to 45 V typical, with an external
resistor, ROVP, as shown in figure 10. When the current though
the OVP pin exceeds 54.9 μA, the OVP comparator goes high.
When the OVP pin current falls below 47.8 μA, OVP is reset.
180
160
140
120
100
80
60
40
20
0
0 20406080
fAPWM (kHz)
100
Duty Cycle (%)
IOUT (mA)
20
100
500
Figure 9. APWM pin dimming linearity. Figure 10. Overvoltage protection circuit. Three alternative
configurations at (A) are available, as follows:
External Component OVP Rating
ROVP only up to 45 V
DZ only up to 47 V
both ROVP and DZ redundancy
1.23 V
28.8 V
22 k
SW SW
OVP
ROVP DZ
D1 VOUT
VIN
COUT
OVP
Disable
+
4.4 k
A
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
12
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Calculate the value for ROVP as follows:
ROVP = (VOVP – 30) / 54.9 μA ,
where VOVP is the desired typical OVP level in V, and ROVP is
in Ω. For tighter OVP limits, a low–leakage-current Zener diode,
DZ, can be used, instead of ROVP, to set OVP at up to 47 V. For
redundancy, DZ can be connected across ROVP to provide addi-
tional protection, if ROVP should open. Select a 17 V low-leak-
age Zener diode for DZ.
Open LED Protection. The A8500 has protection against open
LEDs. If any enabled LED string opens, voltage on the corre-
sponding LEDx pin goes to zero. The boost loop operates in open
loop till the OVP level is reached. The A8500 identifies the open
LED string when overvoltage on the OVP pin is detected. This
string is then removed from the boost controlling loop. The boost
circuit is then controlled in the normal manner, and the output
voltage is regulated, to provide the output required to drive the
remaining strings. If the open LED string is reconnected, it will
sink current up to the programmed current level.
Note: Open strings are removed from boost regulation, but not
disabled. This keeps the string in operation if LEDs open for only
a short length of time, or reach OVP level on a transient event.
The disconnected string can be restored to normal mode by re-
enabling the IC. It can also restored to normal operation if the
fault signal is removed from the corresponding LEDx pin, but an
OVP event occurs on any other LEDx pin.
Figure 11. Open LED fault protection.
VOUT
IIN
IOUT
VOUT
IIN
IOUT
LED string
opens
Overvoltage
detected,
OVP begins
Normal operation
resumes with open
LED string removed
from control loop
Symbol Parameter Units/Division
C1 IOUT 50 mA
C2 VOUT 10 V
C3 IIN 500 mA
t time 200 s
t
C1
C2
C3
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
13
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
EN
PWM
FSET
COMP
ISET
RISET
RFSET
RA
VA
CC
LED1
LED3 LED5 LED7 LGND
VIN SW SW OVP
COUTROVP
VIN
5 V ±10%
A8500
LED8 LED6 LED4
LED2
SKIP
APWM
VIN
SEL1
SEL2
SEL3
AGND
PGND
Application Information
Figure 12. Typical application circuit for PWM dimming, using digital PWM (on the
PWM pin, with APWM high).
RISET
Q1
ISET
RISETP
Figure 13. Configuration for 1000:1 dimming.
100
95
90
85
80
75
0.1 1.0 10.0 100.0
Dimming Level (%)
Accuracy (%)
Figure 14. Typical accuracy, normalized to the 100% current level,
versus dimming level, with FPWM = 100 Hz.
A typical application circuit for dimming an LCD monitor
backlight with 96 LEDs is shown in figure 1. Figure 12 shows
two dimming methods: digital PWM control (PWM signal on the
PWM pin) and analog PWM control, with the analog signal, V
A ,
applied to the ISET pin through a resistor, RA.
The current flowing through RA can be calculated as:
IA = VA/ RA .
This current changes the reference current, ISET, as follows:
ISET = VSET / RSET – (VAVSET) / RA .
LED current can be changed by changing V
A. ISET can be
changed in the range from 40 μA to 120 μA.
Application Circuit for 1000:1 Dimming Level
A wider dimming range can be achieved by changing the refer-
ence current, ISET, while using PWM dimming. For higher output,
current levels turn on Q1. RISET and RISETP set the 100% current
level. This current level can be set to 25 mA, and then it can be
dimmed by applying 100% to 0.32% duty cycle on the PWM pin.
The reference current can be reduced by turning off Q1. LED
current can be dimmed to 8 mA by reducing reference current
through ISET pin. This provides 1000:1 combined dimming level
range. Figure 14 shows the accuracy, ErrLEDX , results using this
circuit.
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
14
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Figure 16. Typical application circuit for LED modules with ESD capacitors.
FSET
COMP
ISET
RISET
RFSET
LED8 LED7 LED6 LED5 LGND
VIN SW SW OVP
COUTROVP
D1
VIN
5 V ±10%
1 F
L1
10 H
CC
0.1 F
A8500
LED4 LED3 LED2
LED1
SEL1
SEL2
SEL3
PGND
AGND
All ESD capacitors across LED arrays are 0.1 F
EN
PWM
SKIP
APWM
VIN
EN
PWM
FSET
COMP
ISET
RISET
RFSET
LED8
LED7 LED6 LED5 LGND
VIN SW SW OVP
COUTROVP
VIN
5 V ±10%
A8500
LED4 LED3 LED2
LED1
SKIP
APWM
VIN
CC
CIN CBAT
VBAT 5 to 25 V
SEL1
SEL2
SEL3
AGND
PGND
Figure 15. Typical application circuit for PWM dimming, using digital PWM (on the
PWM pin, with APWM high). Showing configuration of 16 WLEDs at 100 mA, in two
strings of 8 LEDs each.
Recommended Components Table (for application shown in figure 1)
Component Reference
Designator Value Part Number Vendor
Capacitor CBAT 1 F / 50 V C3216X7R1H105K TDK
Capacitor COUT 1 F / 50 V C3216X7R1H105K TDK
Capacitor CIN, CC0.1 F / 6.3 V
Diode D1 60 V / 1.5 A IR 10MQ060NTRPBF International Rectifier
IC A8500 A8500 Allegro MicroSystems
Inductor L1 10 H SLF6028T-100M1R3-PF TDK
Resistor RISET 12 k
Resistor RFSET 24 k
Resistor ROVP 270 k
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
15
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Number Name Description
1 PGND Power ground pin.
2 SKIP Reduces boost switching frequency in case of light load to improve frequency. Normally, this pin should be low; when
high, fSW is divided by 4.
3 COMP Compensation pin; connect external compensation network for boost converter.
4 FSET Sets boost switching frequency. Connect RFSET from FSET to GND to set frequency. Range for RFSET is 13 to 40 k.
5 ISET Sets 100% current through LED string. Connect RISET from ISET to GND. Range for RISET is 10 to 30 k.
6 APWM On/off and analog LED current control with external PWM. Apply logic level PWM (1.2 V < VIH < 5 V) for PWM controlled
dimming mode. When unused, connect to AGND.
7 LED1
LEDx capable of 25 mA.
8 LED3
9 LED5
10 LED7
11 LGND Power ground pin for LED current sink.
12 LED8
LEDx capable of 25 mA.
13 LED6
14 LED4
15 LED2
16 SEL1
SEL1, SEL2, and SEL3 decide active LED strings.17 SEL2
18 SEL3
19 EN On/off and serial dimming control. EN high enables IC and EN low disables IC. This pin can also be used to program
LEDx current. When unused, connect to AGND.
20 PWM On/off and on/off LED current control with external PWM. Apply logic level PWM for PWM controlled dimming mode.
When unused, connect to AGND.
21 PGND Power ground pin.
22 OVP Connect to this pin to output capacitor +Ve node through a resistor to enable OVP (overvoltage protection). Default OVP
level with 0 resistor is 30 V, and it can be programmed up to 47 V.
23 SW DMOS drain node.
24 SW
25 VIN Input supply for the IC. Decouple with a 0.1 F ceramic capacitor.
26 AGND Circuit ground pin.
EP Exposed pad. Electrically connectred to PGND and LGND; connect to PCB copper plane for heat transfer.
Terminal List Table
EP
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
26
25
24
23
22
AGND
VIN
SW
SW
OVP
LED3
LED5
LED7
LGND
LED8
LED6
LED4
PGND
PWM
EN
SEL3
SEL2
SEL1
LED2
PGND
SKIP
COMP
FSET
ISET
APWM
LED1
(Top View)
Pin-out Diagram
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
16
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Package EC, 4 × 4 mm 26-Pin QFN/MLP
0.95
C
SEATING
PLANE
C0.08
27X
26
26
2
1
1
2
26
2
1
A
ATerminal #1 mark area
Coplanarity includes exposed thermal pad and terminals
BExposed thermal pad (reference only, terminal #1
identifier appearance at supplier discretion)
All dimensions nomianl, not for tooling use
(reference JEDEC MO-220WGGE)
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown
C
D
D
C
Reference land pattern layout (reference IPC7351
QFN40P400X400X80-29M)
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances; when
mounting on a multilayer PCB, thermal vias at the exposed thermal pad land
can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5)
(Top View)
(Pads on PCB)
(Bottom View)
1.23
1.10
1.23
1.10
2.45
2.45
4.00
4.00 4.00
0.20
0.40
4.00
0.75
0.40
0.40
0.20
B
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Copyright ©2006-2010, Allegro MicroSystems, Inc.
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