SEMICONDUCTOR
1
August 1996
HS-1412RH
Radiation Hardened, Quad, High Speed,
Low Power, Video Closed Loop Buffer
Features
• Electrically Screened to SMD#5962F9683401VCA
• MIL-PRF-38535 Class V Compliant
• User Programmable For Closed-Loop Gains of +1, -1
or +2 Without Use of External Resistors
• Standard Operational Amplifier Pinout
• Low Supply Current. . . . . . . . . . . 5.9mA/Op Amp (Typ)
• Excellent Gain Accuracy. . . . . . . . . . . . . .0.99V/V (Typ)
• Wide -3dB Bandwidth . . . . . . . . . . . . . . . 340MHz (Typ)
• Fast Slew Rate . . . . . . . . . . . . . . . . . . . . 1155V/µs (Typ)
• High Input Impedance . . . . . . . . . . . . . . . . . . 1MΩ (Typ)
• Excellent Gain Flatness (to 50MHz) . . . . ±0.02dB (Typ)
• Fast Overdrive Recovery. . . . . . . . . . . . . . . <10ns (Typ)
• Total Gamma Dose. . . . . . . . . . . . . . . . . . 300K RAD(Si)
• Latch Up . . . . . . . . . . . . . . . . . . . . .None (DI Technolgy)
Applications
• Flash A/D Driver
• Video Switching and Routing
• Pulse and Video Amplifiers
• Wideband Amplifiers
• RF/IF Signal Processing
• Imaging Systems
Description
The HS-1412RH is a radiation hardened quad closed loop buffer
featuring user programmable gain and high speed performance.
Manufactured on Harris’ proprietary complementary bipolar UHF-
1 (DI bonded wafer) process, this device offers wide -3dB band-
width of 340MHz, very fast slew rate, excellent gain flatness and
high output current. These devices are QML approved and are
processed and screened in full compliance with MIL-PRF-38535.
A unique feature of the pinout allows the user to select a voltage
gain of +1, -1, or +2, without the use of an y e xternal components .
Gain selection is accomplished via connections to the inputs, as
described in the “Application Information” section. The result is a
more fle xib le product, f e wer part types in inv entory, and more effi-
cient use of board space .
Compatibility with existing op amp pinouts provides flexibility to
upgrade low gain amplifiers, while decreasing component count.
Unlike most buffers, the standard pinout provides an upgrade
path should a higher closed loop gain be needed at a future date .
Detailed Electrical Specifications are contained in SMD
#5962F9683401VCA, available on the Harris Web site or
AnswerFAX Systems (Document #968340)
ACross Reference Table is available on the Harris Website for
conversion of Harris Part Numbers to SMDs. The address
is (http://www.semi.harris.com/datasheets/smd/smd_xref.ht
ml). SMD numbers must be used to order Radiation Hardened
Products.
Pinout
HS-1412RH
(CERDIP)
MIL-STD-1835 GDIP1-T14
TOP VIEW
Ordering Information
PART
NUMBER TEMP.
RANGE (oC) PACKAGE PKG. NO.
5962F9683401VCA -55 to 125 14 Ld CERDIP GDIP1-T14
HFA1145IP
(Samples) -40 to 85 14 Ld PDIP E14.3
HA5025EVAL Evaluation Board
OUT1
-IN1
+IN1
V+
+IN2
-IN2
OUT2
OUT4
-IN4
+IN4
V-
+IN3
-IN3
OUT3
1
2
3
4
5
6
7
14
13
12
11
10
9
8
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © Harris Corporation 1996 File Number 4230
2
Application Information
HS-1412RH Advantages
The HS-1412RH features a novel design which allows the
user to select from three closed loop gains, without any
external components. The result is a more flexible product,
f ewer part types in inventory, and more efficient use of board
space. Implementing a quad, gain of 2, cable driver with this
IC eliminates the eight gain setting resistors, which frees up
board space for termination resistors.
Like most newer high perfor mance amplifiers, the HS-1412RH
is a current feedback amplifier (CFA). CFAs offer high band-
width and slew r ate at low supply currents , but can be difficult to
use because of their sensitivity to feedback capacitance and
parasitics on the inverting input (summing node). The HS-
1412RH eliminates these concerns by bringing the gain setting
resistors on-chip. This yields the optimum placement and value
of the feedback resistor, while minimizing feedback and sum-
ming node parasitics. Because there is no access to the sum-
ming node, the PCB parasitics do not impact performance at
gains of +2 or -1 (see “Unity Gain Considerations” for discus-
sion of parasitic impact on unity gain perf ormance).
The HS-1412RH’s closed loop gain implementation provides
better gain accuracy, lower offset and output impedance,
and better distortion compared with open loop buffers.
Closed Loop Gain Selection
This “buffer” operates in closed loop gains of -1, +1, or +2, with
gain selection accomplished via connections to the ±inputs.
Applying the input signal to +IN and floating -IN selects a gain
of +1 (see next section for layout caveats), while grounding -IN
selects a gain of +2. A gain of -1 is obtained by applying the
input signal to -IN with +IN grounded through a 50Ω resistor.
The table below summarizes these connections:
Unity Gain Considerations
Unity gain selection is accomplished by floating the -Input of
the HS-1412RH. Anything that tends to short the -Input to
GND, such as stray capacitance at high frequencies, will
cause the amplifier gain to increase toward a gain of +2. The
result is excessive high frequency peaking, and possible
instability. Even the minimal amount of capacitance associ-
ated with attaching the -Input lead to the PCB results in
approximately 6dB of gain peaking. At a minimum this
requires due care to ensure the minimum capacitance at the
-Input connection.
Table 1 lists five alternate methods for configuring the HS-
1412RH as a unity gain buffer, and the corresponding per-
formance. The implementations vary in complexity and
involve performance trade-offs. The easiest approach to
implement is simply shorting the two input pins together,
and applying the input signal to this common node. The
amplifier bandwidth decreases from 550MHz to 370MHz,
but excellent gain flatness is the benefit. A drawback to this
approach is that the amplifier input noise voltage and input
offset voltage terms see a gain of +2, resulting in higher
noise and output offset voltages. Alternately, a 100pF
capacitor between the inputs shorts them only at high fre-
quencies, which prevents the increased output offset volt-
age but delivers less gain flatness.
Another straightforward approach is to add a 620Ω resistor
in series with the amplifier’s positive input. This resistor and
the HS-1412RH input capacitance form a low pass filter
which rolls off the signal bandwidth before gain peaking
occurs. This configuration was employed to obtain the data
sheet AC and transient parameters for a gain of +1.
Pulse Overshoot
The HS-1412RH utilizes a quasi-complementary output
stage to achieve high output current while minimizing quies-
cent supply current. In this approach, a composite device
replaces the traditional PNP pulldown transistor. The com-
posite device switches modes after crossing 0V, resulting in
added distortion for signals swinging below ground, and an
increased overshoot on the negative portion of the output
waveform (see Figure 5, Figure 7, and Figure 9). This over-
shoot isn’t present for small bipolar signals (see Figure 4,
Figure 6, and Figure 8) or large positive signals. Figure 28
through Figure 31 illustrate the amplifier’s overshoot depen-
dency on input transition time, and signal polarity.
GAIN
(ACL)
CONNECTIONS
+INPUT -INPUT
-1 50Ω to GND Input
+1 Input NC (Floating)
+2 Input GND
TABLE 1. UNITY GAIN PERFORMANCE FOR VARIOUS IMPLEMENTATIONS
APPROACH PEAKING (dB) BW (MHz) SR (V/µs) ±0.1dB GAIN FLATNESS (MHz)
Remove -IN Pin 5.0 550 1300 18
+RS= 620Ω1.0 230 1000 25
+RS= 620Ωand Remove -IN Pin 0.7 225 1000 28
Short +IN to -IN (e.g., Pins 2 and 3) 0.1 370 500 170
100pF Capacitor Between +IN and -IN 0.3 380 550 130
HS-1412RH
3
PC Board Layout
This amplifier’s frequency response depends greatly on the
care taken in designing the PC board (PCB). The use of lo w
inductance components such as chip resistors and chip
capacitors is strongly recommended, while a solid
ground plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10µF) tantalum in parallel with a small value
(0.1µF) chip capacitor works well in most cases.
Terminated microstrip signal lines are recommended at the
input and output of the device. Capacitance directly on the
output must be minimized, or isolated as discussed in the
next section.
An example of a good high frequency layout is the Evalua-
tion Board shown in Figure 3.
Driving Capacitive Loads
Capacitive loads, such as an A/D input, or an improperly ter-
minated transmission line will degrade the amplifier’s phase
margin resulting in frequency response peaking and possi-
ble oscillations . In most cases , the oscillation can be a voided
by placing a resistor (RS) in series with the output prior to
the capacitance.
Figure 1 details star ting points for the selection of this resis-
tor . The points on the curve indicate the R S and CL combina-
tions for the optimum bandwidth, stability, and settling time,
but experimental fine tuning is recommended. Picking a
point abov e or to the right of the curve yields an overdamped
response, while points below or left of the curve indicate
areas of underdamped performance.
RS and C Lf orm a low pass network at the output, thus limiting
system bandwidth well below the amplifier bandwidth of
350MHz. By decreasing RS as CL increases (as illustrated in
the cur ves), the maximum bandwidth is obtained without sac-
rificing stability. In spite of this, bandwidth decreases as the
load capacitance increases. For example, at AV= +2,
RS=22Ω, CL= 100pF, the overall bandwidth is 125MHz, and
bandwidth drops to 100MHz at RS=12Ω, CL= 220pF.
Evaluation Board
The perf ormance of the HS-1412RH may be ev aluated using
the HA5025 Evaluation Board, slightly modified as follows:
1. Remove the four feedback resistors, and leave the con-
nections open.
2. a. For AV = +1 evaluation, remove the gain setting
resistors (R1), and leave pins 2, 6, 9, and 13 floating.
b. For AV = +2, replace the gain setting resistors (R1) with
0Ω resistors to GND.
The modified schematic for amplifier 1, and the board layout
are shown in Figures 2 and 3.
To order evaluation boards (part number HA5025EVAL),
please contact your local sales office.
0 100 200 300 400
0
10
20
30
40
50
LOAD CAPACITANCE (pF)
SERIES OUTPUT RESISTANCE (Ω)
AV=+1
A
V=+2
150 250 35050
FIGURE 1. RECOMMENDED SERIES RESISTOR vs LOAD
CAPACITANCE
+5V
10µF 0.1µF
50Ω
GND
GND
R1
-5V
0.1µF10µF
50Ω
IN
OUT ∞ (AV = +1)
or 0Ω (AV = +2)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
NOTE: R1=
FIGURE 2. MODIFIED EVALUATION BOARD SCHEMATIC
+
-
(NOTE)
FIGURE 3A. TOP LAYOUT
FIGURE 3B. BOTTOM LAYOUT
FIGURE 3. EVALUATION BOARD LAYOUT
HS-1412RH
4
Typical Performance Curves
VSUPPLY = ±5V, TA = 25oC, RL = 100Ω, Unless Otherwise Specified
FIGURE 4. SMALL SIGNAL PULSE RESPONSE FIGURE 5. LARGE SIGNAL PULSE RESPONSE
FIGURE 6. SMALL SIGNAL PULSE RESPONSE FIGURE 7. LARGE SIGNAL PULSE RESPONSE
FIGURE 8. SMALL SIGNAL PULSE RESPONSE FIGURE 9. LARGE SIGNAL PULSE RESPONSE
AV = +2
200
150
100
50
0
-50
-100
-150
-200
OUTPUT VOLTAGE (mV)
TIME (5ns/DIV.)
AV = +2
2.0
1.5
1.0
0.5
0
-0.5
-1.0
-1.5
-2.0
OUTPUT VOLTAGE (V)
TIME (5ns/DIV.)
AV = +1
200
150
100
50
0
-50
-100
-150
-200
OUTPUT VOLTAGE (mV)
TIME (5ns/DIV.)
AV = +1
2.0
1.5
1.0
0.5
0
-0.5
-1.0
-1.5
-2.0
OUTPUT VOLTAGE (V)
TIME (5ns/DIV.)
AV = -1
200
150
100
50
0
-50
-100
-150
-200
OUTPUT VOLTAGE (mV)
TIME (5ns/DIV.)
AV = -1
2.0
1.5
1.0
0.5
0
-0.5
-1.0
-1.5
-2.0
OUTPUT VOLTAGE (V)
TIME (5ns/DIV.)
HS-1412RH
5
FIGURE 10. FREQUENCY RESPONSE FIGURE 11. FREQUENCY RESPONSE FOR VARIOUS LOAD
RESISTORS
FIGURE 12. FREQUENCY RESPONSE FOR VARIOUS LOAD
RESISTORS FIGURE 13. FREQUENCY RESPONSE FOR VARIOUS LOAD
RESISTORS
FIGURE 14. FREQUENCY RESPONSE FOR VARIOUS OUTPUT
VOLTAGES FIGURE 15. FREQUENCY RESPONSE FOR VARIOUS OUTPUT
VOLTAGES
Typical Performance Curves
VSUPPLY = ±5V, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued)
AV = -1
AV = +1
AV = -1
AV = +1
GAIN
PHASE
VOUT = 200mVP-P
AV = +2
AV= +2
0.3 1 10 100 500
6
3
0
-3
-6
270
180
90
0
NORMALIZED GAIN (dB)
PHASE (DEGREES)
FREQUENCY (MHz)
GAIN
PHASE
AV = +2, VOUT = 200mVP-P
0.3 1 10 100 500
9
6
3
0
270
180
90
0
GAIN (dB)
PHASE (DEGREES)
FREQUENCY (MHz)
RL = 1kΩ
RL = 100Ω
RL = 50Ω
RL = 1kΩ
RL = 100Ω
RL = 50Ω
GAIN
PHASE
AV = +1, VOUT = 200mVP-P
0.3 1 10 100 500
3
0
-3
-6
270
180
90
0
GAIN (dB)
PHASE (DEGREES)
FREQUENCY (MHz)
RL = 1kΩ
RL = 100Ω
RL = 50Ω
RL = 1kΩ
RL = 100Ω
RL = 50Ω
GAIN
PHASE
AV = -1, VOUT = 200mVP-P
0.3 1 10 100 500
3
0
-3
-6
-90
0
90
180
GAIN (dB)
PHASE (DEGREES)
FREQUENCY (MHz)
RL = 1kΩ
RL =100Ω
RL = 50Ω
RL = 1kΩ
RL = 100Ω
RL = 50Ω
GAIN
PHASE
AV = +2
0.3 1 10 100 500
9
6
3
0
270
180
90
0
GAIN (dB)
PHASE (DEGREES)
FREQUENCY (MHz)
1VP-P
2.5VP-P
4VP-P
1VP-P
2.5VP-P
4VP-P
360
GAIN
PHASE
AV = +1
0.3 1 10 100 500
3
0
-3
-6
270
180
90
0
GAIN (dB)
PHASE (DEGREES)
FREQUENCY (MHz)
1VP-P
4VP-P
1VP-P
2.5VP-P
4VP-P
360
2.5VP-P
HS-1412RH
6
FIGURE 16. FREQUENCY RESPONSE FOR VARIOUS OUTPUT
VOLTAGES FIGURE 17. FULL POWER BANDWIDTH
FIGURE 18. -3dB BANDWIDTH vs TEMPERATURE FIGURE 19. GAIN FLATNESS
FIGURE 20. REVERSE ISOLATION (S12) FIGURE 21. ALL HOSTILE CROSSTALK
Typical Performance Curves
VSUPPLY = ±5V, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued)
GAIN
PHASE
AV = -1
0.3 1 10 100 500
3
0
-3
-6
-90
0
90
180
GAIN (dB)
PHASE (DEGREES)
FREQUENCY (MHz)
2.5VP-P
4VP-P
1VP-P
2.5VP-P
4VP-P
1VP-P
VOUT = 5VP-P
0.3 1 10 100 500
6
3
0
-3
NORMALIZED GAIN (dB)
FREQUENCY (MHz)
AV = +2
AV = +1
AV = -1
-6
-9
-12
-15
-18
-21
200
250
300
350
400
450
TEMPERATURE (oC)
BANDWIDTH (MHz)
-50 -25 0 25 50 75 100 125
AV= -1
AV = +1
AV= +2
1 10 100
0.4
0.3
0.2
0.1
NORMALIZED GAIN (dB)
FREQUENCY (MHz)
0
-0.1
-0.2
-0.3
-0.4
0.5
-0.5
VOUT = 200mVP-P
AV = +2
AV = -1
AV = +1
200
0.3 1 10 100 500
-45
-50
-55
-60
GAIN (dB)
FREQUENCY (MHz)
AV = +2
AV = -1
AV = +1
-65
-70
-75
-80
-85
-90
-40
0.3 1 10 100
-10
-20
-30
-40
CROSSTALK (dB)
FREQUENCY (MHz)
-50
-60
-70
-80
-90
0
RL = 100Ω
RL = ∞
HS-1412RH
7
FIGURE 22. 2nd HARMONIC DISTORTION vs POUT FIGURE 23. 3rd HARMONIC DISTORTION vs POUT
FIGURE 24. 2nd HARMONIC DISTORTION vs POUT FIGURE 25. 3rd HARMONIC DISTORTION vs POUT
FIGURE 26. 2nd HARMONIC DISTORTION vs POUT FIGURE 27. 3rd HARMONIC DISTORTION vs POUT
Typical Performance Curves
VSUPPLY = ±5V, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued)
-80
-75
-70
-65
-60
-55
-50
-45
-40
OUTPUT POWER (dBm)
DISTORTION (dBc)
-5 -2 1 4 7 10 13
20MHz
10MHz
AV = +2
-80
-75
-70
-65
-60
-55
-50
-45
-40
OUTPUT POWER (dBm)
DISTORTION (dBc)
-5 -2 1 4 7 10 13
20MHz
10MHz
AV = +2
-80
-75
-70
-65
-60
-55
-50
-45
-40
OUTPUT POWER (dBm)
DISTORTION (dBc)
-5 -2 1 4 7 10 13
20MHz
10MHz
AV = +1
-80
-75
-70
-65
-60
-55
-50
-45
-40
OUTPUT POWER (dBm)
DISTORTION (dBc)
-5 -2 1 4 7 10 13
20MHz
10MHz
AV = +1
-80
-75
-70
-65
-60
-55
-50
-45
-40
OUTPUT POWER (dBm)
DISTORTION (dBc)
-5 -2 1 4 7 10 13
20MHz
10MHz
AV = -1
-80
-75
-70
-65
-60
-55
-50
-45
-40
OUTPUT POWER (dBm)
DISTORTION (dBc)
-5 -2 1 4 7 10
20MHz
10MHz
AV = -1
13
HS-1412RH
8
FIGURE 28. OVERSHOOT vs TRANSITION TIME FIGURE 29. OVERSHOOT vs TRANSITION TIME
FIGURE 30. OVERSHOOT vs TRANSITION TIME FIGURE 31. OVERSHOOT vs TRANSITION TIME
FIGURE 32. INTEGRAL LINEARITY ERROR FIGURE 33. SETTLING RESPONSE
Typical Performance Curves
VSUPPLY = ±5V, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued)
0
5
10
15
20
INPUT TRANSITION TIME (ps)
OVERSHOOT (%)
100 500 900 1300 1700 2100
AV = -1
AV = +1
AV = +2
VOUT = +0.5V
0
5
10
15
20
INPUT TRANSITION TIME (ps)
OVERSHOOT (%)
100 500 900 1300 1700 2100
AV = -1 AV = +2
AV = +1
VOUT = +1V
0
5
10
15
20
INPUT TRANSITION TIME (ps)
OVERSHOOT (%)
100 500 900 1300 1700 2100
AV = -1
AV = +1
AV = +2
VOUT = 0.5VP-P
0
5
10
15
20
INPUT TRANSITION TIME (ps)
OVERSHOOT (%)
100 500 900 1300 1700 2100
AV = -1
AV = +2 AV = +1
VOUT = 1VP-P
-0.06
-0.05
-0.04
-0.03
-0.02
-0.01
0
0.01
0.02
INPUT VOLTAGE (V)
ERROR (%)
-1.5 -1.0 -0.5 0 0.5 1.0 1.5
AV = +2
AV = +1
AV = -1
AV = +2
10 20 80 90
0.2
0.1
SETTLING ERROR (%)
TIME (ns)
0
-0.05
-0.1
-0.2
0.05
30 40 60 7050
HS-1412RH
9
FIGURE 34. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 35. OUTPUT VOLTAGE vs TEMPERATURE
FIGURE 36. INPUT NOISE CHARACTERISTICS
Typical Performance Curves
VSUPPLY = ±5V, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued)
SUPPLY VOLTAGE (±V)
SUPPLY CURRENT (mA/AMPLIFIER)
4.5 6.55 5.5 6 7
5.5
5.6
5.7
5.8
5.9
6.0
6.1
6.2
6.3
6.4
6.5
6.6 3.6
3.5
3.4
3.3
3.2
3.1
2.9
2.8
2.7
2.6-50 -25 0 25 50 75 100 125
TEMPERATURE (oC)
OUTPUT VOLTAGE (V)
3.0 +VOUT (RL= 50Ω)
|-VOUT| (RL= 50Ω)
+VOUT (RL= 100Ω)
|-VOUT| (RL= 100Ω)
AV = -1
50
40
30
20
10
20
16
12
8
4
0
0.1 1 10 100
FREQUENCY (kHz)
NOISE VOLTAGE (nV/√Hz)
0
NOISE CURRENT (pA/√Hz)
INI
ENI
HS-1412RH
10
Burn-In Circuit
HS-1412RH CERDIP
NOTES:
1. R1 = 1kΩ,±5%, 1/4W [Per Socket].
2. C1 = C2 = 0.01µF [Per Socket] or 0.1µF (Per Row) Minimum.
3. D1 = D2 = 1N4002 or Equivalent [Per Board].
4. D3 = D4 = 1N4002 or Equivalent [Per Socket].
5. (-V) + (+V) = 11V ±1.0V.
6. 20mA < (ICC, IEE) < 32mA.
7. -50mV < VOUT < +50mV.
Irradiation Circuit
HS-1412RH CERDIP
NOTES:
1. R1 = 1kΩ ±5%
2. C1 = 0.1µF
3. V+ = +5.0V ±0.5V
4. V- = -5.0V ±0.5V
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V+
C1D1
D3
D2
C2
V-
D4
R1
R1
R1
R1
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V+
C1
V-
R1
R1
R1
R1
C1
HS-1412RH
11
Die Characteristics
DIE DIMENSIONS:
79 mils x 118 mils x 19 mils
(2000µm x 3000µm x 483µm)
METALLIZATION:
Type: Metal 1: AICu(2%)/TiW
Thickness: Metal 1: 8kű0.4kÅ
Type: Metal 2: AICu(2%)
Thickness: Thickness: Metal 2: 16kű0.8kÅ
SUBSTRATE POTENTIAL (Powered Up)
Floating (Recommend Connection to V-)
PASSIVATION:
Type: Nitride
Thickness: 4kű0.5kÅ
TRANSISTOR COUNT:
320
Metallization Mask Layout
HS-1412RH
V-
+IN1
V+
OUT1 OUT4-IN1 -IN4
+IN4
+IN3+IN2
-IN3-IN2 OUT3OUT2 V-
HS-1412RH
