SRAM MT5C2561 256K x 1 SRAM SRAM MEMORY ARRAY PIN ASSIGNMENT (Top View) AVAILABLE AS MILITARY SPECIFICATIONS * SMD 5962-88725 * SMD 5962-88544 * MIL-STD-883 24-Pin DIP (C) (300 MIL) A6 A7 A8 A9 A10 A11 A14 A15 A0 Q WE\ Vss FEATURES * * * * High Speed: 35, 45, 55, and 70 Battery Backup: 2V data retention Low power standby High-performance, low-power, CMOS double-metal process * Single +5V (+10%) Power Supply * Easy memory expansion with CE\ * All inputs and outputs are TTL compatible 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 Vcc A5 A4 A3 A2 A1 A17 A16 A13 A12 D CE\ 28-Pin LCC (EC) MARKING A8 A7 A6 Vcc A5 OPTIONS 3 2 1 28 27 -35 -45 -55* -70* * Package(s) Ceramic DIP (300 mil) Ceramic LCC C EC GENERAL DESCRIPTION The Micross Components SRAM family employs high-speed, low-power CMOS and are fabricated using doublelayer metal, double-layer polysilicon technology. For flexibility in high-speed memory applications, Micross Components offers chip enable (CE\) on all organizations. This enhancement can place the outputs in High-Z for additional flexibility in system design. The x1 configuration features separate data input and output. Writing to these devices is accomplished when write enable (WE\) and CE\ inputs are both LOW. Reading is accomplished when WE\ remains HIGH and CE\ goes LOW. The device offers a reduced power standby mode when disabled. This allows system designs to achieve low standby power requirements. These devices operate from a single +5V power supply and all inputs and outputs are fully TTL compatible. L *Electrical characteristics identical to those provided for the 45ns access devices. For more products and information please visit our web site at www.micross.com MT5C2561 Rev. 2.8 01/10 NC A4 A3 A2 A1 A17 A16 A13 NC 13 14 15 16 17 No. 106 No. 204 * Operating Temperature Ranges Industrial (-40oC to +85oC) IT XT Military (-55oC to +125oC) * 2V data retention/low power 26 25 24 23 22 21 20 19 18 NC 4 A9 5 A10 6 A11 7 A14 8 A15 9 A0 10 Q 11 NC 12 A12 D CE\ Vss WE\ * Timing 35ns access 45ns access 55ns access 70ns access Micross Components reserves the right to change products or specifications without notice. 1 SRAM MT5C2561 FUNCTIONAL BLOCK DIAGRAM VCC I/O CONTROL D ROW DECODER A13 A14 A15 A16 A17 A0 A1 A2 A3 A4 GND 262,144-BIT MEMORY ARRAY Q CE\ WE\ POWER DOWN COLUMN DECODER A5 A6 A7 A8 A9 A10 A11 A12 TRUTH TABLE MODE CE\ STANDBY H READ L WRITE L MT5C2561 Rev. 2.8 01/10 WE\ X H L DQ HIGH-Z Q HIGH-Z POWER STANDBY ACTIVE ACTIVE Micross Components reserves the right to change products or specifications without notice. 2 SRAM MT5C2561 *Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. ABSOLUTE MAXIMUM RATINGS* Voltage on Any Pin Relative to Vss..............................-0.5V to +7V Voltage on Vcc Supply Relative to Vss.........................-0.5V to +7V Voltage Applied to Q....................................................-0.5V to +6V Storage Temperature.................................................-65oC to +150oC Power Dissipation.........................................................................1W Short Circuit Output Current.....................................................50mA Lead Temperature (soldering 10 seconds).............................+260oC Junction Temperature..............................................................+175oC ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS (-55oC < TC < 125oC; VCC = 5V +10%) DESCRIPTION CONDITIONS SYM VIH MIN MAX UNITS NOTES 2.2 VCC+0.5 V 1 VIL -0.5 0.8 V 1, 2 0V<VIN<VCC ILI -10 10 A Output(s) disabled 0V<VOUT<VCC ILO -10 10 A Output High Voltage IOH = -4.0mA VOH 2.4 Output Low Voltage IOL = 8.0mA VOL Input High (Logic 1) Voltage Input Low (Logic 0) Voltage Input Leakage Current Output Leakage Current PARAMETER Power Supply Current: Operating Power Supply Current: Standby 0.4 V 1 V 1 SYM MAX -35 -45 ICCSP 120 120 mA 3 ICCLP 100 100 mA 3 ISBT1 25 25 mA ISBCSP 20 20 mA ISBCLP 3 3 mA CONDITIONS CE\ < VIL; VCC = MAX f = MAX = 1/tRC (MIN) Output Open UNITS NOTES CE\ > VIH; All Other Inputs < VIL or > VIH, VCC = MAX f = 0 Hz CE\ > VCC -0.2V; VCC = MAX VIL < VSS +0.2V VIH > VCC -0.2V; f = 0 Hz "L" Version Only CAPACITANCE PARAMETER Input Capacitance Output Capacitance MT5C2561 Rev. 2.8 01/10 CONDITIONS o TA = 25 C, f = 1MHz Vcc = 5V SYM MAX UNITS NOTES CI 10 pF 4 CO 12 pF 4 Micross Components reserves the right to change products or specifications without notice. 3 SRAM MT5C2561 ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (Note 5) (-55oC < TC < 125oC; VCC = 5V +10%) DESCRIPTION READ CYCLE READ cycle time Address access time Chip Enable access time Output hold from address change Chip Enable to output in Low-Z Chip disable to output in High-Z Chip Enable to power-up time Chip disable to power-down time WRITE CYCLE WRITE cycle time Chip Enable to end of write Address valid to end of write Address setup time Address hold from end of write WRITE pulse width Data setup time Data hold time Write disable to output in Low-Z Write Enable to output in High-Z MT5C2561 Rev. 2.8 01/10 -35 SYMBOL MIN tRC tAA tACE tOH tLZCE tHZCE tPU tPD 35 tWC tCW tAW tAS tAH tWP tDS tDH 35 30 30 0 5 30 20 0 0 0 -45 MAX MIN UNITS NOTES 45 ns ns ns ns ns ns ns ns 7 6, 7 4 4 20 ns ns ns ns ns ns ns ns ns ns 7 6, 7 45 35 35 3 3 45 45 3 3 20 0 20 0 35 tLZWE tHZWE MAX 15 45 40 40 0 5 40 20 0 0 0 Micross Components reserves the right to change products or specifications without notice. 4 SRAM MT5C2561 AC TEST CONDITIONS Input pulse levels ...................................... Vss to 3.0V Input rise and fall times ......................................... 5ns Input timing reference levels ................................ 1.5V Output reference levels ....................................... 1.5V Output load ................................. See Figures 1 and 2 Q Q VTH = 5pF Fig. 2 Output Load Fig. 1 Output Load Equivalent NOTES 7. 1. 2. 3. All voltages referenced to VSS (GND). -3V for pulse width < 20ns ICC is dependent on output loading and cycle rates. The specified value applies with the outputs unloaded, and f = 1 Hz. t RC (MIN) 4. This parameter is guaranteed but not tested. 5. Test conditions as specified with the output loading as shown in Fig. 1 unless otherwise noted. 6. tLZCE, tLZWE, tLZOE, tHZCE, tHZOE and tHZWE are specified with CL = 5pF as in Fig. 2. Transition is measured 200mV typical from steady state voltage, allowing for actual tester RC time constant. 8. 9. 10. 11. 12. and VTH = Equivalent At any given temperature and voltage condition, tHZCE is less than tLZCE, and tHZWE is less than tLZWE and tHZOE is less than tLZOE. WE\ is HIGH for READ cycle. Device is continuously selected. Chip enable is held in its active state. Address valid prior to, or coincident with, latest occurring chip enable. tRC = Read Cycle Time. Chip enable (CE\) and write enable (WE\) can initiate terminate a WRITE cycle. DATA RETENTION ELECTRICAL CHARACTERISTICS (L Version Only) DESCRIPTION VCC for Retention Data CONDITIONS SYM VDR MIN 2 MAX --- UNITS V NOTES 900 A --- ns 4 ns 4, 11 CE\ > (VCC - 0.2V) Data Retention Current VIN > (VCC - 0.2V) or < 0.2V VCC = 2V Chip Deselect to Data Retention Time Operation Recovery Time ICCDR tCDR 0 tR tRC LOW Vcc DATA RETENTION WAVEFORM VCC 4.5V DATA RETENTION MODE 4.5V V > 2V DR tCDR CE\ VIH VIL tR VDR DON'T CARE UNDEFINED MT5C2561 Rev. 2.8 01/10 Micross Components reserves the right to change products or specifications without notice. 5 SRAM MT5C2561 READ CYCLE NO. 1 8, 9 ttRC RC ADDRESS VALID ttAA AA ttOH OH DQ PREVIOUS DATA VALID DATA VALID READ CYCLE NO. 2 7, 8, 10 ttRC RC CE\ ttLZCE LZCE tACE tACE t HZCE tHZCE DQ DATA VALID ttPU PU ttPD PD Icc MT5C2561 Rev. 2.8 01/10 Micross Components reserves the right to change products or specifications without notice. 6 SRAM MT5C2561 WRITE CYCLE NO. 1 12 (Chip Enabled Controlled) t WC tWC ADDRESS tAW tAW ttAS AS t AH tAH tCW tCW CE\ t WP tWP1 WE\ t DH tDH ttDS DS D DATA VAILD Q HIGH Z WRITE CYCLE NO. 2 7, 12 (Write Enabled Controlled) tWC tWC ADDRESS tAW tAW ttAH AH tCW tCW CE\ ttAS AS t WP tWP1 WE\ tDS D DATA VALID tHZWE Q t DH tDH tLZWE HIGH-Z DON'T CARE UNDEFINED NOTE: Output enable (OE\) is inactive (HIGH). MT5C2561 Rev. 2.8 01/10 Micross Components reserves the right to change products or specifications without notice. 7 SRAM MT5C2561 MECHANICAL DEFINITIONS* Micross Case #106 (Package Designator C) SMD #5962-88544 & #5962-88725, Case Outline L D A Q Pin 1 L S1 e b b2 E NOTE 0o to 15o SYMBOL A b b2 c D E eA e L Q S1 c eA SMD SPECIFICATIONS MIN MAX --0.200 0.014 0.026 0.045 0.065 0.008 0.018 --1.280 0.220 0.310 0.300 BSC 0.100 BSC 0.125 0.200 0.015 0.060 0.005 --- NOTE: These dimensions are per the SMD. Micross' package dimensional limits may differ, but they will be within the SMD limits. *All measurements are in inches. MT5C2561 Rev. 2.8 01/10 Micross Components reserves the right to change products or specifications without notice. 8 SRAM MT5C2561 MECHANICAL DEFINITIONS* Micross Case #204 (Package Designator EC) SMD# 5962-88544, Case Outline X D1 B2 D2 L2 e E3 E E1 E2 h x 45o D L hx45o B1 D3 A A1 SYMBOL A A1 B1 B2 D D1 D2 D3 E E1 E2 E3 e h L L2 SMD SPECIFICATIONS MIN MAX 0.060 0.120 0.050 0.088 0.022 0.028 0.072 REF 0.342 0.358 0.200 BSC 0.100 BSC --0.358 0.540 0.560 0.400 BSC 0.200 BSC --0.558 0.050 BSC 0.040 REF 0.045 0.055 0.075 0.095 NOTE: These dimensions are per the SMD. Micross' package dimensional limits may differ, but they will be within the SMD limits. *All measurements are in inches. MT5C2561 Rev. 2.8 01/10 Micross Components reserves the right to change products or specifications without notice. 9 SRAM MT5C2561 ORDERING INFORMATION EXAMPLE: MT5C2561EC-70/XT EXAMPLE: MT5C2561C-45L/IT Device Number Package Speed Options** Process Type ns Device Number Package Speed Options** Process Type ns MT5C2561 C -35 L /* MT5C2561 EC -35 L /* MT5C2561 C -45 L /* MT5C2561 EC -45 L /* MT5C2561 C -55 L /* MT5C2561 EC -55 L /* MT5C2561 C -70 L /* MT5C2561 EC -70 L /* *AVAILABLE PROCESSES IT = Industrial Temperature Range XT = Extended Temperature Range 883C = Full Military Processing -40oC to +85oC -55oC to +125oC -55oC to +125oC ** OPTIONS L = 2V Data Retention/Low Power MT5C2561 Rev. 2.8 01/10 Micross Components reserves the right to change products or specifications without notice. 10 SRAM MT5C2561 MICROSS TO DSCC PART NUMBER CROSS REFERENCE* Micross Package Designator C Micross Package Designator EC Micross Part # MT5C2561C-35/883C MT5C2561C-45/883C MT5C2561C-55/883C MT5C2561C-70/883C SMD Part # 5962-8872501LX 5962-8872502LX 5962-8872503LX 5962-8872504LX Micross Part # MT5C2561EC-35/883C MT5C2561EC-45/883C MT5C2561EC-55/883C MT5C2561EC-70/883C SMD Part # 5962-8872501XX 5962-8872502XX 5962-8872503XX 5962-8872504XX MT5C2561C-35L883C MT5C2561C-45L883C MT5C2561C-55L883C MT5C2561C-70L883C 5962-8854401LX 5962-8854402LX 5962-8854403LX 5962-8854404LX MT5C2561EC-35L883C MT5C2561EC-45L883C MT5C2561EC-55L883C MT5C2561EC-70L883C 5962-8854401XX 5962-8854402XX 5962-8854403XX 5962-8854404XX * Micross part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD. MT5C2561 Rev. 2.8 01/10 Micross Components reserves the right to change products or specifications without notice. 11 SRAM MT5C2561 DOCUMENT TITLE 256K x 1 SRAM SRAM MEMORY ARRAY REVISION HISTORY Rev # 2.7 2.8 MT5C2561 Rev. 2.8 01/10 History Updated EC Pin Assignment from A17 to A5 Updated Micross Information Release Date September 2008 Status Release January 2010 Release Micross Components reserves the right to change products or specifications without notice. 12