LTC4007EGN#PBF - LINEAR TECHNOLOGY

LTC4007

4007fc

TYPICAL APPLICATION

DESCRIPTION

4A, High Efﬁ ciency,

Standalone Li-Ion Battery Charger

The LTC

4007 is a complete constant-current/constant-

voltage charger controller for 3- or 4-cell lithium-ion batteries.

The PWM controller uses a synchronous, quasi-constant

frequency, constant off-time architecture that will not

generate audible noise even when using ceramic capacitors.

Charging current is programmable to ±4% accuracy using

a programming resistor. Charging current can also be

monitored as a voltage across the programming resistor.

The output ﬂ oat voltage is pin programmed for cell count

(3 cells or 4 cells) and chemistry (4.2V/4.1V). A timer,

programmed by an external resistor, sets the charge

termination time. Charging is automatically restarted when

cell voltage falls below 3.9V/cell.

LTC4007 includes a thermistor input, which suspends

charging if an unsafe temperature condition is detected.

If the cell voltage is less than 2.5V, a low-battery indicator

asserts and can be used to program a trickle charge current

to safely charge depleted batteries. The FAULT pin is also

asserted and charging terminates if the low-battery con-

dition persists for more than 1/4 of the total charge time.

12.6V, 4A Li-Ion Battery Charger

FEATURES

APPLICATIONS

n Complete Charger Controller for 3- or 4-Cell

Lithium-Ion Batteries

n High Conversion Efﬁ ciency: Up to 96%

n Output Currents Exceeding 4A

n ±0.8% Charging Voltage Accuracy

n Built-In Charge Termination for Li-Ion Batteries

n AC Adapter Current Limiting Maximizes Charge Rate*

n Thermistor Input for Temperature Qualiﬁ ed Charging

n Wide Input Voltage Range: 6V to 28V

n 0.5V Dropout Voltage; Maximum Duty Cycle: 98%

n Programmable Charge Current: ±4% Accuracy

n Indicator Outputs for Charging, C/10 Current Detection,

AC Adapter Present, Low Battery, Input Current

Limiting and Faults

n Charging Current Monitor Output

n Available in a 24-Pin Narrow SSOP Package

n Notebook Computers

n Portable Instruments

n Battery-Backup Systems

n Standalone Li-Ion Chargers

3C4C

CHEM

LOBAT

ICL

ACP

SHDN

FAULT

CHG

FLAG

NTC

LOBAT

ICL

ACP

SHDN

FAULT

CHG

FLAG

DCIN

INFET

CLP

CLN

TGATE

BGATE

PGND

CSP

BAT

PROG

ITH

GND

LTC4007

32.4k

309k

0.47μF

THERMISTOR

10k

NTC TIMING RESISTOR

(~2 HOURS)

100k100k100k

VLOGIC

DCIN

0V TO 28V 0.1μF

INPUT SWITCH

15nF

20μF

10μH

4.99k

3.01k

0.025Ω

20μF

Li-Ion

BATTERY

CHARGING

CURRENT

MONITOR

Q1: Si4431DY

Q2: FDC6459

SYSTEM

LOAD

0.12μF

6.04k

26.7k

0.0047μF

4007 TA01

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

Protected by U.S. Patents including 5723970.

LTC4007

4007fc

Voltage from DCIN, CLP, CLN to GND.......... +32V/–0.3V

PGND with Respect to GND .................................. ±0.3V

CSP, BAT to GND ......................................... +28V/–0.3V

CHEM, 3C4C, RT to GND ................................ +7V/–0.3V

NTC ............................................................. +10V/–0.3V

ACP, SHDN, CHG, FLAG,

FAULT, LOBAT, ICL ....................................... +32V/–0.3V

CLP to CLN ............................................................±0.5V

Operating Ambient Temperature Range

(Note 4) ............................................. –40°C to 85°C

Operating Junction Temperature ........... –40°C to 125°C

Storage Temperature Range ................... –65°C to 150°C

Lead Temperature (Soldering, 10 sec) .................. 300°C

(Note 1)

PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

The l denotes the speciﬁ cations which apply over the full operating

temperature range (Note 4), otherwise speciﬁ cations are at TA = 25°C. VDCIN = 20V, VBAT = 12V unless otherwise noted.

TOP VIEW

GN PACKAGE

24-LEAD PLASTIC SSOP

DCIN

CHG

ACP

FAULT

GND

3C4C

LOBAT

NTC

ITH

PROG

SHDN

INFET

BGATE

PGND

TGATE

CLN

CLP

FLAG

CHEM

BAT

CSP

ICL

TJMAX = 125°C, θJA = 90°C/W

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

DCIN Operating Range 628V

IQOperating Current Sum of Current from CLP, CLN , DCIN 3 5 mA

VTOL Charge Voltage Accuracy Nominal Values: 12.3V, 12.6V, 16.4V, 16.8V

(Note 2) l

–0.8

–1.0

0.8

1.0

ITOL Charge Current Accuracy (Note 3) VCSP – VBAT Target = 100mV

VBAT < 6V, VCSP – VBAT Target = 10mV

6V ≤ VBAT ≤ VLOBAT, VCSP – VBAT

Target = 10mV

–4

–5

–60

–35

TTOL Termination Timer Accuracy RRT = 270k l–15 15 %

Shutdown

Battery Leakage Current DCIN = 0V

SHDN = 3V

l–10

15 35

μA

UVLO Undervoltage Lockout Threshold DCIN Rising, VBAT = 0 l4.2 4.7 5.5 V

Shutdown Threshold at SHDN l1 1.6 2.5 V

SHDN Pin Current –10 μA

Operating Current in Shutdown VSHDN = 0V, Sum of Current from CLP,

CLN, DCIN

23mA

LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE

LTC4007EGN#PBF LTC4007EGN#TRPBF LTC4007EGN 24-Lead Plastic SSOP –40°C to 85°C

Consult LTC Marketing for parts speciﬁ ed with wider operating temperature ranges.

Consult LTC Marketing for information on non-standard lead based ﬁ nish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁ cations, go to: http://www.linear.com/tapeandreel/

ORDER INFORMATION

LTC4007

4007fc

ELECTRICAL CHARACTERISTICS

The l denotes the speciﬁ cations which apply over the full operating

temperature range (Note 4), otherwise speciﬁ cations are at TA = 25°C. VDCIN = 20V, VBAT = 12V unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Current Sense Ampliﬁ er, CA1

Input Bias Current Into BAT Pin 11.67 μA

CMSL CA1/I1 Input Common Mode Low l0V

CMSH CA1/I1 Input Common Mode High lVCLN – 0.2 V

Current Comparators ICMP and IREV

ITMAX Maximum Current Sense Threshold (VCSP – VBAT)V

ITH = 2.5V l140 165 200 mV

ITREV Reverse Current Threshold (VCSP – VBAT) –30 mV

Current Sense Ampliﬁ er, CA2

Transconductance 1 mmho

Source Current Measured at ITH, VITH = 1.4V –40 μA

Sink Current Measured at ITH, VITH = 1.4V 40 μA

Current Limit Ampliﬁ er

Transconductance 1.4 mmho

VCLP Current Limit Threshold l93 100 107 mV

ICLP CLP Input Bias Current 100 nA

Voltage Error Ampliﬁ er, EA

Transconductance 1 mmho

Sink Current Measured at ITH, VITH = 1.4V 36 μA

OVSD Overvoltage Shutdown Threshold as a Percent of

Programmed Charger Voltage

l102 107 110 %

Input P-Channel FET Driver (INFET)

DCIN Detection Threshold (VDCIN – VCLN) DCIN Voltage Ramping Up

from VCLN – 0.1V

l0 0.17 0.25 V

Forward Regulation Voltage (VDCIN – VCLN)l25 50 mV

Reverse Voltage Turn-Off Voltage (VDCIN – VCLN ) DCIN Voltage Ramping Down l–60 –25 mV

INFET “On” Clamping Voltage (VDCIN – VINFET)I

INFET = 1μA l5 5.8 6.5 V

INFET “Off” Clamping Voltage (VDCIN – VINFET)I

INFET = –25μA 0.25 V

Thermistor

NTCVR Reference Voltage During Sample Time 4.5 V

High Threshold VNTC Rising lNTCVR

• 0.48

NTCVR

• 0.5

NTCVR

• 0.52

Low Threshold VNTC Falling lNTCVR

• 0.115

NTCVR

• 0.125

NTCVR

• 0.135

Thermistor Disable Current VNTC ≤ 10V 10 μA

Indicator Outputs (ACP, CHG, FLAG, LOBAT, ICL, FAULT

C10TOL FLAG (C/10) Accuracy Voltage Falling at PROG l0.375 0.397 0.420 V

LBTOL LOBAT Threshold Accuracy 3C4C = 0V, CHEM = 0V

3C4C = 0V, CHEM = Open

3C4C = Open, CHEM = 0V

3C4C = Open, CHEM = Open

7.10

7.27

9.46

9.70

7.32

7.50

9.76

7.52

7.71

10.10

10.28

RESTART Threshold Accuracy 3C4C = 0V, CHEM = 0V

3C4C = 0V, CHEM = Open

3C4C = Open, CHEM = 0V

3C4C = Open, CHEM = Open

11.13

11.40

14.84

15.20

11.42

11.70

15.23

15.60

11.65

11.94

15.54

15.92

ICL Threshold Accuracy 83 93 1O5 mV

LTC4007

4007fc

ELECTRICAL CHARACTERISTICS

The l denotes the speciﬁ cations which apply over the full operating

temperature range (Note 4), otherwise speciﬁ cations are at TA = 25°C. VDCIN = 20V, VBAT = 12V unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

VOL Low Logic Level of ACP, CHG, FLAG, LOBAT,

ICL, FAULT

IOL = 100μA l0.5 V

VOH High Logic Level of CHG, LOBAT, ICL IOH = –1μA l2.7 V

IOFF Off State Leakage Current of ACP, FLAG, FAULT VOH = 3V –1 1 μA

IPO Pull-Up Current on CHG, LOBAT, ICL V = 0V –10 μA

Charge Termination Defeat Threshold at CHG 1 V

Programming Inputs (CHEM and 3C4C)

VIH High Logic Level l3.3 V

VIL Low Logic Level l1V

IPI Pull-Up Current V = 0V –14 μA

Oscillator

fOSC Regulator Switching Frequency 255 300 345 kHz

fMIN Regulator Switching Frequency in Drop Out Duty Cycle ≥ 98% 20 25 kHz

DCMAX Regulator Maximum Duty Cycle VCSP = VBAT 98 99 %

Gate Drivers (TGATE, BGATE)

VTGATE High (VCLN – VTGATE)I

TGATE = –1mA 50 mV

VBGATE High CLOAD = 3000pF 4.5 5.6 10 V

VTGATE Low (VCLN – VTGATE)C

LOAD = 3000pF 4.5 5.6 10 V

VBGATE Low IBGATE = 1mA 50 mV

TGTR

TGTF

TGATE Transition Time

TGATE Rise Time

TGATE Fall Time

CLOAD = 3000pF, 10% to 90%

110

100

BGTR

BGTF

BGATE Transition Time

BGATE Rise Time

BGATE Fall Time

CLOAD = 3000pF, 10% to 90%

VTGATE at Shutdown (VCLN – VTGATE)I

TGATE = –1μA, DCIN = 0V, CLN = 12V 100 mV

VBGATE at Shutdown IBGATE = 1μA, DCIN = 0V, CLN = 12V 100 mV

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: See Test Circuit.

Note 3: Does not include tolerance of current sense resistor or current

programming resistor.

Note 4: The LTC4007E is guaranteed to meet performance speciﬁ cations

from 0°C to 70°C. Speciﬁ cations over the –40°C to 85°C operating

temperature range are assured by design, characterization and correlation

with statistical process controls.

LTC4007

4007fc

TYPICAL PERFORMANCE CHARACTERISTICS

PWM Frequency vs Duty Cycle

Disconnect/Reconnect Battery

(Load Dump) 1A Load Step (Battery Present)

1A Load Step

(Battery Not Present)

Battery Leakage Current

vs Battery Voltage

INFET Response Time to

Reverse Current Line Regulation VOUT vs IOUT

TEST PERFORMED ON DEMOBOARD

VIN = 15VDC

CHARGER = ON

ICHARGE = <10mA

Vs OF PFET (5V/DIV)

Id (REVERSE) OF

PFET (5A/DIV)

Vgs OF PFET (2V/DIV)

4007 G01

VCHARGE = 12.6V

PFET = 1/2 Si4925DY

Vgs = 0

Vs = 0V

Id = 0A

1.25μs/DIV

VDCIN (V)

13 15 17 21 25 2919 23 27 31

VOUT ERROR (%)

4007 G02

0.10

0.05

–0.05

–0.10

–0.15

–0.20

–0.25

–0.30

–0.35

–0.40

–0.45

C3C4 = GND

C3C4 = OPEN

OUTPUT CURRENT (A)

0 0.5 1.0 2.0 3.0 4.01.5 2.5 3.5 4.5

OUTPUT VOLTAGE ERROR (%)

4007 G03

3C4C = GND

3C4C = OPEN

–0.5

–1.0

–1.5

–2.0

–2.5

–3.0

–3.5

–4.0

–4.5

–5.0

DUTY CYCLE (VOUT/VIN)

0 0.1 0.2 0.4 0.6 0.90.80.3 0.5 0.7 1.0

PWM FREQUENCY (kHz)

4007 G04

PROGRAMMED CURRENT = 10%

DCIN = 15V

DCIN = 20V

DCIN = 24V

350

300

250

200

150

100

4007 G05

LOAD CURRENT = 1A, 2A, 3A

DCIN = 20V

VFLOAT = 12.6V (3C4C = GND, CHEM = OPEN)

VFLOAT

1V/DIV

LOAD

STATE DISCONNECT

1A STEP

3A STEP

RECONNECT

3A STEP

1A STEP

DCIN = 20V

VFLOAT = 12.6V

OUTPUT VOLTAGE (500mV/DIV)

CHARGER CURRENT (1A/DIV)

4007 G06

DCIN = 20V

VFLOAT = 12.6V

OUTPUT VOLTAGE (5V/DIV)

CHARGER CURRENT (500mA/DIV)

4007 G07

BATTERY VOLTAGE (V)

0 5 10 15 20 25 30

BATTERY LEAKAGE CURRENT (μA)

4007 G08

VDCIN = 0V

LTC4007

4007fc

TYPICAL PERFORMANCE CHARACTERISTICS

Efﬁ ciency at 19VDC VIN Efﬁ ciency at 12.6V with 15VDC VIN

CHARGE CURRENT (A)

1.000.50 1.50 2.00 2.50 3.00

EFFICIENCY (%)

4007 G10

16.8V

12.6V

100

CHARGE CURRENT (A)

1.000.50 1.50 2.00 2.50 3.00

EFFICIENCY (%)

4007 G11

100

PIN FUNCTIONS

DCIN (Pin 1): External DC Power Source Input. Bypass this

pin with at least 0.01μF. See Applications Information.

CHG (Pin 2): Charge Status Output. When the battery is

being charged, the CHG pin is pulled low by an internal

N-channel MOSFET. Internal 10μA pull-up to 3.5V. If

VLOGIC is greater than 3.3V, add an external pull-up. The

timer charge termination can be defeated by forcing this

pin below 1V (or connecting it to GND).

ACP (Pin 3): Open-Drain output to indicate if the AC adapter

voltage is adequate for charging. This pin is pulled low

by an internal N-channel MOSFET if DCIN is below BAT. A

pull-up resistor is required. The pin is capable of sinking

at least 100μA.

RT (Pin 4): Timer Resistor. The timer period is set by placing

a resistor, RRT

, to GND. This resistor is always required.

The timer period is tTIMER = (1hour • RRT/154K).

If this resistor is not present, the charger will not start.

FAULT (Pin 5): Active low open-drain output that indicates

charger operation has stopped due to a low-battery

conditioning error, or that charger operation is suspended

due to the thermistor exceeding allowed values. A pull-

up resistor is required if this function is used. The pin is

capable of sinking at least 100μA.

GND (Pin 6): Ground for Low Power Circuitry.

3C4C (Pin 7): Select 3-cell or 4-cell ﬂ oat voltage by

connecting this pin to GND or open, respectively. Internal

14μA pull-up to 5.3V. This pin can also be driven with open-

collector/drain logic levels. High: 4 cell. Low: 3 cell.

LOBAT (Pin 8): Low-Battery Indicator. Active low digital

output. Internal 10μA pull-up to 3.5V. If the battery voltage is

below 2.5V/cell (or 2.44V/cell for 4.1V chemistry batteries)

LOBAT will be low. The pin is capable of sinking at least

100μA. If VLOGIC is greater than 3.3V, add an external

pull-up.

NTC (Pin 9): A thermistor network is connected from NTC

to GND. This pin determines if the battery temperature is

safe for charging. The charger and timer are suspended

and the FAULT pin is driven low if the thermistor indicates

a temperature that is unsafe for charging. The thermistor

function may be disabled with a 300k to 500k resistor

from DCIN to NTC.

LTC4007

4007fc

PIN FUNCTIONS

ITH (Pin 10): Control Signal of the Inner Loop of the

Current Mode PWM. Higher ITH voltage corresponds to

higher charging current in normal operation. A 6k resistor,

in series with a capacitor of at least 0.1μF to GND provides

loop compensation. Typical full-scale output current is

40μA. Nominal voltage range for this pin is 0V to 3V.

PROG (Pin 11): Current Programming/Monitoring Input/

Output. An external resistor to GND programs the peak

charging current in conjunction with the current sensing

resistor. The voltage at this pin provides a linear indication of

charging current. Peak current is equivalent to 1.19V. Zero

current is approximately 0.3V. A capacitor from PROG to

ground is required to ﬁ lter higher frequency components.

The maximum resistance to ground is 100k. Values higher

than 100k can cause the charger to shut down.

NC (Pin 12): No Connect.

ICL (Pin 13): Input Current Limit Indicator. Active low

digital output. Internal 10μA pull-up to 3.5V. Pulled low if

the charger current is being reduced by the input current

limiting function. The pin is capable of sinking at least

100μA. If VLOGIC is greater than 3.3V, add an external

pull-up.

CSP (Pin 14): Current Ampliﬁ er CA1 Input. The CSP and

BAT pins measure the voltage across the sense resistor,

RSENSE, to provide the instantaneous current signals

required for both peak and average current mode

operation.

BAT (Pin 15): Battery Sense Input and the Negative

Reference for the Current Sense Resistor. A precision

internal resistor divider sets the ﬁ nal ﬂ oat potential on

this pin. The resistor divider is disconnected during

shutdown.

CHEM (Pin 16): Select 4.1V or 4.2V cell chemistry by

connecting the pin to GND or open, respectively. Internal

14μA pull-up to 5.3V. Can also be driven with open-

collector/drain logic levels.

FLAG (Pin 17): Active low open-drain output that indicates

when charging current has declined to 10% of maximum

programmed current. A pull-up resistor is required if this

function is used. The pin is capable of sinking at least

100μA.

CLP (Pin 18): Positive input to the supply current limiting

ampliﬁ er, CL1. The threshold is set at 100mV above the

voltage at the CLN pin. When used to limit supply current, a

ﬁ lter is needed to ﬁ lter out the switching noise. If no current

limit function is desired, connect this pin to CLN.

CLN (Pin 19): Negative Reference for the Input Current

Limit Ampliﬁ er, CL1. This pin also serves as the power

supply for the IC. A 10μF to 22μF bypass capacitor should

be connected as close as possible to this pin.

TGATE (Pin 20): Drives the top external P-channel MOSFET

of the battery charger buck converter.

PGND (Pin 21): High Current Ground Return for the

BGATE Driver.

BGATE (Pin 22): Drives the bottom external N-channel

MOSFET of the battery charger buck converter.

INFET (Pin 23): Drives the Gate of the External Input PFET.

SHDN (Pin 24):

Charger is shut down and timer is reset when this pin is

HIGH. Internal 10μA pull-up to 3.5V. This pin can also be

used to reset the charger by applying a positive pulse that

is a minimum of 0.1μs long.

LTC4007

4007fc

BLOCK DIAGRAM

–

1.19V

11.67μA

TBAD

RESTART

MUX

1.105V

gm = 1m

gm = 1.4m

708mV

1.19V

3C4C

FLAG

GND

CHEM

LOBAT

ICL

TGATE

BGATE

CLP

100mV

15nF

20μF

RCL

CLN

PGND

397mV

CHG

NTC

0.47μF 10k

NTC

RRT

–

CL1

TIMER/CONTROLLER

THERMISTOR

OSCILLATOR

BAT 3k

RSENSE

CSP

ITH

32.4k

WATCHDOG

DETECT tOFF

CLN

DCIN

OSCILLATOR

1.28V

PWM

LOGIC

CHARGE

IREV

–

ICMP

–

÷5 BUFFERED ITH

PROG

4007 BD

RPROG

26.7k

0.0047μF

FAULT 5

SHDN 24

ACP 3

INFET

DCIN

0.1μF

VIN

–

CLN

5.8V

20μF

0.12μF

–

CA1

CA2

–

C/10

35mV

–

17mV

LTC4007

4007fc

TEST CIRCUIT

–

LT1055

LTC4007

VREF

CHEM

3C4C

BAT

DIVIDER/

MUX

CSP

14 ITH

0.6V

4007 TC

OPERATION

Overview

The LTC4007 is a synchronous current mode PWM step-

down (buck) switcher battery charger controller. The charge

current is programmed by the combination of a program

resistor (RPROG) from the PROG pin to ground and a sense

resistor (RSENSE) between the CSP and BAT pins. The ﬁ nal

ﬂ oat voltage is programmed to one of four values (12.3V,

12.6V, 16.4V, 16.8V) with ±1% maximum accuracy using

pins 3C4C and CHEM. Charging begins when the potential

at the DCIN pin rises above the voltage at BAT (and the

UVLO voltage) and the SHDN pin is low; the CHG pin is

set low. At the beginning of the charge cycle, if the cell

voltage is below 2.5V (2.44V if CHEM is low), the LOBAT

pin will be low. The LOBAT indicator can be used to reduce

the charging current to a low value, typically 10% of full

scale. If the cell voltage stays below 2.5V for 25% of the

total charge time, the charge sequence will be terminated

immediately and the FAULT pin will be set low.

An external thermistor network is sampled at regular inter-

vals. If the thermistor value exceeds design limits, charging

is suspended and the FAULT pin is set low. If the thermistor

value returns to an acceptable value, charging resumes

and the FAULT pin is set high. An external resistor on the

RT pin sets the charge termination time. Charge termination

can be defeated by forcing the CHG pin to a low voltage.

As the battery approaches the ﬁ nal ﬂ oat voltage, the charge

current will begin to decrease. When the current drops

to 10% of the full-scale charge current, an internal C/10

comparator will indicate this condition by latching the

FLAG pin low. The charge timer is also reset to 1/4 of the

total charge time when FLAG goes low. If this condition

is caused by an input current limit condition, described

below, then the FLAG indicator will be inhibited. When

a time-out occurs, charging is terminated immediately

and the CHG pin is forced to a high impedance state.

The charger will automatically restart if the cell voltage

is below 3.9V (or 3.81V if CHEM is low). To restart the

charge cycle manually, simply remove the input voltage

and reapply it, or set the SHDN pin high momentarily.

When the input voltage is not present, the charger goes

into a sleep mode, dropping battery current drain to 15μA.

This greatly reduces the current drain on the battery and

increases the standby time. The charger is inhibited any

time the SHDN pin is high.

Input FET

The input FET circuit performs two functions. It enables

the charger if the input voltage is higher than the CLN

pin and provides the logic indicator of AC present on the

ACP pin. It controls the gate of the input FET to keep a low

forward voltage drop when charging and also prevents

reverse current ﬂ ow through the input FET.

If the input voltage is less than VCLN, it must go at least

170mV higher than VCLN to activate the charger. When

this occurs the ACP pin is released and pulled up with an

external load to indicate that the adapter is present. The

gate of the input FET is driven to a voltage sufﬁ cient to

LTC4007

4007fc

OPERATION

keep a low forward voltage drop from drain to source. If the

voltage between DCIN and CLN drops to less than 25mV,

the input FET is turned off slowly. If the voltage between

DCIN and CLN is ever less than –25mV, then the input FET

is turned off in less than 10μs to prevent signiﬁ cant reverse

current from ﬂ owing in the input FET. In this condition, the

ACP pin is driven low and the charger is disabled.

Battery Charger Controller

The LTC4007 charger controller uses a constant off-time,

current mode step-down architecture. During normal

operation, the top MOSFET is turned on each cycle when

the oscillator sets the SR latch and turned off when the

main current comparator ICMP resets the SR latch. While

the top MOSFET is off, the bottom MOSFET is turned

on until either the inductor current trips the current

comparator IREV or the beginning of the next cycle. The

oscillator uses the equation:

tVV

OFF DCIN BAT

DCIN OSC

=–

•

to set the bottom MOSFET on time. The result is a nearly

constant switching frequency over a wide input/output

voltage range. This activity is diagrammed in Figure 1.

Table 1. Truth Table For Indicator States

MODE DCIN SHDN ACP** LOBAT FLAG** FAULT** ICL

TIMER

STATE CHG**

Shut down by low adapter voltage <BAT LOW LOW LOW HIGH HIGH LOW Reset HIGH

Charging a low bat >BAT LOW HIGH LOW HIGH* HIGH* HIGH* Running LOW

Normal charging >BAT LOW HIGH HIGH HIGH HIGH* HIGH* Running LOW

Input current limited charging >BAT LOW HIGH HIGH HIGH* HIGH* LOW Running LOW

Charger paused due to thermistor out of range >BAT LOW HIGH X X LOW

(from

NTC)

HIGH Paused LOW

Shut down by SHDN pin X HIGH X X HIGH HIGH LOW Reset HIGH

Terminated by low-battery fault (Note 1) >BAT LOW HIGH LOW HIGH* LOW LOW >T/4 HIGH

(Faulted)

Timer is reset when FLAG goes low, then

terminates after 1/4 T

>BAT LOW HIGH HIGH LOW HIGH LOW >T/4

after

FLAG =

LOW

HIGH

(Waiting for

Restart

Terminated by expired timer >BAT LOW HIGH HIGH HIGH HIGH LOW >T HIGH

(Waiting for

Restart

Charge termination defeated X X X X X X X X Forced LOW

Shut down by undervoltage lockout >BAT +

<UVL

LOW HIGH HIGH HIGH HIGH* LOW Reset HIGH*

*Most probable condition X = Don’t care, ** Open-drain output HIGH = OPEN with pull-up

Note 1: If a depleted battery is inserted while the charger is in this state,

the charger must be reset to initiate charging.

TGATE

OFF

BGATE

INDUCTOR

CURRENT

tOFF

TRIP POINT SET BY ITH VOLTAGE

OFF

4006 F01

Figure 1

LTC4007

4007fc

OPERATION

The peak inductor current, at which ICMP resets the SR

latch, is controlled by the voltage on ITH. ITH is in turn

controlled by several loops, depending upon the situation

at hand. The average current control loop converts the

voltage between CSP and BAT to a representative cur-

rent. Error amp CA2 compares this current against the

desired current programmed by RPROG at the PROG pin

and adjusts ITH until:

VV Ak

REF

PROG

CSP BAT

=+Ω

–.•.

11 67 3 01

301

therefore,

RAk

CHARGE MAX REF

PROG

() –. •

⎛

⎝

⎜

⎞

⎠

⎟Ω

11 67 301

μRRSENSE

The voltage at BAT is divided down by an internal resis-

tor divider and is used by error amp EA to decrease ITH

if the divider voltage is above the 1.19V reference. When

the charging current begins to decrease, the voltage at

PROG will decrease in direct proportion. The voltage at

PROG is then given by:

VI R Ak

PROG CHARGE SENSE PROG

=+Ω

()

•.•.•11 67 3 01μ3301.kΩ

VPROG is plotted in Figure 2.

The ampliﬁ er CL1 monitors and limits the input current,

normally from the AC adapter to a preset level (100mV/RCL).

At input current limit, CL1 will decrease the ITH voltage,

ICHARGE (% OF MAXIMUM CURRENT)

VPROG (V)

0.2

0.4

0.6

0.8

20 40 60 80 100

4007 F02

1.0

1.2 1.19V

0.309V

Figure 2. VPROG vs ICHARGE

thereby reducing charging current. The ICL indicator output

will go low when this condition is detected and the FLAG

indicator will be inhibited if it is not already LOW.

If the charging current decreases below 10% to 15%

of programmed current while engaged in input current

limiting, BGATE will be forced low to prevent the charger

from discharging the battery. Audible noise can occur in

this mode of operation.

An overvoltage comparator guards against voltage tran-

sient overshoots (>7% of programmed value). In this

case, both MOSFETs are turned off until the overvoltage

condition is cleared. This feature is useful for batteries

which “load dump” themselves by opening their protection

switch to perform functions such as calibration or pulse

mode charging.

PWM Watchdog Timer

There is a watchdog timer that observes the activity on

the BGATE and TGATE pins. If TGATE stops switching for

more than 40μs, the watchdog activates and turns off the

top MOSFET for about 400ns. The watchdog engages to

prevent very low frequency operation in dropout—a po-

tential source of audible noise when using ceramic input

and output capacitors.

Charger Start-Up

When the charger is enabled, it will not begin switching

until the ITH voltage exceeds a threshold that assures initial

current will be positive. This threshold is 5% to 15% of the

maximum programmed current. After the charger begins

switching, the various loops will control the current at a

level that is higher or lower than the initial current. The

duration of this transient condition depends upon the loop

compensation, but is typically less than 100μs.

Thermistor Detection

The thermistor detection circuit is shown in Figure 3. It

requires an external resistor and capacitor in order to

function properly.

The thermistor detector performs a sample-and-hold

function. An internal clock, whose frequency is determined

LTC4007

4007fc

OPERATION

by the timing resistor connected to RT, keeps switch S1

closed to sample the thermistor:

SAMPLE = 127.5 • 20 • RRT • 17.5pF = 13.8ms,

for RRT = 309k

The external RC network is driven to approximately 4.5V

and settles to a ﬁ nal value across the thermistor of:

VVR

RTH FINAL TH

()

.•

This voltage is stored by C7. Then the switch is opened

for a short period of time to read the voltage across the

thermistor.

HOLD = 10 • RRT • 17.5pF = 54μs,

for RRT = 309k

When the tHOLD interval ends the result of the thermistor

testing is stored in the D ﬂ ip-ﬂ op (DFF). If the voltage at

NTC is within the limits provided by the resistor divider

feeding the comparators, then the NOR gate output will

be low and the DFF will set TBAD to zero and charging will

continue. If the voltage at NTC is outside of the resistor

divider limits, then the DFF will set TBAD to one, the charger

will be shut down, FAULT pin is set low and the timer will

be suspended until TBAD returns to zero (see Figure 4).

32.4k

0.47μF

RTH

10k

NTC

–

NTC

LTC4007

60k

~4.5V

CLK

45k

15k

TBAD

4007 F03

CLK

(NOT TO

SCALE)

VNTC

tSAMPLE

VOLTAGE ACROSS THERMISTOR

tHOLD

4007 F04

COMPARATOR HIGH LIMIT

COMPARATOR LOW LIMIT

Figure 3

Figure 4

LTC4007

4007fc

APPLICATIONS INFORMATION

Battery Detection

It is generally not good practice to connect a battery while

the charger is running. The timer is in an unknown state

and the charger could provide a large surge current into

the battery for a brief time. The Figure 5 circuit keeps the

charger shut down and the timer reset while a battery is

not connected.

Charging current can be programmed by pulse width

modulating RPROG with a switch Q1 to RPROG at a frequency

higher than a few kHz (Figure 6). CPROG must be increased

to reduce the ripple caused by the RPROG switching. The

compensation capacitor at ITH will probably need to be

increased also to improve stability and prevent large

overshoot currents during start-up conditions. Charging

current will be proportional to the duty cycle of the switch

with full current at 100% duty cycle and zero current when

Q1 is off.

Maintaining C/10 Accuracy

The C/10 comparator threshold that drives the FLAG pin

has a ﬁ xed threshold of approximately VPROG = 400mV.

This threshold works well when RPROG is 26.7k, but will

not yield a 10% charging current indication if RPROG is

a different value. There are situations where a standard

value of RSENSE will not allow the desired value of charging

current when using the preferred RPROG value. In these

cases, where the full-scale voltage across RSENSE is within

±20mV of the 100mV full-scale target, the input resistors

connected to CSP and BAT can be adjusted to provide the

desired maximum programming current as well as the

correct FLAG trip point.

For example, the desired max charging current is 2.5A

but the best RSENSE value is 0.033Ω. In this case, the

voltage across RSENSE at maximum charging current is

only 82.5mV, normally RPROG would be 30.1k but the

nominal FLAG trip point is only 5% of maximum charging

current. If the input resistors are reduced by the same

1DCIN

LTC4007

ADAPTER

POWER

SWITCH CLOSED

WHEN BATTERY

CONNECTED

24 SHDN

4007 F05

Figure 5

Charger Current Programming

The basic formula for charging current is:

IVkR V

CHARGE MAX REF PROG

SENSE

() •. / –.

=Ω3 01 0 035

REF = 1.19V

This leaves two degrees of freedom: RSENSE and RPROG.

The 3.01k input resistors must not be altered since in-

ternal currents and voltages are trimmed for this value.

Pick RSENSE by setting the average voltage between CSP

and BAT to be close to 100mV during maximum charger

current. Then RPROG can be determined by solving the

above equation for RPROG.

RVk

RI V

PROG REF

SENSE CHARGE MAX

=Ω

•.

()

301

0 035

Table 2. Recommended RSNS and RPROG Resistor Values

IMAX (A) RSENSE (Ω) 1% RSENSE (W) RPROG (kΩ) 1%

1.0 0.100 0.25 26.7

2.0 0.050 0.25 26.7

3.0 0.033 0.5 26.7

4.0 0.025 0.5 26.7

102k

CPROG

4007 F06

PROG

LTC4007

2N7002

RPROG

Figure 6. PWM Current Programming

LTC4007

4007fc

APPLICATIONS INFORMATION

amount as the full-scale voltage is reduced then, R4 =

R5 = 2.49k and RPROG = 26.7k, the maximum charging

current is still 2.5A but the FLAG trip point is maintained

at 10% of full scale.

There are other effects to consider. The voltage across the

current comparator is scaled to obtain the same values as

the 100mV sense voltage target, but the input referred sense

voltage is reduced, causing some careful consideration of

the ripple current. Input referred maximum comparator

threshold is 117mV, which is the same ratio of 1.4x the

DC target. Input referred IREV threshold is scaled back to

–24mV. The current at which the switcher starts will be

reduced as well so there is some risk of boost activity.

These concerns can be addressed by using a slightly larger

inductor to compensate for the reduction of tolerance to

ripple current.

Charger Voltage Programming

Pins CHEM and C3C4 are used to program the charger

ﬁ nal output voltage. The CHEM pin programs Li-Ion bat-

tery chemistry for 4.1V/cell (low) or 4.2V/cell (high). The

C3C4 pin selects either 3 series cells (low) or 4 series

cells (high). It is recommended that these pins be shorted

to ground (logic low) or left open (logic high) to effect

the desired logic level. Use open-collector or open-drain

outputs when interfacing to the CHEM and 3C4C pins from

a logic control circuit.

Table 3. Charger Voltage Programming

VFINAL (V) 3C4C CHEM

12.3 LOW LOW

12.6 LOW HIGH

16.4 HIGH LOW

16.8 HIGH HIGH

Setting the Timer Resistor

The charger termination timer is designed for a range

of 1hour to 3 hour with a ±15% uncertainty. The timer

is programmed by the resistor RRT using the following

equation:

TIMER = 10 • 227 • RRT • 17.5pF (seconds)

It is important to keep the parasitic capacitance on the RT

pin to a minimum. The trace connecting RT to RRT should

be as short as possible.

Soft-Start

The LTC4007 is soft started by the 0.12μF capacitor on

the ITH pin. On start-up, ITH pin voltage will rise quickly

to 0.5V, then ramp up at a rate set by the internal 40μA

pull-up current and the external capacitor. Battery charging

current starts ramping up when ITH voltage reaches 0.8V

and full current is achieved with ITH at 2V. With a 0.12μF

capacitor, time to reach full charge current is about 2ms and

it is assumed that input voltage to the charger will reach

full value in less than 2ms. The capacitor can be increased

up to 1μF if longer input start-up times are needed.

Input and Output Capacitors

The input capacitor (C2) is assumed to absorb all input

switching ripple current in the converter, so it must have

adequate ripple current rating. Worst-case RMS ripple

current will be equal to one half of output charging current.

Actual capacitance value is not critical. Solid tantalum

low ESR capacitors have high ripple current rating in a

relatively small surface mount package, but caution must

RRT (kΩ)

100

tTIMER (MINUTES)

100

200

140

200 300 350

4007 F07

160

180

120

150 250 400 450 500

Figure 7. tTIMER vs RRT

LTC4007

4007fc

APPLICATIONS INFORMATION

be used when tantalum capacitors are used for input or

output bypass. High input surge currents can be created

when the adapter is hot-plugged to the charger or when

a battery is connected to the charger. Solid tantalum

capacitors have a known failure mechanism when subjected

to very high turn-on surge currents. Kemet T495 series

of “Surge Robust” low ESR tantalums are rated for high

surge conditions such as battery to ground.

The relatively high ESR of an aluminum electrolytic for

C1, located at the AC adapter input terminal, is helpful in

reducing ringing during the hot-plug event. Refer to AN88

for more information.

Highest possible voltage rating on the capacitor will

minimize problems. Consult with the manufacturer before

use. Alternatives include high capacity ceramic (at least

20μF) from Tokin, United Chemi-Con/Marcon, et al. Other

alternative capacitors include OS-CON capacitors from

Sanyo.

The output capacitor (C3) is also assumed to absorb

output switching current ripple. The general formula for

capacitor current is:

RMS

BAT BAT

DCIN

()

⎛

⎝

⎜⎞

⎠

⎟

()()

029 1

.–

For example:

DCIN = 19V, VBAT = 12.6V, L1 = 10μH, and

f = 300kHz, IRMS = 0.41A.

EMI considerations usually make it desirable to minimize

ripple current in the battery leads, and beads or induc-

tors may be added to increase battery impedance at the

300kHz switching frequency. Switching ripple current splits

between the battery and the output capacitor depending

on the ESR of the output capacitor and the battery imped-

ance. If the ESR of C3 is 0.2Ω and the battery impedance

is raised to 4Ω with a bead or inductor, only 5% of the

current ripple will ﬂ ow in the battery.

Inductor Selection

Higher operating frequencies allow the use of smaller

inductor and capacitor values. A higher frequency gener-

ally results in lower efﬁ ciency because of MOSFET gate

charge losses. In addition, the effect of inductor value

on ripple current and low current operation must also be

considered. The inductor ripple current ΔIL decreases with

higher frequency and increases with higher VIN.

Δ=

()()

⎛

⎝

⎜⎞

⎠

⎟

IfL

L OUT OUT

11–

Accepting larger values of ΔIL allows the use of low

inductances, but results in higher output voltage ripple

and greater core losses. A reasonable starting point for

setting ripple current is ΔIL = 0.4(IMAX). In no case should

ΔIL exceed 0.6(IMAX) due to limits imposed by IREV and

CA1. Remember the maximum ΔIL occurs at the maxi-

mum input voltage. In practice 10μH is the lowest value

recommended for use.

Lower charger currents generally call for larger inductor

values. Use Table 4 as a guide for selecting the correct

inductor value for your application.

Table 4

MAX AVERAGE

CURRENT (A) INPUT VOLTAGE (V)

MINIMUM INDUCTOR

VALUE (μH)

1 ≤20 40 ±20%

1 >20 56 ±20%

2 ≤20 20 ±20%

2 >20 30 ±20%

3 ≤20 15 ±20%

3 >20 20 ±20%

4 ≤20 10 ±20%

4 >20 15 ±20%

LTC4007

4007fc

APPLICATIONS INFORMATION

Charger Switching Power MOSFET

and Diode Selection

Two external power MOSFETs must be selected for use

with the charger: a P-channel MOSFET for the top (main)

switch and an N-channel MOSFET for the bottom (syn-

chronous) switch.

The peak-to-peak gate drive levels are set internally. This

voltage is typically 6V. Consequently, logic-level threshold

MOSFETs must be used. Pay close attention to the BVDSS

speciﬁ cation for the MOSFETs as well; many of the logic

level MOSFETs are limited to 30V or less.

Selection criteria for the power MOSFETs include the “ON”

resistance RDS(ON), total gate capacitance QG, reverse

transfer capacitance CRSS, input voltage and maximum

output current. The charger is operating in continuous

mode at moderate to high currents so the duty cycles for

the top and bottom MOSFETs are given by:

Main Switch Duty Cycle = VOUT/VIN

Synchronous Switch Duty Cycle = (VIN – VOUT)/VIN.

The MOSFET power dissipations at maximum output

current are given by:

PMAIN = VOUT/VIN(IMAX)2(1 + δΔT)RDS(ON)

+ k(VIN)2(IMAX)(CRSS)(fOSC)

PSYNC = (VIN – VOUT)/VIN(IMAX)2(1 + δΔT)RDS(ON)

Where δΔT is the temperature dependency of RDS(ON) and

k is a constant inversely related to the gate drive current.

Both MOSFETs have I2R losses while the PMAIN equation

includes an additional term for transition losses, which

are highest at high input voltages. For VIN < 20V the high

current efﬁ ciency generally improves with larger MOSFETs,

while for VIN > 20V the transition losses rapidly increase to

the point that the use of a higher RDS(ON) device with lower

CRSS actually provides higher efﬁ ciency. The synchronous

MOSFET losses are greatest at high input voltage or during

a short circuit when the duty cycle in this switch in nearly

100%. The term (1 +δΔT) is generally given for a MOSFET

in the form of a normalized RDS(ON) vs temperature curve,

but δ = 0.005/°C can be used as an approximation for low

voltage MOSFETs. CRSS = QGD/ΔVDS is usually speciﬁ ed

in the MOSFET characteristics. The constant k = 2 can be

used to estimate the contributions of the two terms in the

main switch dissipation equation.

If the charger is to operate in low dropout mode or with

a high duty cycle greater than 85%, then the topside P-

channel efﬁ ciency generally improves with a larger MOSFET.

Using asymmetrical MOSFETs may achieve cost savings

or efﬁ ciency gains.

The Schottky diode D1, shown in the Typical Application

on the back page, conducts during the dead-time between

the conduction of the two power MOSFETs. This prevents

the body diode of the bottom MOSFET from turning on and

storing charge during the dead-time, which could cost as

much as 1% in efﬁ ciency. A 1A Schottky is generally a good

size for 4A regulators due to the relatively small average

current. Larger diodes can result in additional transition

losses due to their larger junction capacitance.

The diode may be omitted if the efﬁ ciency loss can be

tolerated.

Calculating IC Power Dissipation

The power dissipation of the LTC4007 is dependent upon

the gate charge of the top and bottom MOSFETs (QG1 &

QG2 respectively) The gate charge is determined from the

manufacturer’s data sheet and is dependent upon both

the gate voltage swing and the drain voltage swing of the

MOSFET. Use 6V for the gate voltage swing and VDCIN for

the drain voltage swing.

PD = VDCIN • (fOSC (QG1 + QG2) + IQ)

Example:

DCIN = 19V, fOSC = 345kHz, QG1 = QG2 = 15nC,

Q = 5mA

PD = 292mW

LTC4007

4007fc

APPLICATIONS INFORMATION

Adapter Limiting

An important feature of the LTC4007 is the ability to auto-

matically adjust charging current to a level which avoids

overloading the wall adapter. This allows the product to

operate at the same time that batteries are being charged

without complex load management algorithms. Addition-

ally, batteries will automatically be charged at the maximum

possible rate of which the adapter is capable.

This feature is created by sensing total adapter output

current and adjusting charging current downward if a preset

adapter current limit is exceeded. True analog control is

used, with closed-loop feedback ensuring that adapter load

current remains within limits. Ampliﬁ er CL1 in Figure 8

senses the voltage across RCL, connected between the

CLP and CLN pins. When this voltage exceeds 100mV,

the ampliﬁ er will override programmed charging current

to limit adapter current to 100mV/RCL. A lowpass ﬁ lter

formed by 5kΩ and 15nF is required to eliminate switching

noise. If the current limit is not used, CLP and CLN should

be connected together and tied to DCIN.

Note that the ICL pin will be asserted when the voltage

across RCL is 93mV, before the adapter limit regulation

threshold.

current limit tolerance and use that current to determine

the resistor value.

RCL = 100mV/ILIM

ILIM = Adapter Min Current –

(Adapter Min Current • 7%)

Table 5. Common RCL Resistor Values

ADAPTER

RATING (A)

RCL VALUE*

(Ω) 1%

RCL POWER

DISSIPATION (W)

RCL POWER

RATING (W)

1.5 0.06 0.135 0.25

1.8 0.05 0.162 0.25

2 0.045 0.18 0.25

2.3 0.039 0.206 0.25

2.5 0.036 0.225 0.5

2.7 0.033 0.241 0.5

3 0.03 0.27 0.5

* Values shown above are rounded to nearest standard value.

As is often the case, the wall adapter will usually have

at least a +10% current limit margin and many times

one can simply set the adapter current limit value to the

actual adapter rating (see Table 5).

Designing the Thermistor Network

There are several networks that will yield the desired

function of voltage vs temperature needed for proper

operation of the thermistor. The simplest of these is the

voltage divider shown in Figure 9. Unfortunately, since

the HIGH/LOW comparator thresholds are ﬁ xed internally,

there is only one thermistor type that can be used in this

network; the thermistor must have a HIGH/LOW resistance

ratio of 1:7. If this happy circumstance is true for you, then

simply set R9 = RTH(LOW).

100mV

–

CLP

LTC4007

CLN

4007 F08

15nF

RCL*

CIN

VIN

CL1

AC ADAPTER

INPUT

*RCL = 100mV

ADAPTER CURRENT LIMIT

Figure 8. Adapter Current Limiting

Setting Input Current Limit

To set the input current limit, you need to know the mini-

mum wall adapter current rating. Subtract 7% for the input

LTC4007

NTC

C7 RTH

4007 F09

Figure 9. Voltage Divider Thermistor Network

LTC4007

4007fc

APPLICATIONS INFORMATION

If you are using a thermistor that doesn’t have a 1:7

HIGH/LOW ratio, or you wish to set the HIGH/LOW limits

to different temperatures, then the more generic network

in Figure 10 should work.

Once the thermistor, RTH, has been selected and the

thermistor value is known at the temperature limits, then

resistors R9 and R9A are given by:

For NTC thermistors:

R9 = 6 RTH(LOW) • RTH(HIGH)/(RTH(LOW) – RTH(HIGH))

R9A = 6 RTH(LOW) • RTH(HIGH)/(RTH(LOW) – 7 • RTH(HIGH))

Where RTH(LOW) > 7 • RTH(HIGH)

For PTC thermistors:

R9 = 6 RTH(LOW) • RTH(HIGH)/(RTH(HIGH) – RTH(LOW))

R9A = 6 RTH(LOW) • RTH(HIGH)/(RTH(HIGH) – 7 • RTH(LOW))

Where RTH(HIGH) > 7 • RTH(LOW)

Example #1: 10kΩ NTC with custom limits

TLOW = 0°C, THIGH = 50°C

TH = 10k at 25°C,

TH(LOW) = 32.582k at 0°C

TH(HIGH) = 3.635k at 50°C

R9 = 24.55k → 24.3k (nearest 1% value)

R9A = 99.6k → 100k (nearest 1% value)

Example #2: 100kΩ NTC

TLOW = 5°C, THIGH = 50°C

TH = 100k at 25°C,

TH(LOW) = 272.05k at 5°C

TH(HIGH) = 33.195k at 50°C

R9 = 226.9k → 226k (nearest 1% value)

R9A = 1.365M → 1.37M (nearest 1% value)

Example #3: 22kΩ PTC

TLOW = 0°C, THIGH = 50°C

TH = 22k at 25°C,

TH(LOW) = 6.53k at 0°C

TH(HIGH) = 61.4k at 50°C

R9 = 43.9k → 44.2k (nearest 1% value)

R9A = 154k

Sizing the Thermistor Hold Capacitor

During the hold interval, C7 must hold the voltage across

the thermistor relatively constant to avoid false readings.

A reasonable amount of ripple on NTC during the hold

interval is about 10mV to 15mV. Therefore, the value of

C7 is given by:

C7 = tHOLD/(R9/7 • –ln(1 – 8 • 15mV/4.5V))

= 10 • RRT • 17.5pF/(R9/7 • –ln(1 – 8 • 15mV/4.5V)

Example:

R9 = 24.3k

RT = 309k (~2 hour timer)

C7 = 0.57μF → 0.56μF (nearest value)

LTC4007

NTC

C7 R9A RTH

4007 F10

Figure 10. General Thermistor Network

LTC4007

4007fc

APPLICATIONS INFORMATION

Disabling the Thermistor Function

If the thermistor is not needed, connecting a resistor be-

tween DCIN and NTC will disable it. The resistor should be

sized to provide at least 10μA with the minimum voltage

applied to DCIN and 10V at NTC. Do not exceed 30μA.

Generally, a 301k resistor will work for DCIN less than

15V. A 499k resistor is recommended for DCIN between

15V and 24V.

Conditioning Depleted Batteries

Severely depleted batteries, with less than 2.5V/cell, should

be conditioned with a trickle charge to prevent possible

damage. This trickle charge is typically 10% of the 1C

rate of the battery. The LTC4007 can automatically trickle

charge depleted batteries using the circuit in Figure 11.

If the battery voltage is less than 2.5V/cell (2.44V/cell if

CHEM is low) then the LOBAT indicator will be low and Q4

is off. This programs the charging current with RPROG = R6

+ R14. Charging current is approximately 300mA. When

the cell voltage becomes greater than 2.5V the LOBAT

indicator goes high, Q4 shorts out R13, then RPROG = R6.

Charging current is then equal to 3A.

PCB Layout Considerations

For maximum efﬁ ciency, the switch node rise and fall

times should be minimized. To prevent magnetic and

electrical ﬁ eld radiation and high frequency resonant

problems, proper layout of the components connected to

the IC is essential (see Figure 12). Here is a PCB layout

priority list for proper layout. Layout the PCB using this

speciﬁ c order.

1. Input capacitors need to be placed as close as possible

to switching FET’s supply and ground connections.

Shortest copper trace connections possible. These

parts must be on the same layer of copper. Vias must

not be used to make this connection.

2. The control IC needs to be close to the switching FET’s

gate terminals. Keep the gate drive signals short for a

clean FET drive. This includes IC supply pins that connect

to the switching FET source pins. The IC can be placed

on the opposite side of the PCB relative to above.

3. Place inductor input as close as possible to switching

FET’s output connection. Minimize the surface area of

this trace. Make the trace width the minimum amount

needed to support current—no copper ﬁ lls or pours.

Avoid running the connection using multiple layers in

parallel. Minimize capacitance from this node to any

other trace or plane.

4. Place the output current sense resistor right next to the

inductor output but oriented such that the IC’s current

sense feedback traces going to resistor are not long. The

feedback traces need to be routed together as a single

pair on the same layer at any given time with smallest

trace spacing possible. Locate any ﬁ lter component on

these traces next to the IC and not at the sense resistor

location.

5. Place output capacitors next to the sense resistor output

and ground.

6. Output capacitor ground connections need to feed into

same copper that connects to the input capacitor ground

before tying back into system ground.

LTC4007

4007fc

APPLICATIONS INFORMATION

General Rules

7. Connection of switching ground to system ground or

internal ground plane should be single point. If the

system has an internal system ground plane, a good

way to do this is to cluster vias into a single star point

to make the connection.

8. Route analog ground as a trace tied back to IC ground

(analog ground pin if present) before connecting to any

other ground. Avoid using the system ground plane.

CAD trick: make analog ground a separate ground net

and use a 0Ω resistor to tie analog ground to system

ground.

9. A good rule of thumb for via count for a given high

current path is to use 0.5A per via. Be consistent.

10. If possible, place all the parts listed above on the

same PCB layer.

11. Copper ﬁ lls or pours are good for all power connec-

tions except as noted above in Rule 3. You can also use

copper planes on multiple layers in parallel too—this

helps with thermal management and lower trace in-

ductance improving EMI performance further.

12. For best current programming accuracy provide a

Kelvin connection from RSENSE to CSP and BAT. See

Figure 12 as an example.

It is important to keep the parasitic capacitance on the RT,

CSP and BAT pins to a minimum. The traces connecting

these pins to their respective resistors should be as short

as possible.

LTC4007

4007fc

APPLICATIONS INFORMATION

3C4C

CHEM

LOBAT

ICL

ACP

SHDN

FAULT

CHG

FLAG

NTC

LOBAT

ICL

ACP

SHDN

FAULT

CHG

FLAG

DCIN

INFET

CLP

CLN

TGATE

BGATE

PGND

CSP

BAT

PROG

ITH

GND

LTC4007

R9 32.4k 1%

309k

0.47μF

THERMISTOR

TIMING RESISTOR

(~2 HOURS)

R12

100k

R11

100k

R10

100k

VLOGIC *

DCIN

0V TO 20V

3A C1

0.1μF

INPUT SWITCH

15nF

Q2 D1

20μF

15μH 3A

4.99k

3.01k

R5 3.01k 1%

RSENSE

0.033Ω

RCL

0.033Ω

20μF

*PIN OPEN

D1: MBRM140T3

Q1: Si4431ADY

Q2: FDC645N

Q4: 2N7002 OR BSS138

BAT

MONITOR

(CHARGING

CURRENT

MONITOR)

SYSTEM

LOAD

0.12μF

6.04k

R14

52.3k

0.0047μF

4007 F11

26.7k

Figure 11. Circuit Application (16.8V/3A) to Automatically Trickle Charge Depleted Batteries

LTC4007

4007fc

PACKAGE DESCRIPTION

APPLICATIONS INFORMATION

4007 F12

VBAT

VIN

HIGH

FREQUENCY

CIRCULATING

PATH

BAT

SWITCH NODE

C2 C3

Figure 12. High Speed Switching Path

CSP

4007 F13

DIRECTION OF CHARGING CURRENT

RSENSE

BAT

Figure 13. Kelvin Sensing of Charging Current

GN Package

24-Lead Plastic SSOP (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1641)

.337 – .344*

(8.560 – 8.738)

GN24 (SSOP) 0204

345678 9 10 11 12

.229 – .244

(5.817 – 6.198)

.150 – .157**

(3.810 – 3.988)

161718192021222324 15 1413

.016 – .050

(0.406 – 1.270)

.015 p .004

(0.38 p 0.10) s 45o

0o – 8o TYP

.0075 – .0098

(0.19 – 0.25)

.0532 – .0688

(1.35 – 1.75)

.008 – .012

(0.203 – 0.305)

TYP

.004 – .0098

(0.102 – 0.249)

.0250

(0.635)

BSC

.033

(0.838)

REF

.254 MIN

RECOMMENDED SOLDER PAD LAYOUT

.150 – .165

.0250 BSC.0165 p.0015

.045 p.005

* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD

FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

INCHES

(MILLIMETERS)

NOTE:

1. CONTROLLING DIMENSION: INCHES

2. DIMENSIONS ARE IN

3. DRAWING NOT TO SCALE

LTC4007

4007fc

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

REVISION HISTORY

REV DATE DESCRIPTION PAGE NUMBER

B 7/10 Changed ±5% to ±4% in Description text 1

Updated Figure 6 13

C 8/10 “Charge Termination” text added 1, 4, 6, 9, 10, 17

(Revision history begins at Rev B)

LTC4007

4007fc

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com

LT 0810 REV C • PRINTED IN USA

RELATED PARTS

TYPICAL APPLICATION

12.6V/4A Li-Ion Battery Charger

3C4C

CHEM

LOBAT

ICL

ACP

SHDN

FAULT

CHG

FLAG

NTC

LOBAT

ICL

ACP

SHDN

FAULT

CHG

FLAG

DCIN

INFET

CLP

CLN

TGATE

BGATE

PGND

CSP

BAT

PROG

ITH

GND

LTC4007

R9 32.4k 1%

RRT

309k

0.47μF

THERMISTOR

10k

NTC

TIMING RESISTOR

(~2 HOURS)

R12

100k *

R11

100k

R10

100k

VLOGIC

DCIN

0V TO 20V

3A C1

0.1μF

INPUT SWITCH

15nF

Q2 D1

20μF

10μH 4A

4.99k

3.01k 1%

R5 3.01k 1%

RSENSE

0.025Ω

RCL

0.033Ω

20μF

BAT

CHARGING

CURRENT

MONITOR

SYSTEM

LOAD

0.12μF

6.04k

1% RPROG

26.7k

0.0047μF *PIN OPEN

D1: MBRS130T3

Q1: Si4431ADY

Q2: FDC645N

4007 TA02

PART NUMBER DESCRIPTION COMMENTS

1511 Constant-Current/Constant-Voltage 3A Battery

Charger with Input Current Limiting

High Efﬁ ciency Current Mode PWM with 4A Internal Switch

LT1513 SEPIC Constant- or Programmable-Current/

Constant-Voltage Battery Charger

Charger Input Voltage May Be Higher, Equal to or Lower Than Battery Voltage;

Charges Any Number of Cells Up to 20V, 500kHz Switching Frequency

LT1571 1.5A Switching Charger 1- or 2-Cell Li-Ion, 500kHz or 200kHz Switching Frequency, Termination Flag

LTC1628-PG 2-Phase, Dual Synchronous Step-Down Controller Minimizes CIN and COUT

, Power Good Output, 3.5V ≤ VIN ≤ 36V

LTC1709 2-Phase, Dual Synchronous Step-Down Controller

with VID

Up to 42A Output, Minimum CIN and COUT

, Uses Smallest Components for

Intel and AMD Processors

LTC1729

LT1769 2A Switching Battery Charger Constant-Current/Constant-Voltage Switching Regulator, Input Current

Limiting Maximizes Charge Current

LTC1778 Wide Operating Range, No RSENSE Synchronous

Step-Down Controller

2% to 90% Duty Cycle at 200kHz, Stable with Ceramic COUT

LTC1960 Dual Battery Charger/Selector with SPI Interface Simultaneous Charge or Discharge of Two Batteries, DAC Programmable

Current and Voltage, Input Current Limiting Maximizes Charge Current

LTC3711 No RSENSE™ Synchronous Step-Down Controller

with VID

3.5V ≤ VIN ≤ 36V, 0.925V ≤ VOUT ≤ 2V, for Transmeta, AMD and Intel

Mobile Processors

LTC4006 Small, High Efﬁ ciency, Fixed Voltage, Lithium-Ion

Battery Charger

Constant-Current/Constant-Voltage Switching Regulator with Termination Timer,

AC Adapter Current Limit and Thermistor Sensor in a Small 16-Pin Package

LTC4008 High Efﬁ ciency, Programmable Voltage/Current

Battery Charger

Constant-Current/Constant-Voltage Switching Regulator, Resistor Voltage Current

Programming, AC Adapter Current Limit and Thermistor Sensor

No RSENSE is a trademark of Linear Technology Corporation.